Write-only memory (engineering)

Last updated May 16, 2024

In information technology, a write-only memory (WOM) is a memory location or register that can be written to but not read. In addition to its literal meaning, the term may be applied to a situation when the data written by one circuit can be read only by other circuitry. The most common occurrence of the latter situation is when a processor writes data to a write-only register of hardware the processor is controlling. The hardware can read the instruction but the processor cannot. This can lead to problems in producing device drivers for the hardware.

Hardware uses

In 1972, WOM, an antithesis of read-only memory (ROM), was introduced as an inside practical joke perpetrated by Signetics.^[1] However, it was soon recognized that this concept actually describes certain functionalities in microprocessor systems.^[2]

The most frequent occurrences of write-only memories are where the memory locations are registers or an integrated circuit being used to control, or pass information to, hardware outside the processor. A central processing unit (CPU) can write to these locations, and thus control the hardware, but cannot read back the information and discover the current state of the hardware. The memory is write-only relative only to the CPU's point of view. Such arrangements are common on small embedded microcontroller systems to save costs and can cause difficulties for authors of device driver software.^[3] When the current hardware state is unknown to the CPU it can only put it into a known state by sending a new command, which may result in the state changing.^[4]^[5] To alleviate this difficulty, the content of the WOM may be mirrored by the CPU in the regular memory.^[6] However, this strategy is only reliable if the register is read-only from the perspective of the hardware. If the external hardware is able to change its own state independently of the CPU then the hardware state is able to diverge from the image of that state being mirrored in CPU memory.

An example of this kind of use concerned access to memory on early PCs. The original PCs used 8086 or 8088 processors which had the ability to address only 1 MB of memory. A large part of this was occupied by the BIOS and the video card, resulting in only 640 kB of contiguous addressable RAM being available. The memory requirement of many applications soon surpassed this figure. One method of overcoming the limitation was by the use of bank-switched RAM. A number of banks of RAM are provided, but are not permanently assigned to a memory location. In a particular implementation, a special board is added to a computer, which controls the allocation of banks to memory space. The control board has its own memory chip. A computer can write data into this chip, but only the control board itself can read the chip,^{[note 1]} hence it is dubbed "write only" memory.^[7]^{: 200–202}

Another example concerns some functions carried out by graphics processing units (GPUs). For instance, a GPU might be carrying out shader processing on the contents of graphics memory. It can be faster and more efficient for the GPU to take input for the shader process from read-only locations and write the shader output to different write-only locations without having to copy data between the read and write buffers after each iteration.^[8]

An example that is still of contemporary relevance can be found in the 16550 UART, whose derivatives are still in widespread use. To add a data FIFO without breaking compatibility with the 8250 UART's eight configuration registers, the write-only "FIFO control register" was assigned the same port address as the read-only "interrupt identification register". Writes to that address program the FIFO control register, but there is no way to read it back.

The term is also used to describe the computer view of certain display devices such as the e-ink screens used in e-readers.^[9]

Security and encryption

Locking the frame buffer of a GPU to effectively turn it into a write-only memory can be useful in protecting encrypted data. When encrypted data arrives at its destination, it needs to be decrypted before it can be displayed to the user. The existence of unencrypted material in memory where it can be accessed by the CPU or peripheral devices is a potential security weakness. This weakness may be alleviated by carrying out the decryption within the GPU and writing the unencrypted data directly to display memory. Nothing else can read the data while the frame buffer is locked, and when it is unlocked it will be displaying something else.^[10] All modern smart cards that feature a chip can also be said to rely on WOM technology, because they are programmed at a factory with certain encryption keys that can not directly be read by a card reader. Instead the keys are indirectly used by algorithms that validate passwords or decrypt certain content. Nintendo had a patent describing using hard disk portions as temporary write only storage for game code that is kept write only until that partition has been verified with an authorizing digital signature.^[11]

Computability theory

In computability theory, adding a WOM to some models of computation can increase their computational power.^[12]

Notes

↑ The board is installed so that its memory chip is at the same address location as a location in ROM. A write to that address goes both to ROM and to the board, but the read-only memory is unaffected. However a read returns only the contents of ROM since the board hardware does not respond to an external read command.^[7]

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References

↑ Pease, Robert A. (2011). "The origin of the WOM — the "Write Only Memory"". National Semiconductor. Archived from the original on 2011-06-18.
↑ 1976 WESCON technical papers. Los Angeles, California, USA: Western Electronic Show and Convention. 14–17 September 1976. p. 17. Archived from the original on 2014-06-27. Retrieved 2013-05-20.
↑ Roberts, Tim (2004-08-17). "If every hardware engineer just understood that … write-only registers make debugging almost impossible, our job would be a lot easier". DDK MVP Expert Zone. Windows Hardware and Driver Central. Microsoft. Archived from the original on 2004-08-21. Retrieved 2011-11-03.
↑ Prosise, Jeff (1987-07-21). "Mouse software: See how they run". Productivity. PC Magazine . PC Lab Notes. Vol. 6, no. 13. Ziff-Davis Publishing Company. pp. 411–412, 414, 417–418, 420, 422, 425–426, 428 [422]. ISSN 0888-8507 . Retrieved 2023-07-22.
↑ Lipovski, G. Jack (1999-04-27). Single and Multi-Chip Microcontroller Interfacing: For the Motorola 6812. Academic Press. p. 122. ISBN 978-0-08-051726-1. LCCN 98-89451 . Retrieved 2013-05-20.
↑ Ganssle, Jack G.; Barr, Michael (2003). "Write-only register". Embedded Systems Dictionary. Taylor & Francis. p. 285. ISBN 1-57820120-9. Archived from the original on 2014-07-05. Retrieved 2023-07-22.
1 2 Owen, Bruce (1985-04-02). "Breaking the Memory Barrier". PC Magazine . 4 (7). Ziff-Davis Publishing Company: 193–202 [200–202]. ISSN 0888-8507.
↑ Christof Seiler, Philippe Büchler, Lutz-Peter Nolte, Mauricio Reyes, Rasmus Paulsen, "Hierarchical Markov random fields applied to model soft tissue deformations on graphics hardware", Recent Advances in the 3D Physiological Human, part 1, pp. 133–148 [143], 2009 ISBN 1848825641 doi:10.1007/978-1-84882-565-9_9
↑ "LS0xxB4Dx01 Ultra Low-Power Memory LCD" (PDF). Archived from the original (PDF) on 2014-02-24. Retrieved 2014-02-19.
↑ Angelos D. Keromytis, "Trusted computing platforms and secure operting systems", in: Markus Jakobsson and Steven Myers (eds.), Phishing and Countermeasures: Understanding the Increasing Problem of Electronic Identity Theft, John Wiley & Sons, 2006 ISBN 0-47008609-2. p. 403.
↑ Security system for video game system with hard disk drive and internet access capability Scott Scott Elliott Nintendo 2004 https://patents.google.com/patent/US6942573B2 Archived 2021-12-14 at the Wayback Machine
↑ Yakaryilmaz, Abuzer; Freivalds, Rusins; Say, A. C. Cem; Agadzanyan, Ruben (March 2012). "Quantum computation with devices whose contents are never read". Natural Computing . 11 (1): 81–94. arXiv: 1011.1201 . doi:10.1007/s11047-011-9270-0. S2CID 12513092.