Datapoint 2200

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Datapoint 2200
Datapoint-2200.jpg
Datapoint 2200 computer
Manufacturer Computer Terminal Corporation
Type Intelligent terminal, personal computer
Release dateMay 1970;54 years ago (1970-05)
Discontinued1979;45 years ago (1979) [1]
Operating system Datapoint O/S
CPU serial, discrete logic implementation of the Intel 8008 instruction set
Memory2 KB standard; expandable to 16 KB
DisplayText only, 80×12 characters

The Datapoint 2200 was a mass-produced programmable terminal usable as a computer, designed by Computer Terminal Corporation (CTC) founders Phil Ray and Gus Roche [2] and announced by CTC in June 1970 (with units shipping in 1971). It was initially presented by CTC as a versatile and cost-efficient terminal for connecting to a wide variety of mainframes by loading various terminal emulations from tape rather than being hardwired as most contemporary terminals, including their earlier Datapoint 3300. [3]

Contents

Dave Gust, a CTC salesman, realized that the 2200 could meet Pillsbury Foods's need for a small computer in the field, after which the 2200 was marketed as a stand-alone computer. [3] Its industrial designer John "Jack" Frassanito has later claimed that Ray and Roche always intended the Datapoint 2200 to be a full-blown personal computer, but that they chose to keep quiet about this so as not to concern investors and others. [2] [4]

The terminal's multi-chip CPU (processor)'s instruction set became the basis of the Intel 8008 instruction set, which inspired the Intel 8080 instruction set and the x86 instruction set used in the processors for the original IBM PC and its descendants.

Technical description

Datapoint 2200 version I registers
12111009080706050403020100(bit position)
Main registers
AAccumulator
BB register
CC register
DD register
EE register
HH register (indirect)
LL register (indirect)
Program counter
PProgram Counter
15-level push-down address stack
ASCall level 1
ASCall level 2
ASCall level 3
...
ASCall level 13
ASCall level 14
ASCall level 15
Flags
C P Z S Flags

The Datapoint 2200 had a built-in full-travel keyboard, a built-in 12-line, 80-column green screen monitor, and two 47 character-per-inch cassette tape drives each with 130  KB capacity. Its size, 9+58 in × 18+12 in × 19+58 in (24 cm × 47 cm × 50 cm), and shapea box with protruding keyboardapproximated that of an IBM Selectric typewriter. [5] Initially, a Diablo 2.5 MB 2315-type removable cartridge hard disk drive was available, along with modems, several types of serial interface, parallel interface, printers and a punched card reader. Later, an 8-inch floppy disk drive was also made available, along with other, larger hard disk drives. An industry-compatible 7/9-track (user selectable) magnetic tape drive was available by 1975. In late 1977, Datapoint introduced ARCNET local area networking. The original Type 1 2200 shipped with 2 kilobytes (KiB) of serial shift register main memory, expandable to 8 KiB. The Type 2 2200 used denser 1 kbit RAM chips, giving it a default 4 KiB of memory, expandable to 16 KiB. Its starting price was around US$5,000 (equivalent to $38,000in 2023), and a full 16 KiB Type 2 2200 had a list price of just over $14,000.

The 8-bit processor architecture that CTC designed for the Datapoint 2200 was implemented in four distinct ways, all with nearly identical instruction sets, but very different internal microarchitectures: CTC's original design that communicated data serially, CTC's parallel design, the Texas Instruments TMC 1795, and the Intel 8008. [6]

The 2200 models were succeeded by the 5500, 1100, 6600, 3800/1800, 8800, etc.

The fact that most laptops and cloud computers today store numbers in little-endian format is carried forward from the original Datapoint 2200. Because the original Datapoint 2200 had a serial processor, it needed to start with the lowest bit of the lowest byte in order to handle carries. Microprocessors descended from the Datapoint 2200 (the 8008, Z80, and the x86 chips used in most laptops and cloud computers today) kept the little-endian format used by that original Datapoint 2200. [7] [8]

Processor

The original design called for a single-chip 8-bit microprocessor for the CPU, rather than a processor built from discrete TTL modules as was conventional at the time. In 1969, CTC contracted two companies, Intel and Texas Instruments (TI), to make the chip. TI was unable to make a reliable part and dropped out. Intel was unable to make CTC's deadline. Intel and CTC renegotiated their contract, ending up with CTC keeping its money and Intel keeping the eventually completed processor. [2]

CTC released the Datapoint 2200 using about 100 TTL components (SSI/MSI chips) instead of a microprocessor, while Intel's single-chip design, eventually designated the Intel 8008, was finally released in April 1972. [9]

Possibly because of their speed advantages compared to MOS circuits, Datapoint continued to build processors out of TTL chips until the early 1980s. [7]

Nonetheless, the 8008 was to have a seminal importance. It was the basis of Intel's line of 8-bit CPUs, which was followed by their assembly language compatible 16-bit CPUs — the first members of the x86 family, as the instruction set was later to be known. Already successful and widely used, the x86 architecture's further rise after the success in 1981 of the original IBM Personal Computer with an Intel 8088 CPU means that most desktop, laptop, and server computers in use today have a CPU instruction set directly based on the work of CTC's engineers. The instruction set of the highly successful Zilog Z80 microprocessor can also be traced back to the Datapoint 2200 as the Z80 was backwards-compatible with the Intel 8080. More immediately, the Intel 8008 was adopted by very early microcomputers including the SCELBI, Mark-8, MCM/70 and Micral N.

Instruction set

Instructions are one to three bytes long, consisting of an initial opcode byte, followed by up to two bytes of operands which can be an immediate operand or a program address. Instructions operate on 8-bits only; there are no 16-bit operations. There is only one mechanism to address data memory: indirect addressing pointed to by a concatenation of the H and L registers, referenced as M. The 2200 does, however, support 13-bit program addresses. It has automatic CALL and RETURN instructions for multi-level subroutine calls and returns which can be conditionally executed, like jumps. Direct copying may be made between any two registers or a register and memory. Eight math/logic functions are supported between the accumulator (A) and any register, memory, or an immediate value. Results are always deposited in A. Most instructions are executed in 16μs, 24μs, or a leisurely 520μs when accessing M. The 520μs represents the delay of the 2200's shift register memory to fully recirculate back to the next instruction. Branch type instructions take a variable amount of time (24μs to 520μs) depending on the distance of the branch.

Datapoint 2200 version I instruction set
OpcodeOperandsMnemonicTime μsDescription
76543210b2b3
0000000XHALTHalt
00000010SLC16A1-7 ← A0-6; A0 ← Cy ← A7
00CC011Rcc (RETURN conditional)16/†If cc true, P ← (stack)
00ALU100dataAD AC SU SB ND XR OR CP data16A ← A [ALU operation] data
00DDD110dataLr data (Load r with immediate data)16DDD ← data (except M)
00000111RETURNP ← (stack)
00001010SRC16A0-6 ← A1-7; A7 ← Cy ← A0
01CC000addloaddhiJcc add (JMP conditional)24/†If cc true, P ← add
01000001INPUT16A ← input
01command1EX command (external command)16command ← A (coded 8-31 only)
01CC010addloaddhiCcc add (CALL conditional)24/†If cc true, (stack) ← P, P ← add
01000100addloaddhiJMP addP ← add
01000110addloaddhiCALL add(stack) ← P, P ← add
10ALUSSSADr ACr SUr SBr NDr XRr ORr CPr16/520A ← A [ALU operation] SSS
11000000NOP16No operation (Actually LAA)
11DDDSSSLds (Load d with s)16/520DDD ← SSS
11111111HALTHalt
76543210b2b3MnemonicTime μsDescription
SSS DDD210CCALU
A000FC, C falseADr AD (A ← A + arg)† Variable. Can be from 24μs to 520μs.
B001FZ, Z falseACr AC (A ← A + arg + Cy)
C010FS, S falseSUr SU (A ← A - arg)
D011FP, P oddSBr SB (A ← A - arg - Cy)
E100TC, C trueNDr ND (A ← A ∧ arg)
H101TZ, Z trueXRr XR (A ← A ⊻ arg)
L110TS, S trueORr OR (A ← A ∨ arg)
M111TP, P evenCPr CP (A - arg)
SSS DDD210CCALU

Performance

Although the Datapoint 2200 version I is somewhat faster than an Intel 8008 on register instructions, any reference to the 2200's shift-register memory incurs a large 520µs delay. Also any JMP, CALL, or RETURN can incur a variable delay up to 520µs depending on the distance to the new address. The parallel-architecture Datapoint 2200 version II is much faster than either. [5] [10]

InstructionDescriptionDatapoint 2200 ver I µs500 kHz Intel 8008 µsDatapoint 2200 ver II µs
ADBAdd B to A16203.2
ADI nnAdd nn immediate to A16324.8
ADMAdd memory to A520324.8
JMP nnnnJump to nnnn24-520446.4
CALL+RETCall and Ret combined520649.6
Rcc (false)Conditional return not taken16123.2

Code example

The following Datapoint 2200 assembly source code is for a subroutine named MEMCPY that copies a block of data bytes from one location to another. Because the byte counter is only 8 bits, there is enough room to load all the subroutine parameters into the 2200's register file. Datapoint 2200 version I transfers 374 bytes per second using this routine. A 500 kHz Intel 8008 executes this code almost four times faster, transferring 1,479 bytes per second. Datapoint 2200 version II is much faster than either at 9,615 bytes per second. [5] [10] If more than an 8-bit count is needed, a more complicated copy routine with parameters held in memory would be required.

                                                                                                                                                                     002000  317     002001  206 020 004 002004  371         002005  206 020 004 002010  302 002011  024 001 002013  320 002014  110 000 004 002017  007                             002020  306 002021  364         002022  004 001 002024  340 002025  305         002026  353 002027  014 000 002031  330 002032  007         002032              
; MEMCPY --; Copy a block of memory from one location to another;; Entry parameters in registers;       HL: 13-bit address of source data block;       DE: 13-bit address of target data block;       C: 8-bit count of bytes to copy. (1 to 256 bytes)ORG2000Q;Code at 002000 octalMEMCPYLBM;Read source byte into BCALLXCHGI;Exchange HL<->DE and increment DELMB;Save B to target byteCALLXCHGI;Exchange HL<->DE and increment DELAC;Decrement byte counter in CSU1LCAJFZMEMCPY;Continue for all bytesRETURN;Exchange DE and HL register pairs then increment DE as 16 bitsXCHGILAL;Exchange L and ELLEAD1;and inc E, low byte of DELEALAH;Exchange H and DLHDAC0;proagate Cy into DLDARETURNEND

Credits

The original instruction set architecture was developed by Victor Poor and Harry Pyle. [11] The TTL design they ended up using was made by Gary Asbell. Industrial design (how the box's exterior looked, including the company's logo) was done by Jack Frassanito. [2]

Specifications

Main unit

Peripherals

Users of the 2200 and succeeding terminals eventually had several optional units to choose from. Among these were:

See also

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References

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  2. 1 2 3 4 Wood, Lamont (August 8, 2008). "Forgotten PC history: The true origins of the personal computer". Computerworld.
  3. 1 2 Wood, Lamont (2013). Datapoint: The Lost Story of the Texans Who Invented the Personal Computer. Hugo House Publishers, Ltd. pp. 102–103. ISBN   9781936449361.
  4. Weinkrantz, Allen (June 2, 2009). "San Antonio Has Claim As The Birthplace of the Personal Computer. Read All About It". Archived from the original on March 4, 2016.
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  6. Shirriff, Ken (August 30, 2016). "The Surprising Story of the First Microprocessors". IEEE Spectrum . 53 (9): 48–54. doi:10.1109/MSPEC.2016.7551353. S2CID   32003640.
  7. 1 2 Shirriff, Ken. "The Texas Instruments TMX 1795: the first, forgotten microprocessor".
  8. "Oral History Panel on the Development and Promotion of the Intel 8008 Microprocessor" (PDF). September 21, 2006. p. 5.
  9. Thompson Kaye, Glynnis (1984). A Revolution in Progress - A History to Date of Intel (PDF). Intel Corporation. p. 13. "The 8-bit 8008 microprocessor had been developed in tandem with the 4004 and was introduced in April 1972. It was originally intended to be a custom chip for Computer Terminals Corp. of Texas, later to be known as Datapoint." "As it developed, CTC rejected the 8008 because it was too slow for the company's purpose and required too many supporting chips."
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