Intel 8088

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Intel 8088
KL Intel TD8088.jpg
An Intel D8088 processor in a ceramic DIP and silver pins.
ProducedFrom 1979 to 1998 [1]
Common manufacturer(s)
Max. CPU clock rate 5 MHz to 10 MHz
Min. feature size 3 µm
Instruction set x86-16
Transistors29,000
Data width8 bits
Address width20 bits
Socket(s)
Predecessor Intel 8085
Successor 80186 and 80286 (both of which were introduced in early 1982)
Co-processor Intel 8087
Package(s)
VariantThe Intel 8088 is a variant of the Intel 8086.

The Intel 8088 ("eighty-eighty-eight", also called iAPX 88) [2] [3] [4] microprocessor is a variant of the Intel 8086. Introduced on June 1, 1979, [5] [6] [7] [8] the 8088 had an eight-bit external data bus instead of the 16-bit bus of the 8086. The 16-bit registers and the one megabyte address range were unchanged, however. In fact, according to the Intel documentation, the 8086 and 8088 have the same execution unit (EU)only the bus interface unit (BIU) is different. The original IBM PC was based on the 8088, as were its clones.

Microprocessor Computer processor contained on an integrated-circuit chip

A microprocessor is a computer processor that incorporates the functions of a central processing unit on a single integrated circuit (IC), or at most a few integrated circuits. The microprocessor is a multipurpose, clock driven, register based, digital integrated circuit that accepts binary data as input, processes it according to instructions stored in its memory and provides results as output. Microprocessors contain both combinational logic and sequential digital logic. Microprocessors operate on numbers and symbols represented in the binary number system.

Intel 8086 16-bit central processing unit

The 8086 is a 16-bit microprocessor chip designed by Intel between early 1976 and June 8, 1978, when it was released. The Intel 8088, released July 1, 1979, is a slightly modified chip with an external 8-bit data bus, and is notable as the processor used in the original IBM PC design.

Bus (computing) communication system that transfers data between components inside a computer

In computer architecture, a bus is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components and software, including communication protocols.

Contents

History and description

Die of AMD 8088 AMD 8088 die.JPG
Die of AMD 8088

The 8088 was designed at Intel's laboratory in Haifa, Israel, as were a large number of Intel's processors. [9] The 8088 was targeted at economical systems by allowing the use of an eight-bit data path and eight-bit support and peripheral chips; complex circuit boards were still fairly cumbersome and expensive when it was released. The prefetch queue of the 8088 was shortened to four bytes, from the 8086's six bytes, and the prefetch algorithm was slightly modified to adapt to the narrower bus. [lower-alpha 1] These modifications of the basic 8086 design were one of the first jobs assigned to Intel's then-new design office and laboratory in Haifa.

Haifa Place in Israel

Haifa is the third-largest city in Israel – after Jerusalem and Tel Aviv – with a population of 283,640 in 2018. The city of Haifa forms part of the Haifa metropolitan area, the second- or third-most populous metropolitan area in Israel. It is home to the Bahá'í World Centre, and is a UNESCO World Heritage Site and a destination for Bahá'í pilgrims.

Israel country in the Middle East

Israel, also known as the State of Israel, is a country in Western Asia, located on the southeastern shore of the Mediterranean Sea and the northern shore of the Red Sea. It has land borders with Lebanon to the north, Syria to the northeast, Jordan on the east, the Palestinian territories of the West Bank and Gaza Strip to the east and west, respectively, and Egypt to the southwest. The country contains geographically diverse features within its relatively small area. Israel's economic and technological center is Tel Aviv, while its seat of government and proclaimed capital is Jerusalem, although the state's sovereignty over Jerusalem has only partial recognition.

Fetching the instruction opcodes from program memory well in advance is known as prefetching and it is served by using prefetch input queue (PIQ).The pre-fetched instructions are stored in data structure - namely a queue. The fetching of opcodes well in advance, prior to their need for execution increases the overall efficiency of the processor boosting its speed. The processor no longer has to wait for the memory access operations for the subsequent instruction opcode to complete. This architecture was prominently used in the Intel 8086 microprocessor.

Variants of the 8088 with more than 5 MHz maximal clock frequency include the 8088-2, which was fabricated using Intel's new enhanced nMOS process called HMOS and specified for a maximal frequency of 8 MHz. Later followed the 80C88, a fully static CHMOS design, which could operate with clock speeds from 0 to 8 MHz. There were also several other, more or less similar, variants from other manufacturers. For instance, the NEC V20 was a pin-compatible and slightly faster (at the same clock frequency) variant of the 8088, designed and manufactured by NEC. Successive NEC 8088 compatible processors would run at up to 16 MHz. In 1984, Commodore International signed a deal to manufacture the 8088 for use in a licensed Dynalogic Hyperion clone, in a move that was regarded as signaling a major new direction for the company. [10]

N-type metal-oxide-semiconductor logic uses n-type MOSFETs to implement logic gates and other digital circuits. These nMOS transistors operate by creating an inversion layer in a p-type transistor body. This inversion layer, called the n-channel, can conduct electrons between n-type "source" and "drain" terminals. The n-channel is created by applying voltage to the third terminal, called the gate. Like other MOSFETs, nMOS transistors have four modes of operation: cut-off, triode, saturation, and velocity saturation.

Static core generally refers to a microprocessor (MPU) entirely implemented in static logic. A static core MPU may be halted by stopping the system clock oscillator that is driving it, maintaining its state and resume processing at the point where it was stopped when the clock signal is restarted, as long as power continues to be applied. Static core MPUs are fabricated in the CMOS process and hence consume very little power when the clock is stopped, making them useful in designs in which the MPU remains in standby mode until needed and minimal loading of the power source is desirable during standby.

CHMOS

CHMOS refers to one of a series of Intel CMOS processes developed from their HMOS process..

When announced, the list price of the 8088 was US$124.80. [11]

Differences from the 8086

The 8088 is architecturally very similar to the 8086. The main difference is that there are only eight data lines instead of the 8086's 16 lines. All of the other pins of the device perform the same function as they do with the 8086 with two exceptions. First, pin 34 is no longer BHE (this is the high-order byte select on the 8086—the 8088 does not have a high-order byte on its eight-bit data bus). [12] :5–97 Instead it outputs a maximum mode status, SSO. Combined with the IO/M and DT/R signals, the bus cycles can be decoded (it generally indicates when a write operation or an interrupt is in progress). The second change is the pin that signals whether a memory access or input/output access is being made has had it sense reversed. The pin on the 8088 is IO/M. On the 8086 part it is IO/M. The reason for the reversal is that it makes the 8088 compatible with the 8085. [12] :5–98

Intel 8085 8-bit microprocessor invented in 1976

The Intel 8085 ("eighty-eighty-five") is an 8-bit microprocessor produced by Intel and introduced in March 1976. It is a software-binary compatible with the more-famous Intel 8080 with only two minor instructions added to support its added interrupt and serial input/output features. However, it requires less support circuitry, allowing simpler and less expensive microcomputer systems to be built.

Performance

Depending on the clock frequency, the number of memory wait states, as well as on the characteristics of the particular application program, the average performance for the Intel 8088 ranged approximately from 0.33 to 1 million instructions per second. [13] Meanwhile, the mov reg,reg and ALU [lower-alpha 2] reg,reg instructions, taking two and three cycles respectively, yielded an absolute peak performance of between 13 and 12 MIPS per MHz, that is, somewhere in the range 3–5 MIPS at 10 MHz.

A wait state is a delay experienced by a computer processor when accessing external memory or another device that is slow to respond.

Instructions per second (IPS) is a measure of a computer's processor speed. For CISC computers different instructions take different amounts of time, so the value measured depends on the instruction mix; even for comparing processors in the same family the IPS measurement can be problematic. Many reported IPS values have represented "peak" execution rates on artificial instruction sequences with few branches and no cache contention, whereas realistic workloads typically lead to significantly lower IPS values. Memory hierarchy also greatly affects processor performance, an issue barely considered in IPS calculations. Because of these problems, synthetic benchmarks such as Dhrystone are now generally used to estimate computer performance in commonly used applications, and raw IPS has fallen into disuse.

Arithmetic logic unit digital circuits

An arithmetic logic unit (ALU) is a combinational digital electronic circuit that performs arithmetic and bitwise operations on integer binary numbers. This is in contrast to a floating-point unit (FPU), which operates on floating point numbers. An ALU is a fundamental building block of many types of computing circuits, including the central processing unit (CPU) of computers, FPUs, and graphics processing units (GPUs). A single CPU, FPU or GPU may contain multiple ALUs.

The speed of the execution unit (EU) and the bus of the 8086 CPU was well balanced; with a typical instruction mix, an 8086 could execute instructions out of the prefetch queue a good bit of the time. Cutting down the bus to eight bits made it a serious bottleneck in the 8088. With the speed of instruction fetch reduced by 50% in the 8088 as compared to the 8086, a sequence of fast instructions can quickly drain the four-byte prefetch queue. When the queue is empty, instructions take as long to complete as they take to fetch. Both the 8086 and 8088 take four clock cycles to complete a bus cycle; whereas for the 8086 this means four clocks to transfer two bytes, on the 8088 it is four clocks per byte. Therefore, for example, a two-byte shift or rotate instruction, which takes the EU only two clock cycles to execute, actually takes eight clock cycles to complete if it is not in the prefetch queue. A sequence of such fast instructions prevents the queue from being filled as fast as it is drained, and in general, because so many basic instructions execute in fewer than four clocks per instruction byteincluding almost all the ALU and data-movement instructions on register operands and some of these on memory operandsit is practically impossible to avoid idling the EU in the 8088 at least ¼ of the time while executing useful real-world programs, and it is not hard to idle it half the time. In short, an 8088 typically runs about half as fast as 8086 clocked at the same rate, because of the bus bottleneck (the only major difference).

A side effect of the 8088 design, with the slow bus and the small prefetch queue, is that the speed of code execution can be very dependent on instruction order. When programming the 8088, for CPU efficiency, it is vital to interleave long-running instructions with short ones whenever possible. For example, a repeated string operation or a shift by three or more will take long enough to allow time for the 4-byte prefetch queue to completely fill. If short instructions (i.e. ones totaling few bytes) are placed between slower instructions like these, the short ones can execute at full speed out of the queue. If, on the other hand, the slow instructions are executed sequentially, back to back, then after the first of them the bus unit will be forced to idle because the queue will already be full, with the consequence that later more of the faster instructions will suffer fetch delays that might have been avoidable. As some instructions, such as single-bit-position shifts and rotates, take literally 4 times as long to fetch as to execute, [lower-alpha 3] the overall effect can be a slowdown by a factor of two or more. If those code segments are the bodies of loops, the difference in execution time may be very noticeable on the human timescale.

The 8088 is also (like the 8086) slow at accessing memory. The same ALU that is used to execute arithmetic and logic instructions is also used to calculate effective addresses. There is a separate adder for adding a shifted segment register to the offset address, but the offset EA itself is always calculated entirely in the main ALU. Furthermore, the loose coupling of the EU and BIU (bus unit) inserts communication overhead between the units, and the four-clock period bus transfer cycle is not particularly streamlined. Contrast this with the two-clock period bus cycle of the 6502 CPU and the 80286's three-clock period bus cycle with pipelining down to two cycles for most transfers. Most 8088 instructions that can operate on either registers or memory, including common ALU and data-movement operations, are at least four times slower for memory operands than for only register operands. Therefore, efficient 8088 (and 8086) programs avoid repeated access of memory operands when possible, loading operands from memory into registers to work with them there and storing back only the finished results. The relatively large general register set of the 8088 compared to its contemporaries assists this strategy. When there are not enough registers for all variables that are needed at once, saving registers by pushing them onto the stack and popping them back to restore them is the fastest way to use memory to augment the registers, as the stack PUSH and POP instructions are the fastest memory operations. The same is probably not true on the 80286 and later; they have dedicated address ALUs and perform memory accesses much faster than the 8088 and 8086.

Finally, because calls, jumps, and interrupts reset the prefetch queue, and because loading the IP register requires communication between the EU and the BIU (since the IP register is in the BIU, not in the EU, where the general registers are), these operations are costly. All jumps and calls take at least 15 clock cycles. Any conditional jump requires four clock cycles if not taken, but if taken, it requires 16 cycles in addition to resetting the prefetch queue; therefore, conditional jumps should be arranged to be not taken most of the time, especially inside loops. In some cases, a sequence of logic and movement operations is faster than a conditional jump that skips over one or two instructions to achieve the same result.

Intel datasheets for the 8086 and 8088 advertised the dedicated multiply and divide instructions (MUL, IMUL, DIV, and IDIV), but they are very slow, on the order of 100–200 clock cycles each. Many simple multiplications by small constants (besides powers of 2, for which shifts can be used) can be done much faster using dedicated short subroutines. The 80286 and 80386 each greatly increased the execution speed of these multiply and divide instructions. [lower-alpha 4]

Selection for use in the IBM PC

IBM Personal Computer Ibm pc 5150.jpg
IBM Personal Computer

The original IBM PC was the most influential microcomputer to use the 8088. It used a clock frequency of 4.77 MHz (4/3 the NTSC colorburst frequency). Some of IBM's engineers and other employees wanted to use the IBM 801 processor, some would have preferred the new Motorola 68000, [lower-alpha 5] while others argued for a small and simple microprocessor, such as the MOS Technology 6502 or Zilog Z80, which had been used in earlier personal computers. However, IBM already had a history of using Intel chips in its products and had also acquired the rights to manufacture the 8086 family. [lower-alpha 6]

IBM chose the 8088 over the 8086 because Intel offered a better price for the former and could supply more units. [14] Another factor was that the 8088 allowed the computer to be based on a modified 8085 design, as it could easily interface with most nMOS chips with 8-bit databuses, i.e. existing and mature, and therefore economical, components. This included ICs originally intended for support and peripheral functions around the 8085 and similar processors (not exclusively Intel's), which were already well known by many engineers, further reducing cost. [lower-alpha 7]

The descendants of the 8088 include the 80188, 80186, 80286, 80386, 80486, and later software-compatible processors, which are in use today.

Peripherals

See also

Notes

  1. Specifically, the most obvious change is that the 8088 bus unit will prefetch a byte when it can if at least one byte of the queue is empty; the 8086 bus unit will not prefetch unless at least two of the six queue bytes are empty, so that it can prefetch a whole aligned 16-bit word, which it does in one bus cycle. The 8088, having an 8-bit external data bus, can only fetch one byte per bus cycle, so waiting to prefetch a whole word would have no benefit and would only delay, reducing the chance that the next instruction byte is already in the prefetch queue when it is needed.
  2. ALU stands for one of the instructions ADD, ADC, SUB, SBC, CMP, AND, OR, XOR, TEST.
  3. On the 8088, a shift instruction with an implied shift count of 1, which can execute in two clock cycles, is two bytes long and so takes eight clock cycles to fetch.
  4. Most of the technical information in this section is sourced from the Intel iAPX 86,88 User's Manual, August 1981 (Order Number: 210201-001) by Intel Corporation.
  5. Later used for the IBM Instruments Laboratory Computer.
  6. In exchange for giving Intel the rights to its bubble memory designs. However, due to fierce competition from Japanese manufacturers, who were able to undercut by cost, Intel soon left this market and changed focus to microprocessors.
  7. 68000 components were not widely available at the time, though it could use Motorola 6800 components to an extent.

Related Research Articles

Intel 80286 microprocessor model

The Intel 80286 is a 16-bit microprocessor that was introduced on February 1, 1982. It was the first 8086-based CPU with separate, non-multiplexed address and data buses and also the first with memory management and wide protection abilities. The 80286 used approximately 134,000 transistors in its original nMOS (HMOS) incarnation and, just like the contemporary 80186, it could correctly execute most software written for the earlier Intel 8086 and 8088 processors.

Intel 8080 8-bit microprocessor

The Intel 8080 ("eighty-eighty") was the second 8-bit microprocessor designed and manufactured by Intel and was released in April 1974. It is an extended and enhanced variant of the earlier 8008 design, although without binary compatibility. The initial specified clock rate or frequency limit was 2 MHz, and with common instructions using 4, 5, 7, 10, or 11 cycles this meant that it operated at a typical speed of a few hundred thousand instructions per second. A faster variant 8080A-1 became available later with clock frequency limit up to 3.125 MHz.

Intel 80386 family of 32-bit microprocessors introduced in 1985, including DX, SX and SL models

The Intel 80386, also known as i386 or just 386, is a 32-bit microprocessor introduced in 1985. The first versions had 275,000 transistors and were the CPU of many workstations and high-end personal computers of the time. As the original implementation of the 32-bit extension of the 80286 architecture, the 80386 instruction set, programming model, and binary encodings are still the common denominator for all 32-bit x86 processors, which is termed the i386-architecture, x86, or IA-32, depending on context.

Intel 80486 family of 32-bit microprocessors introduced in 1989, including DX, SX and SL models

The Intel 80486, also known as the i486 or 486, is the successor model of 32-bit x86 microprocessor to the Intel 80386. Introduced in 1989, the 80486 improved on the performance of the 80386DX thanks to on-die L1 cache and floating-point unit, as well as an improved, five-stage tightly-coupled pipelined design. It was the first x86 chip to use more than a million transistors. It represents the fourth generation of binary compatible CPUs since the original 8086 of 1978.

Intel 80186

The Intel 80186, also known as the iAPX 186, or just 186, is a microprocessor and microcontroller introduced in 1982. It was based on the Intel 8086 and, like it, had a 16-bit external data bus multiplexed with a 20-bit address bus. It was also available as the 80188, with an 8-bit external data bus.

Microcode is a computer hardware technique that interposes a layer of organisation between the CPU hardware and the programmer-visible instruction set architecture of the computer. As such, the microcode is a layer of hardware-level instructions that implement higher-level machine code instructions or internal state machine sequencing in many digital processing elements. Microcode is used in general-purpose central processing units, although in current desktop CPUs it is only a fallback path for cases that the faster hardwired control unit cannot handle.

x86 type of instruction set architecture

x86 is a family of instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was introduced in 1978 as a fully 16-bit extension of Intel's 8-bit 8080 microprocessor, with memory segmentation as a solution for addressing more memory than can be covered by a plain 16-bit address. The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186, 80286, 80386 and 80486 processors.

Zilog Z80 8-bit microprocessor

The Z80 is an 8-bit microprocessor introduced by Zilog as the startup company's first product. The Z80 was conceived by Federico Faggin in late 1974 and developed by him and his 11 employees starting in early 1975. The first working samples were delivered in March 1976, and it was officially introduced on the market in July 1976. With the revenue from the Z80, the company built its own chip factories and grew to over a thousand employees over the following two years.

In computer architecture, 32-bit integers, memory addresses, or other data units are those that are 32 bits wide. Also, 32-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 32-bit microcomputers are computers in which 32-bit microprocessors are the norm.

Am386 processor

The Am386 CPU is a 100%-compatible clone of the Intel 80386 design released by AMD in 1991. It sold millions of units, positioning AMD as a legitimate competitor to Intel, rather than being merely a second source for x86 CPUs.

Intel iAPX 432

The iAPX 432 was a computer architecture introduced in 1981. It was Intel's first 32-bit processor design. The main processor of the architecture, the general data processor, was implemented as a set of two separate integrated circuits, due to technical limitations at the time. Although some early 8086, 80186 and 80286-based systems and manuals also used the iAPX prefix for marketing reasons, the iAPX 432 and the 8086 processor lines are completely separate designs with completely different instruction sets.

NEC V20 microprocessor model

The NEC V20 (μPD70108) was a processor made by NEC that was a reverse-engineered, pin-compatible version of the Intel 8088 with an instruction set compatible with the Intel 80186. The V20 was introduced in 1982, and the V30 debuted in 1983.

Intel 8087

The Intel 8087, announced in 1980, was the first x87 floating-point coprocessor for the 8086 line of microprocessors.

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The megahertz myth, or less commonly the gigahertz myth, refers to the misconception of only using clock rate to compare the performance of different microprocessors. While clock rates are a valid way of comparing the performance of different speeds of the same model and type of processor, other factors such as an amount of execution units, pipeline depth, cache hierarchy, branch prediction, and instruction sets can greatly affect the performance when considering different processors. For example, one processor may take two clock cycles to add two numbers and another clock cycle to multiply by a third number, whereas another processor may do the same calculation in two clock cycles. Comparisons between different types of processors are difficult because performance varies depending on the type of task. A benchmark is a more thorough way of measuring and comparing computer performance.

The history of general-purpose CPUs is a continuation of the earlier history of computing hardware.

Each time Intel launched a new microprocessor, they simultaneously provided a System Development Kit (SDK) allowing engineers, university students, and others to familiarise themselves with the new processor's concepts and features. The SDK single-board computers allowed the user to enter object code from a keyboard or upload it through a communication port, and then test run the code. The SDK boards provided a system monitor ROM to operate the keyboard and other interfaces. Kits varied in their specific features but generally offered optional memory and interface configurations, a serial terminal link, audio cassette storage, EPROM program memory. Intel's Intellec development system could download code to the SDK boards.

In computer architecture, 16-bit integers, memory addresses, or other data units are those that are 16 bits wide. Also, 16-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 16-bit microcomputers are computers in which 16-bit microprocessors were the norm.

References

  1. CPU History – The CPU Museum – Life Cycle of the CPU.
  2. "iAPX 86, iAPX 88 user's manual" (PDF).
  3. "iAPX 86, 88, 186 Microprocessors Part I, Workshop Notebook" (PDF). June 1984.
  4. "iAPX 286 Programmers' Reference Manual" (PDF). 1983. page 1-1.
  5. "Microprocessor Quick Reference Guide". Intel. Intel. Retrieved 1 June 2019.
  6. "Microprocessor Quick Reference Guide". Intel. Intel. Retrieved 1 June 2019.
  7. Singh, Renu (2006). Microprocessor Interfacing and Applications. New Age International. pp. 2–27. ISBN   81-224-1400-1 . Retrieved 1 June 2019.
  8. Govindarajalu, B. (2002). IBM PC and Clones: Hardware, Troubleshooting and Maintenance (2nd ed.). McGraw-Hill. p. 248. ISBN   978-0-07-048286-9 . Retrieved 1 June 2019.
  9. The Israel Test, Encounter Books, 10 Oct 2013, George F. Gilder, page 100.
  10. "Commodore Adds Hyperion, Chips".
  11. "Intel Brings Out 8-Bit MPU featuring 16-Bit Architecture". Computerworld. 14 May 1979. p. 71. Retrieved 21 November 2011.
  12. 1 2 Osborne 16 bit Processor Handbook (Adam Osborne & Gerry Kane) ISBN   0-931988-43-8.
  13. "Olympus MIC-D: Integrated Circuit Gallery - Intel 8088 Microprocessor". Archived from the original on May 19, 2009.
  14. Freiberger, Paul (1982-08-23). "Bill Gates, Microsoft and the IBM Personal Computer". InfoWorld. p. 22. Retrieved 29 January 2015.
  15. 8086 Available for industrial environment, Intel Preview Special Issue: 16-Bit Solutions, Intel Corporation, May/June 1980, page 29.