|Launched||May 7, 1997|
|Discontinued||December 26, 2003|
|Max. CPU clock rate||233 MHz to 450 MHz|
|FSB speeds||66 MHz to 100 MHz|
|Architecture and classification|
|Min. feature size||0.35 μm to 0.18 μm|
|Products, models, variants|
|Predecessor||Pentium, Pentium Pro|
The Pentium II KB L2 cache), the Pentium II featured an improved version of the first P6-generation core of the Pentium Pro, which contained 5.5 million transistors. However, its L2 cache subsystem was a downgrade when compared to the Pentium Pros.brand refers to Intel's sixth-generation microarchitecture ("P6") and x86-compatible microprocessors introduced on May 7, 1997. Containing 7.5 million transistors (27.4 million in the case of the mobile Dixon with 256
In 1998, Intel stratified the Pentium II family by releasing the Pentium II-based Celeron line of processors for low-end workstations and the Pentium II Xeon line for servers and high-end workstations. The Celeron was characterized by a reduced or omitted (in some cases present but disabled) on-die full-speed L2 cache and a 66 MT/s FSB. The Xeon was characterized by a range of full-speed L2 cache (from 512 KB to 2048 KB), a 100 MT/s FSB, a different physical interface (Slot 2), and support for symmetric multiprocessing.
In February 1999, the Pentium II was replaced by the nearly identical Pentium III, which only added the then-new SSE instruction set. However, the older family would continue to be produced until June 2001 for desktop units,September 2001 for mobile units, and the end of 2003 for embedded devices.
The Pentium II microprocessor was largely based upon the microarchitecture of its predecessor, the Pentium Pro, but with some significant improvements.
Unlike previous Pentium and Pentium Pro processors, the Pentium II CPU was packaged in a slot-based module rather than a CPU socket. The processor and associated components were carried on a daughterboard similar to a typical expansion board within a plastic cartridge. A fixed or removable heatsink was carried on one side, sometimes using its own fan.
This larger package was a compromise allowing Intel to separate the secondary cache from the processor while still keeping it on a closely coupled back-side bus. The L2 cache ran at half the processor's clock frequency, unlike the Pentium Pro, whose off die L2 cache ran at the same frequency as the processor. However, its associativity was increased to 16-way (compared to 4-way on the Pentium Pro) and its size was always 512 KB, twice of the smallest option of 256 KB on the Pentium Pro. Off-package cache solved the Pentium Pro's low yield issues, allowing Intel to introduce the Pentium II at a mainstream price level.
Intel improved 16-bit code execution performance on the Pentium II, an area in which the Pentium Pro was at a notable handicap, by adding segment register caches. Most consumer software of the day was still using at least some 16-bit code, because of a variety of factors. The issues with partial registers was also addressed by adding an internal flag to skip pipeline flushes whenever possible. KB of L1 cache, double that of the Pentium Pro, as well as 4 write buffers (vs. 2 on the Pentium Pro); these can also be used by either pipeline, instead of each one being fixed to one pipeline. The Pentium II was also the first P6-based CPU to implement the Intel MMX integer SIMD instruction set which had already been introduced on the Pentium MMX.To compensate for the slower L2 cache, the Pentium II featured 32
The Pentium II was basically a more consumer-oriented version of the Pentium Pro. It was cheaper to manufacture because of the separate, slower L2 cache memory. The improved 16-bit performance and MMX support made it a better choice for consumer-level operating systems, such as Windows 9x, and multimedia applications. The slower and cheaper L2 cache's performance penalty was mitigated by the doubled L1 cache and architectural improvements for legacy code. General processor performance was increased while costs were cut.
All Klamath and some early Deschutes Pentium IIs use a combined L2 cache controller / tag RAM chip that only allows for 512 MB to be cached; while more RAM could be installed in theory, this would result in very slow performance. While this limit was practically irrelevant for the average home user at the time, it was a concern for some workstation or server users. Presumably, Intel put this limitation deliberately in place to distinguish the Pentium II from the more upmarket Pentium Pro line, which has a full 4 GB cacheable area. The '82459AD' revision of the chip on some 333 MHz and all 350 MHz and faster Pentium IIs lifted this restriction and also offered a full 4 GB cacheable area.
The original Klamath Pentium II microprocessor (Intel product code 80522) ran at 233, 266, and 300 MHz and was produced in a 0.35 μm process. The 300 MHz version, however, only became available in quantities later in 1997. These CPUs had a 66 MHz front-side bus and were initially used on motherboards equipped with the aging Intel 440FX Natoma chipset designed for the Pentium Pro. Pentium II-based systems using the Intel 440LX Balboa chipset widely popularized SDRAM (which was to replace EDO RAM and was already introduced with 430VX), and the AGP graphics bus.
On July 14, 1997, Intel announced a version of the Pentium II Klamath with 2× 72-bit ECC L2 cache for entry-level servers, as opposed to the 2× 64-bit non-ECC L2 cache on regular models.The extra bits give it error-correction capability built into hardware, without impacting performance. The variant can be determined through the CPU part number.
In Intel's "Family/Model/Stepping" scheme, Klamath CPUs are family 6, model 3.
The Deschutes core Pentium II (80523), which debuted at 333 MHz in January 1998, was produced with a 0.25 μm process and has a significantly lower power draw. The die size is 113 mm2. The 333 MHz variant was the final Pentium CPU that used the older 66 MHz front-side bus; all subsequent Deschutes-core models used a 100 MHz FSB. Later in 1998, Pentium IIs running at 266, 300, 350, 400, and 450 MHz were also released. The Deschutes core introduced FXSAVE and FXRSTOR instructions for fast FPU context save and restore. Towards the end of its design life, Deschutes chips capable of 500 MHz within Intel cooling and design specifications were produced. However, these were not marketed. Rather than destroy already multiplier-locked units, those Deschutes units that had been tested and locked with a multiplier of 5 were sold as being 333 MHz. This was accomplished by disabling the 100 MHz bus option. Overclockers, upon learning of this, purchased the units in question and ran them well over 500 MHz; most notably, when overclocking, the final batch of "333 MHz" CPUs were capable of speeds much higher than CPUs sold at 350, 400, or 450 MHz.[ citation needed ]
Concurrent with the release of Deschutes cores supporting a 100 MHz front-side bus was Intel's release of the 440BX Seattle chipset and its derivatives, the 440MX, 450NX, and 440ZX chipsets. Replacing the aged 66 MHz FSB, which had been on the market since 1993, the 100 MHz FSB resulted in solid performance improvements for the Pentium II lineup. Pentium II chips starting with 350 MHz were released in both SECC and SECC2 form factors. Late Pentium IIs also marked the switch to flip-chip based packaging with direct heatsink contact to the die, as opposed to traditional bonding.
While Klamath features 4 cache chips and simulates dual-porting through interleaving (2x 64-bit) for a slight performance improvement on concurrent accesses, Deschutes only sports 2 cache chips and offers slightly lower L2 cache performance at the same clockspeed. Furthermore, Deschutes always features ECC-enabled L2 cache.
The Pentium II Xeon was a high-end version of Deschutes core intended for use on workstations and servers. Principally, it used a different type of slot (Slot 2), case, board design, and more expensive full-speed custom L2 cache, which was off-die. Versions were produced with 512 KB, 1 MB or 2 MB L2 caches by varying the number of 512 KB chips incorporated on the board.
In Intel's "Family/Model/Stepping" scheme, Deschutes CPUs are family 6, model 5 and have the part number 80523.
In 1998, the 0.25 μm Deschutes core was utilized in the creation of the Pentium II Overdrive processor, which was aimed at allowing corporate Pentium Pro users to upgrade their aging servers. Combining the Deschutes core in a flip-chip package with a 512 KB full-speed L2 cache chip from the Pentium II Xeon into a Socket 8-compatible module resulted in a 300 or 333 MHz processor that could run on a 60 or 66 MHz front-side bus. This combination brought together some of the more attractive aspects of the Pentium II and the Pentium II Xeon: MMX support/improved 16-bit performance and full-speed L2 cache, respectively. The later "Dixon" mobile Pentium II would emulate this combination with 256 KB of full-speed cache.
In Intel's "Family/Model/Stepping" scheme, the Pentium II OverDrive CPU identifies itself as family 6, model 3, though this is misleading, as it is not based on the family 6/model 3 Klamath core. As mentioned in the Pentium II Processor update documentation from Intel, "although this processor has a CPUID of 163xh, it uses a Pentium II processor CPUID 065xh processor core."
The 0.25 μm Tonga core was the first mobile Pentium II and had all of the features of the desktop models.
In Intel's "Family/Model/Stepping" scheme, Tonga CPUs are family 6, model 5.
Later, in 1999, the 0.25; 0.18 (400 MHz) μm Dixon core with 256 KB of on-die full speed cache was produced for the mobile market. Reviews showed that the Dixon core was the fastest type of Pentium II produced.
In Intel's "Family/Model/Stepping" scheme, Dixon CPUs are family 6, model 6 and their Intel product code is 80524. These identifiers are shared with the Mendocino Celeron processors.
Mobile Pentium II
Mobile Pentium II PE ("Performance Enhanced")
Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD). The original Athlon was the first seventh-generation x86 processor and was the first desktop processor to reach speeds of one gigahertz (GHz). It made its debut as AMD's high-end processor brand on June 23, 1999. Over the years AMD has used the Athlon name with the 64-bit Athlon 64 architecture, the Athlon II, and Accelerated Processing Unit (APU) chips targeting the Socket AM1 desktop SoC architecture, and Socket AM4 Zen microarchitecture. The modern Zen-based Athlon with a Radeon Graphics processor was introduced in 2019 as AMD's highest-performance entry-level processor.
Duron is a line of budget x86-compatible microprocessors manufactured by AMD. Released on June 19, 2000 as a lower-cost offering to complement AMD's then mainstream performance Athlon processor line, it also competed with rival chipmaker Intel's Pentium III and Celeron processor offerings. The Duron brand name was retired in 2004, succeeded by the Sempron line of processors as AMD's budget offering.
Celeron is Intel's brand name for low-end IA-32 and x86-64 computer microprocessor models targeted at low-cost personal computers.
The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors. The most notable differences were the addition of the Streaming SIMD Extensions (SSE) instruction set, and the introduction of a controversial serial number embedded in the chip during manufacturing.
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel and introduced on November 1, 1995. It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors, respectively, the Pentium Pro contained 5.5 million transistors. Later, it was reduced to a more narrow role as a server and high-end desktop processor and was used in supercomputers like ASCI Red, the first computer to reach the trillion floating point operations per second (teraFLOPS) performance mark. The Pentium Pro was capable of both dual- and quad-processor configurations. It only came in one form factor, the relatively large rectangular Socket 8. The Pentium Pro was succeeded by the Pentium II Xeon in 1998.
The Pentium OverDrive was a microprocessor marketing brand name used by Intel, to cover a variety of consumer upgrade products sold in the mid-1990s. It was originally released for 486 motherboards, and later some Pentium sockets. Intel dropped the brand, as it failed to appeal to corporate buyers, and discouraged new system sales.
The Athlon 64 is an eighth-generation, AMD64-architecture microprocessor produced by AMD, released on September 23, 2003. It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP. The second processor to implement the AMD64 architecture and the first 64-bit processor targeted at the average consumer, it was AMD's primary consumer microprocessor, and primarily competed with Intel's Pentium 4, especially the "Prescott" and "Cedar Mill" core revisions. It is AMD's first K8, eighth-generation processor core for desktop and mobile computers. Despite being natively 64-bit, the AMD64 architecture is backward-compatible with 32-bit x86 instructions. Athlon 64s have been produced for Socket 754, Socket 939, Socket 940 and Socket AM2. The line was succeeded by the dual-core Athlon 64 X2 and Athlon X2 lines.
Xeon is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Quick Path Interconnect (QPI) bus.
The K6-III was an x86 microprocessor line manufactured by AMD that launched on February 22, 1999. The launch consisted of both 400 and 450 MHz models and was based on the preceding K6-2 architecture. Its improved 256 KB on-chip L2 cache gave it significant improvements in system performance over its predecessor the K6-2. The K6-III was the last processor officially released for desktop Socket 7 systems, however later mobile K6-III+ and K6-2+ processors could be run unofficially in certain socket 7 motherboards if an updated BIOS was made available for a given board.
Slot 2 refers to the physical and electrical specification for the 330-lead Single Edge Contact Cartridge used by some of Intel's Pentium II Xeon and certain models of the Pentium III Xeon.
The NetBurst microarchitecture, called P68 inside Intel, was the successor to the P6 microarchitecture in the x86 family of central processing units (CPUs) made by Intel. The first CPU to use this architecture was the Willamette-core Pentium 4, released on November 20, 2000 and the first of the Pentium 4 CPUs; all subsequent Pentium 4 and Pentium D variants have also been based on NetBurst. In mid-2004, Intel released the Foster core, which was also based on NetBurst, thus switching the Xeon CPUs to the new architecture as well. Pentium 4-based Celeron CPUs also use the NetBurst architecture.
Sempron has been the marketing name used by AMD for several different budget desktop CPUs, using several different technologies and CPU socket formats. The Sempron replaced the AMD Duron processor and competed against Intel's Celeron series of processors. AMD coined the name from the Latin semper, which means "always", to suggest the Sempron is suitable for "daily use, practical, and part of everyday life". The last Semprons were launched in April 2014. The brand was retired with the launch of the AMD A-Series APUs.
The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is frequently referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M line of microprocessors. The successor to the Pentium M variant of the P6 microarchitecture is the Core microarchitecture which in turn is also derived from the P6 microarchitecture.
Pentium is a brand used for a series of x86 architecture-compatible microprocessors produced by Intel. The original Pentium was released in 1993. After that, the Pentium II and Pentium III were released.
Conroe is the code name for many Intel processors sold as Core 2 Duo, Xeon, Pentium Dual-Core and Celeron. It was the first desktop processor to be based on the Core microarchitecture, replacing the NetBurst microarchitecture based Cedar Mill processor. It has product code 80557, which is shared with Allendale and Conroe-L that are very similar but have a smaller L2 cache. Conroe-L has only one processor core and a new CPUID model. The mobile version of Conroe is Merom, the dual-socket server version is Woodcrest, and the quad-core desktop version is Kentsfield. Conroe was replaced by the 45 nm Wolfdale processor.