|Max. CPU clock rate||1.06 GHz to 3.33 GHz|
|FSB speeds||533 MT/s to 1600 MT/s|
|L1 cache||64 KB per core|
|L2 cache||3 MB to 12 MB unified|
|L3 cache||8 MB to 16 MB shared (Xeon)|
|Architecture and classification|
|Architecture||Intel Core x86|
|Products, models, variants|
In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23. In Core 2 processors, it is used with the code names Penryn (Socket P), Wolfdale (LGA 775) and Yorkfield (MCM, LGA 775), some of which are also sold as Celeron, Pentium and Xeon processors. In the Xeon brand, the Wolfdale-DP and Harpertown code names are used for LGA 771 based MCMs with two or four active Wolfdale cores.
Architectural improvements over 65-nanometer Core 2 CPUs include a new divider with reduced latency, a new shuffle engine, and SSE4.1 instructions (some of which are enabled by the new single-cycle shuffle engine).
Maximum L2 cache size per chip was increased from 4 to 6 MB, with L2 associativity increased from 16-way to 24-way. Cut-down versions with 3 MB L2 also exist, which are commonly called Penryn-3M and Wolfdale-3M as well as Yorkfield-6M, respectively. The single-core version of Penryn, listed as Penryn-L here, is not a separate model like Merom-L but a version of the Penryn-3M model with only one active core.
|Processor||Brand name||Model (list)||Cores||L2 Cache||Socket||TDP|
|Penryn-L||Core 2 Solo||SU3xxx||1||3 MB||BGA956||5.5 W|
|Penryn-3M||Core 2 Duo||SU7xxx||2||3 MB||BGA956||10 W|
|Penryn||SL9xxx||6 MB||17 W|
|Penryn-3M||P7xxx||3 MB|| Socket P |
|Penryn-3M||T6xxx||2 MB||35 W|
|E8x35||6 MB||Socket P||35-55 W|
|Penryn-QC||Core 2 Quad||Q9xxx||4||2x3-2x6 MB||Socket P||45 W|
|Penryn XE||Core 2 Extreme||X9xxx||2||6 MB||Socket P||44 W|
|Penryn-QC||QX9xxx||4||2x6 MB||45 W|
|Penryn-3M||Celeron||T3xxx||2||1 MB||Socket P||35 W|
|SU2xxx||µFC-BGA 956||10 W|
|Penryn-L||9x0||1||1 MB||Socket P||35 W|
|7x3||µFC-BGA 956||10 W|
|Penryn-3M||Pentium||T4xxx||2||1 MB||Socket P||35 W|
|SU4xxx||2 MB||µFC-BGA 956||10 W|
|Celeron||E3xxx||2||1 MB||LGA 775||65 W|
|Core 2 Duo||E7xxx||3 MB|
|Wolfdale-CL||30x4||1||LGA 771||30 W|
|Yorkfield||Xeon||X33x0||4||2×3–2×6 MB||LGA 775||65–95 W|
|Yorkfield-CL||X33x3||LGA 771||80 W|
|Yorkfield-6M||Core 2 Quad||Q8xxx||2×2 MB||LGA 775||65–95 W|
|Yorkfield XE||Core 2 Extreme||QX9xxx||2×6 MB||130–136 W|
|QX9xx5||LGA 771||150 W|
|Wolfdale-DP||Xeon||E52xx||2||6 MB||LGA 771||65 W|
|Harpertown||E54xx||4||2×6 MB||LGA 771||80 W|
The processors of the Core microarchitecture can be categorized by number of cores, cache size, and socket; each combination of these has a unique code name and product code that is used across a number of brands. For instance, code name "Allendale" with product code 80557 has two cores, 2 MB L2 cache and uses the desktop socket 775, but has been marketed as Celeron, Pentium, Core 2 and Xeon, each with different sets of features enabled. Most of the mobile and desktop processors come in two variants that differ in the size of the L2 cache, but the specific amount of L2 cache in a product can also be reduced by disabling parts at production time. Wolfdale-DP and all quad-core processors except Dunnington QC are multi-chip modules combining two dies. For the 65 nm processors, the same product code can be shared by processors with different dies, but the specific information about which one is used can be derived from the stepping.
|fab||cores||Mobile||Desktop, UP Server||CL Server||DP Server||MP Server|
|Single-Core 45 nm||45 nm||1|| Penryn-L |
| Wolfdale-CL |
|Dual-Core 45 nm||45 nm||2|| Penryn-3M |
| Penryn |
| Wolfdale-3M |
| Wolfdale |
| Wolfdale-CL |
| Wolfdale-DP |
|Quad-Core 45 nm||45 nm||4|| Penryn-QC |
| Yorkfield-6M |
| Yorkfield |
| Yorkfield-CL |
| Harpertown |
| Dunnington QC |
|Six-Core 45 nm||45 nm||6|| Dunnington |
|Mobile (Penryn)||Desktop (Wolfdale)||Desktop (Yorkfield)||Server (Wolfdale-DP, Harpertown, Dunnington)|
|Stepping||Released||Area||CPUID||L2 cache||Max. clock||Celeron||Pentium||Core 2||Celeron||Pentium||Core 2||Xeon||Core 2||Xeon||Xeon|
|C0||Nov 2007||107 mm²||10676||6 MB||3.00 GHz||E8000 P7000 T8000 T9000 P9000 SP9000 SL9000 X9000||E8000||3100||QX9000||5200 5400|
|M0||Mar 2008||82 mm²||10676||3 MB||2.40 GHz||7xx||SU3000 P7000 P8000 T8000 SU9000||E5000 E2000||E7000|
|C1||Mar 2008||107 mm²||10677||6 MB||3.20 GHz||Q9000 QX9000||3300|
|M1||Mar 2008||82 mm²||10677||3 MB||2.50 GHz||Q8000 Q9000||3300|
|E0||Aug 2008||107 mm²||1067A||6 MB||3.33 GHz||T9000 P9000 SP9000 SL9000 Q9000 QX9000||E8000||3100||Q9000 Q9000S QX9000||3300||5200 5400|
|R0||Aug 2008||82 mm²||1067A||3 MB||2.93 GHz||7xx 900 SU2000 T3000||T4000 SU2000 SU4000||SU3000 T6000 SU7000 P8000 SU9000||E3000||E5000 E6000||E7000||Q8000 Q8000S Q9000 Q9000S||3300|
|A1||Sep 2008||503 mm²||106D1||3 MB||2.67 GHz||7400|
In the model 23 (cpuid 01067xh), Intel started marketing stepping with full (6 MB) and reduced (3 MB) L2 cache at the same time, and giving them identical cpuid values. All steppings have the new SSE4.1 instructions. Stepping C1/M1 was a bug fix version of C0/M0 specifically for quad core processors and only used in those. Stepping E0/R0 adds two new instructions (XSAVE/XRSTOR) and replaces all earlier steppings.
In mobile processors, stepping C0/M0 is only used in the Intel Mobile 965 Express (Santa Rosa refresh) platform, whereas stepping E0/R0 supports the later Intel Mobile 4 Express (Montevina) platform.
Model 29 stepping A1 (cpuid 106d1h) adds an L3 cache as well as six instead of the usual two cores, which leads to an unusually large die size of 503 mm². As of February 2008, it has only found its way into the very high-end Xeon 7400 series (Dunnington).
Celeron is a brand name given by Intel to a number of different low-end IA-32 and x86-64 computer microprocessor models targeted at low-cost personal computers.
Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 2000 until May 21, 2010.
The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors. The most notable differences were the addition of the Streaming SIMD Extensions (SSE) instruction set, and the introduction of a controversial serial number embedded in the chip during manufacturing.
Xeon is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Quick Path Interconnect (QPI) bus.
The NetBurst microarchitecture, called P68 inside Intel, was the successor to the P6 microarchitecture in the x86 family of central processing units (CPUs) made by Intel. The first CPU to use this architecture was the Willamette-core Pentium 4, released on November 20, 2000 and the first of the Pentium 4 CPUs; all subsequent Pentium 4 and Pentium D variants have also been based on NetBurst. In mid-2004, Intel released the Foster core, which was also based on NetBurst, thus switching the Xeon CPUs to the new architecture as well. Pentium 4-based Celeron CPUs also use the NetBurst architecture.
The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is frequently referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M line of microprocessors. The successor to the Pentium M variant of the P6 microarchitecture is the Core microarchitecture which in turn is also derived from the P6 microarchitecture.
The Intel Core microarchitecture is a multi-core processor microarchitecture unveiled by Intel in Q1 2006. It is based on the Yonah processor design and can be considered an iteration of the P6 microarchitecture introduced in 1995 with Pentium Pro. High power consumption and heat intensity, the resulting inability to effectively increase clock rate, and other shortcomings such as an inefficient pipeline were the primary reasons why Intel abandoned the NetBurst microarchitecture and switched to a different architectural design, delivering high efficiency through a small pipeline rather than high clock rates. The Core microarchitecture initially did not reach the clock rates of the NetBurst microarchitecture, even after moving to 45 nm lithography. However after many generations of successor microarchitectures which used Core as their basis, Intel managed to eventually surpass the clock rates of Netburst with the Devil's Canyon microarchitecture reaching a base frequency of 4 GHz and a maximum tested frequency of 4.4 GHz using 22 nm lithography.
Pentium is a brand used for a series of x86 architecture-compatible microprocessors produced by Intel since 1993. In their form as of November 2011, Pentium processors are considered entry-level products that Intel rates as "two stars", meaning that they are above the low-end Atom and Celeron series, but below the faster Intel Core lineup, and workstation Xeon series.
LGA 771, also known as Socket J, is a CPU interface introduced by Intel in 2006. It is used in Intel Core microarchitecture and NetBurst microarchitecture(Dempsey) based DP-capable server processors, the Dual-Core Xeon is codenamed Dempsey, Woodcrest, and Wolfdale and the Quad-Core processors Clovertown, Harpertown, and Yorkfield-CL. It is also used for the Core 2 Extreme QX9775.
Nehalem is the codename for an Intel processor microarchitecture released in November 2008. Nehalem was used in the first generation of the Intel Core processors. Nehalem is the successor to the older Core microarchitecture.
Conroe is the code name for many Intel processors sold as Core 2 Duo, Xeon, Pentium Dual-Core and Celeron. It was the first desktop processor to be based on the Core microarchitecture, replacing the NetBurst microarchitecture based Cedar Mill processor. It has product code 80557, which is shared with Allendale and Conroe-L that are very similar but have a smaller L2 cache. Conroe-L has only one processor core and a new CPUID model. The mobile version of Conroe is Merom, the dual-socket server version is Woodcrest, and the quad-core desktop version is Kentsfield. Conroe was replaced by the 45 nm Wolfdale processor.
Merom is the code name for various Intel processors that are sold as Core 2 Duo, Core 2 Solo, Pentium Dual-Core and Celeron. It was the first mobile processor to be based on the Core microarchitecture, replacing the Enhanced Pentium M-based Yonah processor. Merom has the product code 80537, which is shared with Merom-2M and Merom-L that are very similar but have a smaller L2 cache. Merom-L has only one processor core and a different CPUID model. The desktop version of Merom is Conroe and the dual-socket server version is Woodcrest. Merom was manufactured in a 65 nanometer process, and was succeeded by Penryn, a 45 nm version of the Merom architecture. Together, Penryn and Merom represented the first 'tick-tock' in Intel's Tick-Tock manufacturing paradigm, in which Penryn was the 'tick' to Merom's 'tock'.
Penryn is the code name of a processor from Intel that is sold in varying configurations as Core 2 Solo, Core 2 Duo, Core 2 Quad, Pentium and Celeron.
Wolfdale is the code name for a processor from Intel that is sold in varying configurations as Core 2 Duo, Celeron, Pentium and Xeon. In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was Penryn microarchitecture, the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23. This replaced the Conroe processor with Wolfdale.
Yorkfield is the code name for some Intel processors sold as Core 2 Quad and Xeon. In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was Penryn microarchitecture, the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23, replacing Kentsfield, the previous model.
Lynnfield is the code name for a quad-core processor from Intel released in September 2009. It was sold in varying configurations as Core i5-7xx, Core i7-8xx or Xeon X34xx. Lynnfield uses the Nehalem microarchitecture and replaces the earlier Penryn based Yorkfield processor, using the same 45 nm process technology, but with a new memory and bus interface. The product code for Lynnfield is 80605, its CPUID value identifies it as family 6, model 30 (0106Ex).
Intel Core are streamlined midrange consumer, workstation and enthusiast computers central processing units (CPU) marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level, and bumping the Celeron series of processors to the low end. Identical or more capable versions of Core processors are also sold as Xeon processors for the server and workstation markets.
Clarkdale is the code name for an Intel processor, initially sold as desktop Intel Core i5 and Core i3 and Pentium. It is closely related to the mobile Arrandale processor; both use dual-core dies based on the Westmere 32 nm die shrink of the Nehalem microarchitecture, and have integrated Graphics as well as PCI Express and DMI links.
Broadwell is the fifth generation of the Intel Core Processor. It's Intel's codename for the 14 nanometer die shrink of its Haswell microarchitecture. It is a "tick" in Intel's tick–tock principle as the next step in semiconductor fabrication. Like some of the previous tick-tock iterations, Broadwell did not completely replace the full range of CPUs from the previous microarchitecture (Haswell), as there were no low-end desktop CPUs based on Broadwell.