Tejas was a code name for Intel's microprocessor, which was to be a successor to the latest Pentium 4 with the Prescott core and was sometimes referred to as Pentium V. [1] Jayhawk was a code name for its Xeon counterpart. The cancellation of the processors in May 2004 underscored Intel's historical transition of its focus on single-core processors to multi-core processors.
In early 2003, Intel showed Tejas and a plan to release it sometime in 2004 with possible delays into 2005. Its development however, was cancelled on May 7, 2004. [2] Analysts attribute these issues to heat and power consumption problems due to Intel's goal of reaching ever higher clock speeds, at the detriment of work done per clock (and therefore performance per clock). This was already the case with Prescott and its mediocre performance increase over Northwood despite higher clock speeds, not to mention heavy competition from Advanced Micro Devices with their Athlon 64. Prescott was supposed to attain >5 GHz speeds with ease, yet this was not possible due to physical limitations such as heat generated and power consumed at ambient temperatures. Tejas went even further ahead with this paradigm, with Intel targeting 10 GHz clock speeds by 2011 trying to fulfill the prediction made by Andrew Grove in his keynote speech at the 1996 COMDEX/Fall [3] . Soon enough it was clear this represented a dead end.
This cancellation reflected Intel's intention to focus on dual-core chips for the Itanium platform. With respect to desktop processors, Intel's development efforts shifted to the Pentium M microarchitecture (itself a derivative of the P6 microarchitecture last used in the Pentium III) used in the Centrino notebook platform, which offered greatly improved performance per watt compared to Prescott and other NetBurst designs. The result of modernizing the P6 microarchitecture was the Core processor line, and later the Core 2 line, offering Intel's first native dual core products for desktops and laptops while regaining the performance crown [4] back from AMD.
This defined the end for the NetBurst architecture, with Core setting the foundation and path for power efficient architectures that followed along the Tick–tock model. Although NetBurst was a dead end for the company, its concepts were later reused and repurposed [5] in Sandy Bridge.
To bridge the gap left by Tejas' cancellation in the x86 market, Intel did one last revision to NetBurst, codenamed Cedar Mill (single core) and Presler (dual core).
Tejas and Jayhawk were to make several improvements on the Pentium 4's NetBurst microarchitecture. Tejas was originally to be built on a 90 nm process, later moving to a 65 nm process. The 90 nm version of the processor was reported to have 1 MB L2 cache, while the 65 nm chip would increase the cache to 2 MB. There was also to be a dual core version of Tejas called Cedarmill (or Cedar Mill depending on the source). This Cedarmill should not be confused with the 65 nm Cedar Mill-based Pentium 4, which appears to be what the codename was recycled for.
The trace cache capacity would likely have been increased, and the number of pipeline stages was increased to between 40 and 50 stages. [6] There would have been an improved version of Hyper-Threading, as well as a new version of SSE, which was later backported to the Intel Core 2 series and named SSSE3. Tejas was slated to operate at frequencies of 7 GHz [1] or higher. However, it's likely that Tejas wouldn't have had linear performance scaling, as it would on average have executed fewer instructions per clock cycle due to more pipeline bubbles from branch mispredicts and data cache misses. Also, it would have run hotter as well with a TDP much higher than the Prescott core of Pentium 4. The CPU was cancelled late in its development after it had reached its tapeout phase. [6]
Initial claims reported early samples of single core 90 nm Tejas running at 2.8 GHz and rated for 150 W TDP on the LGA 775 socket, [7] a notable increase over single core 90 nm Prescott (Pentium 4 521, 2.8 GHz, 84 W TDP) [8] and higher than 90 nm dual core Smithfield (Pentium D 820, 2.8 GHz, 95 W TDP). [9] In contrast, 65 nm dual core Core 2 Duo processors had a maximum of 65 W TDP (E6850, 3.00 GHz) [10] while being much more efficient with markedly higher performance per clock.
However, the existence of engineering samples have been challenged and no source indicates that tape-out of Tejas ever existed - the sample shown in the AnandTech article [7] being a Prescott B0 ES. [11] Most probably only thermal samples of Tejas were produced.
Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by AMD. The original Athlon was the first seventh-generation x86 processor and the first desktop processor to reach speeds of one gigahertz (GHz). It made its debut as AMD's high-end processor brand on June 23, 1999. Over the years AMD has used the Athlon name with the 64-bit Athlon 64 architecture, the Athlon II, and Accelerated Processing Unit (APU) chips targeting the Socket AM1 desktop SoC architecture, and Socket AM4 Zen (microarchitecture). The modern Zen-based Athlon with a Radeon Graphics processor was introduced in 2019 as AMD's highest-performance entry-level processor.
Celeron is a series of IA-32 and x86-64 computer microprocessors targeted at low-cost personal computers, manufactured by Intel from 1998 until 2023.
Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. All Pentium 4 CPUs are based on the NetBurst microarchitecture, the successor to the P6.
The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile CPUs based on the sixth-generation P6 microarchitecture introduced on February 28, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded processors. The most notable differences were the addition of the Streaming SIMD Extensions (SSE) instruction set, and the introduction of a controversial serial number embedded in the chip during manufacturing.
The Athlon 64 is a ninth-generation, AMD64-architecture microprocessor produced by Advanced Micro Devices (AMD), released on September 23, 2003. It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP. The Athlon 64 was the second processor to implement the AMD64 architecture and the first 64-bit processor targeted at the average consumer. Variants of the Athlon 64 have been produced for Socket 754, Socket 939, Socket 940, and Socket AM2. It was AMD's primary consumer CPU, and primarily competed with Intel's Pentium 4, especially the Prescott and Cedar Mill core revisions.
The Pentium M is a family of mobile 32-bit single-core x86 microprocessors introduced in March 2003 and forming a part of the Intel Carmel notebook platform under the then new Centrino brand. The Pentium M processors had a maximum thermal design power (TDP) of 5–27 W depending on the model, and were intended for use in laptops. They evolved from the core of the last Pentium III–branded CPU by adding the front-side bus (FSB) interface of Pentium 4, an improved instruction decoding and issuing front end, improved branch prediction, SSE2 support, and a much larger cache.
Xeon is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for error correction code (ECC) memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture (MCA). They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus, which replaced the older QuickPath Interconnect (QPI) bus.
The NetBurst microarchitecture, called P68 inside Intel, was the successor to the P6 microarchitecture in the x86 family of central processing units (CPUs) made by Intel. The first CPU to use this architecture was the Willamette-core Pentium 4, released on November 20, 2000 and the first of the Pentium 4 CPUs; all subsequent Pentium 4 and Pentium D variants have also been based on NetBurst. In mid-2001, Intel released the Foster core, which was also based on NetBurst, thus switching the Xeon CPUs to the new architecture as well. Pentium 4-based Celeron CPUs also use the NetBurst architecture.
Pentium D is a range of desktop 64-bit x86-64 processors based on the NetBurst microarchitecture, which is the dual-core variant of the Pentium 4 manufactured by Intel. Each CPU comprised two cores. The brand's first processor, codenamed Smithfield and manufactured on the 90 nm process, was released on May 25, 2005, followed by the 65 nm Presler nine months later. The core implementation on the 90 nm Smithfield and later 65 nm Presler are designed differently but are functionally the same. The 90 nm Smithfield contains a single die, with two adjoined but functionally separate CPU cores cut from the same wafer. The later 65 nm Presler utilized a multi-chip module package, where two discrete dies each containing a single core reside on the CPU substrate. Neither the 90 nm Smithfield nor the 65 nm Presler were capable of direct core to core communication, relying instead on the northbridge link to send information between the two cores.
The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is frequently referred to as i686. It was planned to be succeeded by the NetBurst microarchitecture used by the Pentium 4 in 2000, but was revived for the Pentium M line of microprocessors. The successor to the Pentium M variant of the P6 microarchitecture is the Core microarchitecture which in turn is also derived from P6.
The Intel Core microarchitecture is a multi-core processor microarchitecture launched by Intel in mid-2006. It is a major evolution over the Yonah, the previous iteration of the P6 microarchitecture series which started in 1995 with Pentium Pro. It also replaced the NetBurst microarchitecture, which suffered from high power consumption and heat intensity due to an inefficient pipeline designed for high clock rate. In early 2004 the new version of NetBurst (Prescott) needed very high power to reach the clocks it needed for competitive performance, making it unsuitable for the shift to dual/multi-core CPUs. On May 7, 2004 Intel confirmed the cancellation of the next NetBurst, Tejas and Jayhawk. Intel had been developing Merom, the 64-bit evolution of the Pentium M, since 2001, and decided to expand it to all market segments, replacing NetBurst in desktop computers and servers. It inherited from Pentium M the choice of a short and efficient pipeline, delivering superior performance despite not reaching the high clocks of NetBurst.
Yonah is the code name of Intel's first generation 65 nm process CPU cores, based on cores of the earlier Banias / Dothan Pentium M microarchitecture. Yonah CPU cores were used within Intel's Core Solo and Core Duo mobile microprocessor products. SIMD performance on Yonah improved through the addition of SSE3 instructions and improvements to SSE and SSE2 implementations; integer performance decreased slightly due to higher latency cache. Additionally, Yonah included support for the NX bit.
Pentium is a series of x86 architecture-compatible microprocessors produced by Intel from 1993 to 2023. The original Pentium was Intel's fifth generation processor, succeeding the i486; Pentium was Intel's flagship processor line for over a decade until the introduction of the Intel Core line in 2006. Pentium-branded processors released from 2009 onwards were considered entry-level products positioned above the low-end Atom and Celeron series, but below the faster Core lineup and workstation/server Xeon series.
The Pentium Dual-Core brand was used for mainstream x86-architecture microprocessors from Intel from 2006 to 2009, when it was renamed to Pentium. The processors are based on either the 32-bit Yonah or 64-bit Merom-2M, Allendale, and Wolfdale-3M core, targeted at mobile or desktop computers.
Conroe is the code name for many Intel processors sold as Core 2 Duo, Xeon, Pentium Dual-Core and Celeron. It was the first desktop processor to be based on the Core microarchitecture, replacing the NetBurst microarchitecture based Cedar Mill processor. It has product code 80557, which is shared with Allendale and Conroe-L that are very similar but have a smaller L2 cache. Conroe-L has only one processor core and a new CPUID model. The mobile version of Conroe is Merom, the dual-socket server version is Woodcrest, the quad-core desktop version is Kentsfield and the quad-core dual-socket version is Clovertown. Conroe was replaced by the 45 nm Wolfdale processor.
Intel Core is a line of multi-core central processing units (CPUs) for midrange, embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level. Identical or more capable versions of Core processors are also sold as Xeon processors for the server and workstation markets.
Bonnell is a CPU microarchitecture used by Intel Atom processors which can execute up to two instructions per cycle. Like many other x86 microprocessors, it translates x86 instructions into simpler internal operations prior to execution. The majority of instructions produce one micro-op when translated, with around 4% of instructions used in typical programs producing multiple micro-ops. The number of instructions that produce more than one micro-op is significantly fewer than the P6 and NetBurst microarchitectures. In the Bonnell microarchitecture, internal micro-ops can contain both a memory load and a memory store in connection with an ALU operation, thus being more similar to the x86 level and more powerful than the micro-ops used in previous designs. This enables relatively good performance with only two integer ALUs, and without any instruction reordering, speculative execution or register renaming. A side effect of having no speculative execution is invulnerability against Meltdown and Spectre.
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