General information | |
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Launched | December 14, 2023 [1] |
Marketed by | Intel |
Designed by | Intel |
Common manufacturers |
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CPUID code | A06A4h |
Product code | 80723 [2] |
Performance | |
Max. CPU clock rate | P-cores: 5.1 GHz E-cores: 3.8 GHz LP E-cores: 2.5 GHz |
DMI speeds | x8 16 GT/s |
Cache | |
L1 cache | 112 KB per P-core:
96 KB per E-core and LP E-core:
|
L2 cache | 2 MB per P-core, E-core cluster and LP E-core cluster |
L3 cache | Up to 24 MB |
Architecture and classification | |
Application | Mobile |
Technology node | Intel 4 TSMC N5 TSMC N6 Intel 22FFL |
Microarchitecture | Redwood Cove (P-cores) Crestmont (E-cores and LP E-cores) |
Instruction set | x86-64 |
Instructions | x86-64 |
Extensions | |
Physical specifications | |
Cores |
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Memory (RAM) | |
GPU | Intel Arc |
Packages |
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Sockets |
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Products, models, variants | |
Product code name |
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Models |
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Brand name | |
History | |
Predecessors | Alder Lake (embedded and 9 W fanless mobile) Raptor Lake (15 W - 45 W premium fanned mobile) |
Successors | Lunar Lake (low power ultralight) Arrow Lake (performance thin & light) |
Support status | |
Supported |
Meteor Lake is Intel's codename for the first generation of Intel Core Ultra mobile processors, [3] and was officially launched on December 14, 2023. [4] It is the first generation of Intel mobile processors to use a chiplet architecture which means that the processor is a multi-chip module. [3] Tim Wilson led the system on a chip development for this generation microprocessor. [5]
In July 2021, Meteor Lake was initially announced to be coming with a 5–125W TDP range for various segments ranging from ultra low power mobile to enthusiast desktop. [6] The initial tape-in process for Meteor Lake took place in May 2021. The CPU compute tile was confirmed to be fabricated on Intel's 7nm process (since rebranded to "Intel 4"). [7]
In October 2021, Intel said in an earnings call that it had taped out the CPU compute tile for Meteor Lake and after it was received it had powered on within 30 minutes and with expected performance levels. [8] In April 2022, Intel announced that an assembled Meteor Lake mobile processor had been powered-on for the first time in a development milestone. [9] [10]
In March 2023, it was reported that Intel had decided to cancel development of high-end Meteor Lake-S processors for desktop. [11] Meteor Lake-S processors were being designed to fit into the LGA 1851 socket, which is identical in dimensions to LGA 1700, but the cancellation of desktop Meteor Lake meant that the LGA 1851 socket won't debut until Arrow Lake in 2024. [12] The top Meteor Lake-S SKU in development contained 6 Redwood Cove P-cores and 16 Crestmont E-cores, which is two fewer P-cores than the last generation Raptor Lake Core i9-13900K.
At Intel's Innovation event in September 2023, head of Intel's Client Computing Group Michelle Johnston Holthaus confirmed that some Meteor Lake-based processors would come to desktop in 2024. Intel later clarified that socketable desktop Meteor Lake processors would not be coming to the DIY market with the LGA 1851 socket. [13] [14] Instead, Meteor Lake processors in a BGA package will be available on desktop in the form of compact all-in-one PCs. [15] A reason for this, according to a statement by Intel to ComputerBase, is that "Meteor Lake is a power efficient architecture that will power innovative mobile and desktop designs". [16]
Intel unveiled new branding in June 2023 for upcoming Meteor Lake processors after using the same "Core i" branding for over 15 years. Core branding would be simplified by dropping the 'i' with processors branded Core 3, 5 and 7 instead. [17] The new 'Core Ultra' 5, 7 and 9 branding would be reserved for "premium" processors according to Intel. [18] In addition to the new tier naming, Intel said it would be de-emphasizing processor generations in marketing material, though the processor generation number would remain in the processor number. [19] Meteor Lake processors with Core Ultra branding are classified as first generation Core Ultra.
The new Core and Core Ultra branding was perceived as creating more branding confusion rather than reducing it. [20] Josh Loeffler of TechRadar wrote that "differentiation between Core and Core Ultra is also somewhat head-scratching, especially since there will at least be some overlap between the two brands" as Core 5 and Core 7 processors will exist alongside Core Ultra 5 and Core Ultra 7 processors. [21] In the view of Digital Trends , the new branding emulated AMD and Apple's naming conventions which amounted to Intel "chasing its competitors instead of leading the pack". [22]
In April 2023, Meteor Lake and its "Intel 4" process were reportedly ramping to production. [23] Production on Meteor Lake with Intel 4 wafers took place at Intel's D1D fabrication facility in Hillsboro, Oregon. [24] The D1D fabrication facility has a total output of 40,000 wafers a month. [25] Secondary source production for Meteor Lake takes place at Fab 34 in the Republic of Ireland. [26] [27] On September 29, 2023, Intel announced that Intel 4 products, including Meteor Lake, had entered high-volume production at Fab 34 in the Republic of Ireland. [28] The GPU, SoC and I/O extender tiles in Meteor Lake are manufactured by TSMC in Taiwan.
Meteor Lake was revealed at Intel's Innovation event on September 19, 2023, with the announcement that 'Core Ultra' branded processors would be launching on December 14. [29] However, no list of Meteor Lake SKUs were revealed at Innovation nor release details on regular 'Core' branded processors. [30]
Meteor Lake is a 64-bit x86 CPU architecture designed around low power operation and increased power efficiency over Raptor Lake. It is the first Intel microarchitecture to utilize a disaggregated multi-chip module (MCM) approach rather than using large monolithic silicon dies. Previously, in June 2017, Intel had derided AMD's disaggregated chiplet approach in their Ryzen and Epyc processors as using "glued-together" dies. [31]
The first advantage of using smaller dies in an MCM is how it brings better modularity and fabricating smaller dies increases silicon yield rates as more dies can be fitted onto a single 300mm wafer. As a result of greater yields, the use of multiple pre-tested components in an MCM removes the need for binning an entire assembled CPU as is the case with monolithic dies. [32] For example, Raptor Lake desktop silicon with defective graphics is binned into F SKUs with the integrated graphics disabled so they can still be sold while non-F SKUs have their integrated graphics enabled. Instead, Intel can assemble Meteor Lake CPUs using multiple pieces of fully functional silicon while any silicon wafer defects can be discarded entirely. The second advantage is greater flexibility in the use of process nodes. The various dies in an MCM can be fabricated on different nodes depending on their use case. Certain functions like SRAM and general I/O do not linearly scale as logic does with advancements in process node. For example, an I/O die can use a cheaper, more mature process like TSMC's N6 while the CPU die can use a more expensive, advanced node like N5 or N3 for greater power efficiency and frequency.
Due to its MCM construction, Meteor Lake can take advantage of different process nodes that are best suited to the use case. Meteor Lake is built using four different fabrication nodes, including both Intel's own nodes and external nodes outsourced to fabrication competitor TSMC. The "Intel 4" process used for the CPU tile is the first process node in which Intel is utilising extreme ultraviolet (EUV) lithography, which is necessary for creating nodes 7nm and smaller. The interposer base tile is fabricated on Intel's 22FFL, or "Intel 16", process. [33] [34] The 22FFL (FinFET Low-power) node, first announced in March 2017, was designed for inexpensive low power operation. [35] The interposer base tile is designed to connect tiles together and allow for die-to-die communication which does not require the most advanced, expensive nodes so an older, inexpensive node can be used instead.
Tile | Node | EUV | Die size | Ref. |
---|---|---|---|---|
Compute tile | Intel 4 (7nm EUV) | ![]() | 69.67 mm2 | [36] [37] [38] |
Graphics tile | TSMC N5 | ![]() | 44.25 mm2 | |
SoC tile | TSMC N6 | ![]() | 100.15 mm2 | |
I/O extender tile | ![]() | 27.42 mm2 | ||
Foveros interposer base tile | Intel 16 (22FFL) | ![]() | 265.65 mm2 |
Intel's Meteor Lake introduces the compute tile built on Intel 4 technology, featuring new P-cores (Redwood Cove) for improved performance and E-cores (Crestmont) for improved efficiency. [39] The Redwood Cove P-cores succeed the Golden Cove cores, offering better cache and memory bandwidth and enhanced performance monitoring. [39] Intel's Thread Director optimizes workload distribution across cores. [39] The Crestmont E-cores advance in instructions per cycle (IPC) and maintain AI acceleration with VNNI, similar to previous generations. [39]
Meteor Lake's CPU compute tile features up to 6 Redwood Cove P-cores and 8 Crestmont E-cores. Each Redwood Cove P-core features SMT with two threads per core while Crestmont E-cores are limited to one thread per core. The 8 total Crestmont E-cores are organized into two 4-core clusters with shared L2 and L3 caches for each cluster. Each Crestmont E-core cluster has 2 MB of L2 cache, the same as a Gracemont E-core cluster. Crestmont maintains the same 6-wide out-of-order core design as Gracemont with enhancements to its pipeline. The branch target buffer in Crestmont gets a boost from 5120 entries to 6144 entries. [40] Intel claims that Crestmont achieves a 3% IPC increase due to the addition of Vector Neural Network Instructions (VNNI) instructions support for AI workloads but Crestmont E-cores still lack support for AVX-512 instructions. [37] Testing of Meteor Lake's new Redwood Cove P-cores actually showed an IPC regression in single-core workloads over the previous generation Raptor Cove core. [41]
Meteor Lake's compute tile is fabricated on the Intel 4 node which Intel claims brings a 20% increase in power efficiency and twice the area density for logic over Intel 7. [42] The CPU tile measures around 8.9mm × 8.3mm in dimensions, giving a total die size of 73.87mm2. [38] As a result, roughly 730 CPU dies can be fabricated from a single 300mm wafer, though the usable die yields will be lower than 730. [38]
The dedicated graphics tile in Meteor Lake is fabricated using TSMC's N5 node. Contained within the graphics tile are up to 8 Xe-LPG graphics cores based on the Alchemist architecture with optimizations for low-power. Intel's Arc A-series discrete graphics cards use Xe-HPG cores that are also based on the same Alchemist architecture. Each Xe core has 16 Xe Vector Engines (XVEs), giving a total of 128 XVEs across the 8 Xe-LPG cores. This 128 XVE configuration is a downgrade from the 192 XVEs Intel originally showed for Meteor Lake's graphics in a July 2021 presentation slide. [6] The move to the Alchemist architecture also brings the addition of up to 8 ray tracing units, one in each Xe-LPG core. [43] Much like the Xe-HPG variant, each Xe-LPG core contains a 192 KB L1 cache shared between all 16 XVEs. The 8 Xe-LPG cores have access to a 4 MB global L2 cache. [44] However, what the graphics tile is missing from the Alchemist architecture are Xe Matrix Extensions (XMX) units. XMX units perform in-silicon AI acceleration, similar to Nvidia's Tensor cores. The lack of XMX units means that the Xe-LPG core instead uses DP4a instructions in line with Microsoft Shader Model 6.4. [45]
Meteor Lake's graphics capabilities are greatly increased over the previous generation UHD and Iris Xe integrated graphics in Raptor Lake. Intel claims that Meteor Lake's GPU achieves a 2x increase in performance-per-watt over the Iris Xe graphics featured in Alder Lake and Raptor Lake processors. [43] The graphics tile is able to run at much higher clock speeds compared to Intel's previous integrated graphics in Alder Lake and Raptor Lake. Intel claims that Meteor Lake's GPU can "run at a much lower minimum voltage" and hit boost clock speeds of over 2.0 GHz. [46] There is full support included for the DirectX 12 Ultimate graphics API and Intel's XeSS upscaler, an alternative to Nvidia's DLSS and AMD's FSR. Intel claims that the graphics tile in Meteor Lake can give a similar level of performance to discrete graphics. Tom Petersen claimed that Meteor Lake's integrated graphics performance is "not that far from a [RTX] 3050". Intel demonstrated Dying Light 2 running on Meteor Lake's integrated graphics at 1080p with XeSS performance mode upscaling from 720p. [47] A hardware listing from Dell confirmed that in order to fully make use of the integrated Arc graphics, the system must be configured with at least 16GB of memory running in dual-channel mode. Not meeting the minimum memory requirements means that the system will report using lower performance "Intel Graphics" instead of "Arc" graphics. [48]
Meteor Lake's SoC tile serves as the always-active central tile that communicates with other tiles like the CPU and GPU tiles. [37] It provides some I/O functions such as display output unit and the memory controller. Meteor Lake's memory controller is limited to supporting DDR5 and LPDDR5 memory as support for DDR4 memory is dropped. I/O components built into the SoC tile include Wi-Fi 6E and Wi-Fi 7, Bluetooth 5.4, USB4, 8 DMI 4.0 lanes and up to four Thunderbolt 4 ports. [49] The SoC tile is fabricated using TSMC's N6 node as it is more cost effective. [37]
The SoC tile also contains two ultra low power Crestmont E-cores that Intel has dubbed a 'Low Power Island' that operates with lower voltage and lower frequency. [50] The SoC's low power E-cores are limited in frequency to 2.5 GHz compared to the 3.8 GHz of the E-cores. These cores are designed to handle deep background tasks for laptops in idle or sleep mode. [51] All deep background tasks being handled by two Crestmont E-cores in the SoC tile allows the inactive CPU tile to be turned off entirely. [52] This is intended to reduce power consumption and extend battery life for laptops in a sleep mode state. These low power E-cores in the SoC tile are prioritised by Intel Thread Director scheduling. If work cannot be contained on the SoC E-cores, it will then be moved to the compute tile's E-cores as the next priority cores. The final priority cores are the 6 P-cores which are used when the work cannot be contained on the compute tile E-cores. The SoC's low power E-cores lack an L3 cache that the Crestmont E-cores in the compute tile have access to. If a low power E-core encounters a data miss in the L2 cache, there is no L3 cache to fall back on so it must instead search the much slower system memory for data. [53]
Rather than the media engine be located on the GPU tile, it is instead placed on the SoC tile so that the GPU tile does not need to be turned on when decoding video or using a display output. This enables greater power efficiency as the GPU tile is not always active while the system is at idle or under light loads like video playback. There is support added in the media engine for AV1 hardware encoding up to 8K video with 10-bit color depth. [54] Four display pipes provide support for HDMI 2.1 and DisplayPort 2.1 UHBR20 display outputs with the ability to drive up to four 4K 60 Hz HDR monitors at once or one 8K HDR monitor. 1080p and 1440p monitors can be supported with a refresh rate up to 360 Hz. [52]
Meteor Lake features a Neural Processing Unit (NPU) to provide integrated AI capabilities. [30] The NPU, which Intel previously referred to as a Vision Processing Unit (VPU), uses the technology obtained by Intel when it acquired Movidius in September 2016. [55] [56] Meteor Lake's NPU, which is marketed as Intel AI Boost, uses two Movidius 32-bit LEON microcontrollers called 'LeonRT' for processing host commands and 'LeonNN' for low level hardware scheduling. [57] It is capable of executing 1 FP16
or 2 INT8
operations per cycle but the NPU's Data Processing Unit (DPU) cannot use FP32
data. The 4K (4096) MACs operating at up to 1.4 GHz can perform up to 11 TOPS [57] with the total platform providing 34 TOPS of compute performance when including 5 TOPS from the CPU and 18 TOPS from the iGPU. [58] Meteor Lake's NPU allows AI acceleration and neural processing like Stable Diffusion to be done locally, on silicon rather than in the cloud. [59] The benefit of running such functions locally is that it provides greater privacy and does not require an internet connection or paying a fee to a third party for using their server computing power. [60] AI neural engines were previously included by Apple on their ARM-based M1 SoCs and by AMD with the integrated Ryzen AI engine on their Ryzen 7040 series mobile processors codenamed "Phoenix". [60] Intel CEO Pat Gelsinger claimed that Meteor Lake's NPU would usher in the era of the "AI PC" and compared it to Intel's Centrino chipsets that aided bringing Wi-Fi into the notebook market. [61]
The I/O extender tile is the smallest tile in Meteor Lake, fabricated on TSMC's N6 node. [62] It provides scalable I/O blocks, which is primarily to offer additional connectivity to that of the SoC tile, such as PCIe 5.0 lanes. The I/O tile can be scaled depending on the number of PCIe lanes needed and the speed they operate at. [63]
Meteor Lake uses an passive silicon interposer placed underneath its tiles as an interconnect. The tiles are placed on top of the interposer and are bonded to the interposer using through-silicon via (TSV) connections through the two vertically stacked pieces of silicon. The TSVs connect the dies with a 36 μm pitch to enable die-to-die communication. Placing logic dies on top of an interposer requires TSVs to connect the top dies through the interposer onto the package. By contrast, AMD's chiplet approach uses multiple pieces of silicon that are interconnected via traces on the package substrate. The benefit of AMD's approach is its cost-effective scalability where the same CCDs can be used in both their Ryzen desktop and Epyc server processors. AMD's Infinity Fabric approach comes with the drawbacks of increased latency and using additional power for die-to-die communication at around 1.5 picojoules per bit. [37] Intel's communication via a silicon interposer uses less power, at around 0.3 picojoules per bit, but is more expensive to produce, is less scalable and packaging is more complex. [50] The Foveros interposer base tile is estimated to be 23.1mm × 11.5mm in dimensions with a total die area of 265.65mm2. [38]
However, Meteor Lake processors are not the first Intel processors to utilize vertical die stacking with a base tile. In June 2020, Intel launched Lakefield ultra-low power mobile processors with a 7W TDP. Lakefield used Foveros packaging with a 22nm base tile and 10nm compute tile. [64] The compute tile contained heterogenous cores with one Sunny Cove big core and four Tremont small cores, predecessors to Meteor Lake's Redwood Cove and Crestmont cores. [65] Lakefield was discontinued in July 2021. [66]
155H, 165H, and 185H support P-core Turbo Boost 3.0 running at the same frequency as Turbo Boost 2.0.
Processor branding | Model | Cores (threads) | Base clock rate (GHz) | Turbo Boost (GHz) | Arc graphics | Smart cache | TDP | Release date | Price (USD) [lower-alpha 1] | |||||||||
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P | E | LP-E | P | E | LP-E | P | E | LP-E | Xe-cores (XVEs) | Max. freq. (GHz) | Base | cTDP | Turbo | |||||
Core Ultra 9 | 185H | 6 (12) | 8 (8) | 2 (2) | 2.3 | 1.8 | 1.0 | 5.1 | 3.8 | 2.5 | 8 (128) | 2.35 | 24 MB | 45 W | 35–65 W | 115 W | Q4'23 | $640 |
Core Ultra 7 | 165H | 1.4 | 0.9 | 0.7 | 5.0 | 2.3 | 28 W | 20–65 W | Q4'23 | $460 | ||||||||
155H | 4.8 | 2.25 | Q4'23 | $503 | ||||||||||||||
Core Ultra 5 | 135H | 4 (8) | 1.7 | 1.2 | 4.6 | 3.6 | 2.2 | 18 MB | Q4'23 | $342 | ||||||||
125H | 1.2 | 0.7 | 4.5 | 7 (112) | Q4'23 | $375 |
The integrated GPU is branded as "Intel Graphics" but still use the same GPU microarchitecture as "Intel Arc Graphics" on the H series models.
All models support DDR5 memory except 134U and 164U.
Processor branding | Model | Cores (threads) | Base clock rate (GHz) | Turbo Boost (GHz) | Intel Graphics | Smart cache | TDP | Release date | Price (USD) [lower-alpha 1] | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
P | E | LP-E | P | E | LP-E | P | E | LP-E | Xe-cores (XVEs) | Max. freq. (GHz) | Base | cTDP | Turbo | |||||
Low power (MTL-U15) | ||||||||||||||||||
Core Ultra 7 | 165U | 2 (4) | 8 (8) | 2 (2) | 1.7 | 1.2 | 0.7 | 4.9 | 3.8 | 2.1 | 4 (64) | 2.0 | 12 MB | 15 W | 12–28 W | 57 W | Q4'23 | $448 |
155U | 4.8 | 1.95 | Q4'23 | $490 | ||||||||||||||
Core Ultra 5 | 135U | 1.6 | 1.1 | 4.4 | 3.6 | 1.9 | Q4'23 | $332 | ||||||||||
125U | 1.3 | 0.8 | 4.3 | 1.85 | Q4'23 | $363 | ||||||||||||
115U | 4 (4) | 1.5 | 1.0 | 4.2 | 3.5 | 3 (48) | 1.8 | 10 MB | Q4'23 | unspecified | ||||||||
Ultra low power (MTL-U9) | ||||||||||||||||||
Core Ultra 7 | 164U | 2 (4) | 8 (8) | 2 (2) | 1.1 | 0.7 | 0.4 | 4.8 | 3.8 | 2.1 | 4 (64) | 1.8 | 12 MB | 9 W | 9–15 W | 30 W | Q4'23 | $448 |
Core Ultra 5 | 134U | 0.7 | 0.5 | 4.4 | 3.6 | 1.75 | Q4'23 | $332 |
155HL and 165HL support P-core Turbo Boost 3.0 running at the same frequency as Turbo Boost 2.0.
Processor branding | Model | Cores (threads) | Base clock rate (GHz) | Turbo Boost (GHz) | Arc graphics | Smart cache | TDP | Release date | Price (USD) [lower-alpha 1] | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
P | E | LP-E | P | E | LP-E | P | E | LP-E | Xe-cores (XVEs) | Max. freq. (GHz) | Base | cTDP | Turbo | |||||
Core Ultra 7 | 165HL | 6 (12) | 8 (8) | 2 (2) | 1.4 | 0.9 | 0.7 | 5.0 | 3.8 | 2.5 | 8 (128) | 2.3 | 24 MB | 45 W | 20–65 W | 115 W | Q2'24 | $459 |
155HL | 4.8 | 2.25 | Q2'24 | $438 | ||||||||||||||
Core Ultra 5 | 135HL | 4 (8) | 1.7 | 1.2 | 4.6 | 3.6 | 2.2 | 18 MB | Q2'24 | $341 | ||||||||
125HL | 1.2 | 0.7 | 4.5 | 7 (112) | Q2'24 | $325 |
The integrated GPU is branded as "Intel Graphics" but still use the same GPU microarchitecture as "Intel Arc Graphics" on the high-power models.
Processor branding | Model | Cores (threads) | Base clock rate (GHz) | Turbo Boost (GHz) | Intel Graphics | Smart cache | TDP | Release date | Price (USD) [lower-alpha 1] | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
P | E | LP-E | P | E | LP-E | P | E | LP-E | Xe-cores (XVEs) | Max. freq. (GHz) | Base | cTDP | Turbo | |||||
Core Ultra 7 | 165UL | 2 (4) | 8 (8) | 2 (2) | 1.7 | 1.2 | 0.7 | 4.9 | 3.8 | 2.1 | 4 (64) | 2.0 | 12 MB | 15 W | 12–28 W | 57 W | Q2'24 | $447 |
155UL | 4.8 | 1.95 | Q2'24 | $426 | ||||||||||||||
Core Ultra 5 | 135UL | 1.6 | 1.1 | 4.4 | 3.6 | 1.9 | Q2'24 | $331 | ||||||||||
125UL | 1.3 | 0.8 | 4.3 | 1.85 | Q2'24 | $309 | ||||||||||||
Core Ultra 3 | 105UL | 4 (4) | 1.5 | 1.0 | 4.2 | 3.5 | 3 (48) | 1.8 | 10 MB | Q2'24 | $295 |
A multi-chip module (MCM) is generically an electronic assembly where multiple integrated circuits, semiconductor dies and/or other discrete components are integrated, usually onto a unifying substrate, so that in use it can be treated as if it were a larger IC. Other terms for MCM packaging include "heterogeneous integration" or "hybrid integrated circuit". The advantage of using MCM packaging is it allows a manufacturer to use multiple components for modularity and/or to improve yields over a conventional monolithic IC approach.
The transistor count is the number of transistors in an electronic device. It is the most common measure of integrated circuit complexity. The rate at which MOS transistor counts have increased generally follows Moore's law, which observes that transistor count doubles approximately every two years. However, being directly proportional to the area of a die, transistor count does not represent how advanced the corresponding manufacturing technology is. A better indication of this is transistor density which is the ratio of a semiconductor's transistor count to its die area.
AMD Accelerated Processing Unit (APU), formerly known as Fusion, is a series of 64-bit microprocessors from Advanced Micro Devices (AMD), combining a general-purpose AMD64 central processing unit (CPU) and 3D integrated graphics processing unit (IGPU) on a single die.
Intel Core is a line of multi-core central processing units (CPUs) for midrange, embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level. Identical or more capable versions of Core processors are also sold as Xeon processors for the server and workstation markets.
Intel Graphics Technology (GT) is the collective name for a series of integrated graphics processors (IGPs) produced by Intel that are manufactured on the same package or die as the central processing unit (CPU). It was first introduced in 2010 as Intel HD Graphics and renamed in 2017 as Intel UHD Graphics.
Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's previous "tick–tock" manufacturing and design model, Kaby Lake represents the optimized step of the newer process–architecture–optimization model. Kaby Lake began shipping to manufacturers and OEMs in the second quarter of 2016, with its desktop chips officially launched in January 2017.
Ice Lake is Intel's codename for the 10th generation Intel Core mobile and 3rd generation Xeon Scalable server processors based on the Sunny Cove microarchitecture. Ice Lake represents an Architecture step in Intel's process–architecture–optimization model. Produced on the second generation of Intel's 10 nm process, 10 nm+, Ice Lake is Intel's second microarchitecture to be manufactured on the 10 nm process, following the limited launch of Cannon Lake in 2018. However, Intel altered their naming scheme in 2020 for the 10 nm process. In this new naming scheme, Ice Lake's manufacturing process is called simply 10 nm, without any appended pluses.
Tiger Lake is Intel's codename for the 11th generation Intel Core mobile processors based on the Willow Cove Core microarchitecture, manufactured using Intel's third-generation 10 nm process node known as 10SF. Tiger Lake replaces the Ice Lake family of mobile processors, representing an optimization step in Intel's process–architecture–optimization model.
Coffee Lake is Intel's codename for its eighth-generation Core microprocessor family, announced on September 25, 2017. It is manufactured using Intel's second 14 nm process node refinement. Desktop Coffee Lake processors introduced i5 and i7 CPUs featuring six cores and Core i3 CPUs with four cores and no hyperthreading.
Ryzen is a brand of multi-core x86-64 microprocessors designed and marketed by Advanced Micro Devices (AMD) for desktop, mobile, server, and embedded platforms based on the Zen microarchitecture. It consists of central processing units (CPUs) marketed for mainstream, enthusiast, server, and workstation segments and accelerated processing units (APUs) marketed for mainstream and entry-level segments and embedded systems applications.
Zen 4 is the name for a CPU microarchitecture designed by AMD, released on September 27, 2022. It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs. Zen 4 powers Ryzen 7000 performance desktop processors, Ryzen 8000G series mainstream desktop APUs, and Ryzen Threadripper 7000 series HEDT and workstation processors. It is also used in extreme mobile processors, thin & light mobile processors, as well as EPYC 8004/9004 server processors.
Intel Xe, earlier known unofficially as Gen12, is a GPU architecture developed by Intel.
Rocket Lake is Intel's codename for its 11th generation Core microprocessors. Released on March 30, 2021, it is based on the new Cypress Cove microarchitecture, a variant of Sunny Cove backported to Intel's 14 nm process node. Rocket Lake cores contain significantly more transistors than Skylake-derived Comet Lake cores.
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Raptor Lake is Intel's codename for the 13th and 14th generations of Intel Core processors based on a hybrid architecture, utilizing Raptor Cove performance cores and Gracemont efficient cores. Like Alder Lake, Raptor Lake is fabricated using Intel's Intel 7 process. Raptor Lake features up to 24 cores and 32 threads and is socket compatible with Alder Lake systems. Like earlier generations, Raptor Lake processors also need accompanying chipsets.
Apple M2 is a series of ARM-based system on a chip (SoC) designed by Apple Inc., part of the Apple silicon series, as a central processing unit (CPU) and graphics processing unit (GPU) for its Mac desktops and notebooks, the iPad Pro and iPad Air tablets, and the Vision Pro mixed reality headset. It is the second generation of ARM architecture intended for Apple's Mac computers after switching from Intel Core to Apple silicon, succeeding the M1. Apple announced the M2 on June 6, 2022, at Worldwide Developers Conference (WWDC), along with models of the MacBook Air and the 13-inch MacBook Pro using the M2. The M2 is made with TSMC's "Enhanced 5-nanometer technology" N5P process and contains 20 billion transistors, a 25% increase from the M1. Apple claims CPU improvements up to 18% and GPU improvements up to 35% compared to the M1.
Lunar Lake is the codename for the upcoming Series 2 Core Ultra mobile processors designed by Intel, set for release in September 3, 2024. It is set to follow on from Meteor Lake which saw Intel move from monolithic silicon to a disaggregated MCM design. Meteor Lake was limited to a mobile release while Arrow Lake includes both socketable desktop and mobile processors.