Launched | September 24, 2024 [1] [2] |
---|---|
Designed by | Intel |
Manufactured by | |
Fabrication process | |
Platform(s) |
|
Branding | |
Brand name(s) | Xeon |
Generation | Xeon 6 |
Socket(s) | |
Instructions & Architecture | |
Instructions set | x86 |
Instructions | x86-64 |
Extensions | |
P-core architecture | Redwood Cove |
Memory Support | |
Type | DDR5 |
Memory channels | 12 channels |
I/O | |
PCIe support | PCIe 5.0 |
PCIe lanes | 136 PCIe 5.0 lanes |
CXL support | CXL 2.0 |
History | |
Predecessor | Emerald Rapids |
Variant | Sierra Forest |
Successor | Diamond Rapids |
Granite Rapids is the codename for 6th generation Xeon Scalable server processors designed by Intel, launched on 24 September 2024. [1] [2] Featuring up to 128 P-cores, Granite Rapids is designed for high performance computing applications. The platform equivalent Sierra Forest processors with up to 288 E-cores launched in June 2024 before Granite Rapids.
On February 17, 2022, Intel announced that upcoming Xeon generations would be split into two tracks for those with P-cores exclusively and E-cores exclusively. [3] These two tracks are intended to serve different market segments with P-core Xeon processors targeting high performance computing while E-core Xeon processors target cloud customers who prioritize greater core density, energy efficiency and performance in heavily multi-threaded workloads over strong single-threaded usage. [4]
On January 10, 2023, Intel released its 4th generation Xeon processors codenamed Sapphire Rapids. Sapphire Rapids was the first server processors by Intel to utilize a disaggregated MCM approach and included in-silicon accelerators. Sapphire Rapids launched late and topped out at 60 cores, far behind AMD's 96 cores offered in its EPYC 9654 processor. [5] 5th generation Emerald Rapids processors quickly followed Sapphire Rapids with a launch on December 14, 2023. [6] Emerald Rapids is socket-compatible with existing Sapphire Rapids systems and brought significantly increased L3 cache and pushed the maximum core count from 60 to 64. [7]
On August 28, 2023, Intel shared details on the architecture behind Granite Rapids and Sierra Forest in a presentation at the annual Hot Chips conference. [8] On September 6, 2023, Intel released a video on its packaging techniques which showed a Granite Rapids package with five dies on a single substrate. [9] [10]
During Intel's Vision event in April 2024, new branding for Xeon processors was unveiled. [11] The Xeon Scalable branding that was introduced in 2017 would be retired in favor of a simplified "Xeon 6" brand for 6th generation Xeon processors. [12] This change brings greater emphasis on processor generation numbers. [13] The badge for the Xeon brand was changed to be more visually in line with the badge design used for Intel's Core Ultra processors since 2023.
Granite Rapids processors are x86 server processors based on Intel's Redwood Cove P-core architecture.
Granite Rapids dies are connected using Intel's Embedded Multi-die Interconnect Bridge (EMIB) packaging technique which is Intel's alternative to TSMC's Infinity Fan-Out (InFO) packaging technique. [14] Rather than use a traditional silicon interposer, EMIB embeds a silicon bridge within an organic substrate to connect multiple dies. EMIB bridges act as a high-bandwidth, low-latency, and low-power solution for die-to-die communication. [15] In contrast, a traditional interposer would be much larger in area and would instead be placed on top of the substrate with dies on top of the interposer. An interposer to connect all five dies in Granite Rapids processors would be prohibitively large. Intel previously used a much smaller interposer with Meteor Lake's Foveros base tile. [16]
The compute tile in Granite Rapids contains cores, cache and DDR5 memory controllers. A single compute tile houses up to 44 Redwood Cove P-cores, though some cores are disabled for redundance and yield reasons. Redwood Cove cores were first introduced in Meteor Lake mobile processors. For Granite Rapids, Redwood Cove has undergone a minor node shrink from Intel 4 to Intel 3. Compared to the Raptor Cove cores in Emerald Rapids, Redwood Cove brings increased L1 cache to 112KB per core with a 16-way 64KB L1 instructions cache that is doubled from Raptor Cove's 32KB instructions cache while retaining the same 2MB of L2 cache per core. Furthermore, Redwood Cove's new Matrix Engine allows for AMX FP16 acceleration that benefits AI inference workloads. Unlike Sierra Forest, the Redwood Cove cores in Granite Rapids are able to issue AVX-512 and newly added AVX-512-FP16 instructions.
Segment | Cores (threads) | Memory channels (per die) | Die size | Ref. |
---|---|---|---|---|
LCC | 16 (32) | 8-channels | ||
MCC | 48 (96) | 8-channels | ||
XCC | 44 (88) | 4-channels | ~598 mm2 | [17] |
A compute tile also contains DDR5 memory controllers that natively support DDR5-6400. Each XCC compute tile provides four channels of DDR5 for a total of 12 memory channels across three compute tiles. [18] This provides flexibility as SKUs with eight memory channels can be created by using two XCC compute tiles instead of three or with a single MCC compute tile. SKUs with four memory channels can use only one XCC compute tile. Lower core count Granite Rapids SKUs use monolithic LCC and MCC dies that both have an 8 channel memory controller.
Additionally, Granite Rapids adds support for Multiplexer Combined Ranks (MCR) memory DIMMs. [19] MCR DIMMs were designed to provide higher capacities and increased memory bandwidth to high core count server processors compared to regular DDR5 RDIMMs rather than adding more DIMM slots to server motherboards due to physical space constraints. [20] For example, a dual socket AMD EPYC "Genoa" system with 48 total DIMM slots (24 per socket) serving 12 memory channels cannot fit within a standard 19 inch server motherboard form factor. [20] This configuration may add over 5 inches to a server motherboard so it is instead more common to have 24 total DIMM slots (12 per socket) to stay within the 19 inch motherboard standard. [20] MCR memory is able to use both 64-byte ranks simultaneously with a data buffer that compiles the 64-byte data from each rank into one piece of 128-byte data to the CPU. [21] Granite Rapids can support up to DDR5-8800 across 12 memory channels. [22] On April 17, 2024, JEDEC released its updated JESD79-5C DDR5 SDRAM standard that seeks to improve reliability for high-performance servers running highly clocked DDR5 memory. This is addressed through expanded timing parameters and Per-Row Activation Counting (PRAC) to improve data integrity. [23]
I/O in Granite Rapids processors is provided by two dies fabricated on the more mature Intel 7 process. [14] It has an estimated die area of 241 mm2. [17] The same I/O tiles in Granite Rapids can be shared with Sierra Forest E-core processors. The I/O tiles provide 136 PCIe 5.0 lanes, an increase from Emerald Rapid's 128 lanes. These 136 PCIe 5.0 lanes support CXL 2.0 Type 3 and up to 6 UPI links. [24] The previous generation Emerald Rapids supported CXL 1.1 Type 1 and Type 2. [7] Granite Rapids is able to function as an SoC with self-booting capabilities without requiring a link to an external PCH. This brings Granite Rapids in line with AMD's EPYC processors that can function as SoCs. [25]
Granite Rapids-SP (Scalable Performance) uses the Beechnut City platform with the smaller LGA 4710 socket, targeted towards mainstream server. It is a direct successor to Sapphire Rapids-SP and Emerald Rapids-SP that used the similarly sized LGA 4677 socket. Granite Rapids-SP features up to 86 cores and 8-channel DDR5 memory support. TDPs up to 350W are supported on Beechnut City platform.
Granite Rapids-AP (Advanced Performance) uses the Avenue City platform with the larger LGA 7529 socket. With the larger socket, Granite Rapids-AP SKUs reach higher core counts up to 128 and support 96 PCIe 5.0 lanes and 12-channel DDR5 memory (Up to 3 TB (1 DIMM per channel) and 6 TB (2 DIMM per channel) while using 256GB memory modules). Increased TDPs up to 500W are supported on Avenue City platform. [26] Granite Rapids is the first time that Intel has used the Advanced Performance moniker since the release of Cascade Lake in April 2019. [18]
Model number | Cores (Threads) | Base clock | All core turbo boost | Max turbo boost | Smart Cache | TDP | Maxi- mum scala- bility | Registered DDR5 w. ECC support | UPI Links | Release MSRP (USD) |
---|---|---|---|---|---|---|---|---|---|---|
6980P | 128 (256) | 2.0 GHz | 3.2 GHz | 3.9 GHz | 504 MB | 500 W | 2S | DDR5 (6400 MT/s) MRDIMM (8800 MT/s) | 6 | $17,800 |
6979P | 120 (240) | 2.1 GHz | $15,750 | |||||||
6972P | 96 (192) | 2.4 GHz | 3.5 GHz | 480 MB | $14,600 | |||||
6960P | 72 (144) | 2.7 GHz | 3.8 GHz | 432 MB | $13,750 | |||||
6952P | 96 (192) | 2.1 GHz | 3.2 GHz | 480 MB | 400 W | $11,400 |
Granite Rapids-D processors are due to be released in 2025 as the successor to 2021's Ice Lake-D processors. [27] Granite Rapids-D is targeted at edge computing and networking with lower power consumption and integrated I/O and accelerators. [28] Granite Rapids-D offers doubled vRAN (Virtual Radio Access Network) processing capacity and leverages Advanced Vector Extensions and integrated vRAN Boost acceleration for 5G networking. [29] Intel announced at MWC Barcelona in February 2024 that Granite Rapids-D silicon was already sampling to customers. [27]
Xeon is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for error correction code (ECC) memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture (MCA). They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus, which replaced the older QuickPath Interconnect (QPI) bus.
The land grid array (LGA) is a type of surface-mount packaging for integrated circuits (ICs) that is notable for having the pins on the socket — as opposed to pins on the integrated circuit, known as a pin grid array (PGA). An LGA can be electrically connected to a printed circuit board (PCB) either by the use of a socket or by soldering directly to the board.
In the fields of digital electronics and computer hardware, multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between them. Theoretically, this multiplies the data rate by exactly the number of channels present. Dual-channel memory employs two channels. The technique goes back as far as the 1960s having been used in IBM System/360 Model 91 and in CDC 6600.
Tick–tock was a production model adopted in 2007 by chip manufacturer Intel. Under this model, every microarchitecture change (tock) was followed by a die shrink of the process technology (tick). It was replaced by the process–architecture–optimization model, which was announced in 2016 and is like a tick–tock cycle followed by an optimization phase. As a general engineering model, tick–tock is a model that refreshes one side of a binary system each release cycle.
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Zen is the first iteration in the Zen family of computer processor microarchitectures from AMD. It was first used with their Ryzen series of CPUs in February 2017. The first Zen-based preview system was demonstrated at E3 2016, and first substantially detailed at an event hosted a block away from the Intel Developer Forum 2016. The first Zen-based CPUs, codenamed "Summit Ridge", reached the market in early March 2017, Zen-derived Epyc server processors launched in June 2017 and Zen-based APUs arrived in November 2017.
Epyc is a brand of multi-core x86-64 microprocessors designed and sold by AMD, based on the company's Zen microarchitecture. Introduced in June 2017, they are specifically targeted for the server and embedded system markets.
Sapphire Rapids is a codename for Intel's server and workstation processors based on the Golden Cove microarchitecture and produced using Intel 7. It features up to 60 cores and an array of accelerators, and it is the first generation of Intel server and workstation processors to use a chiplet design.
Zen 4 is the name for a CPU microarchitecture designed by AMD, released on September 27, 2022. It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs. Zen 4 powers Ryzen 7000 performance desktop processors, Ryzen 8000G series mainstream desktop APUs, and Ryzen Threadripper 7000 series HEDT and workstation processors. It is also used in extreme mobile processors, thin & light mobile processors, as well as EPYC 8004/9004 server processors.
Zen 5 is the name for a CPU microarchitecture by AMD, shown on their roadmap in May 2022, launched for mobile in July 2024 and for desktop in August 2024. It is the successor to Zen 4 and is currently fabricated on TSMC's N4X process. Zen 5 is also planned to be fabricated on the N3E process in the future.
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Raptor Lake is Intel's codename for the 13th and 14th generations of Intel Core processors based on a hybrid architecture, utilizing Raptor Cove performance cores and Gracemont efficient cores. Like Alder Lake, Raptor Lake is fabricated using Intel's Intel 7 process. Raptor Lake features up to 24 cores and 32 threads and is socket compatible with Alder Lake systems. Like earlier generations, Raptor Lake processors also need accompanying chipsets. Raptor Lake CPUs have suffered issues such as elevated voltage which leads to system instability and can cause permanent damage. Intel claims these issues have been since fixed in the latest microcode patches, which requires updating the motherboard's BIOS.
LGA 4677 is a zero insertion force flip-chip land grid array (LGA) CPU socket designed by Intel, compatible with Sapphire Rapids server and workstation processors, which was released in January 2023.
LGA 7529 is a zero insertion force flip-chip land grid array (LGA) socket designed by Intel which supports the Sierra Forest line of E-core only Xeon processors, designed for heavily multithreaded cloud workloads, as well as the Granite Rapids line of P-core only Xeon microprocessors, designed for mainstream usage. The socket is also expected to support the mainstream successor to Granite Rapids, Diamond Rapids. The first pictures of the Intel Birch Stream platform were posted on January 31, 2023, by Yuuki_Ans. They showcased a dual LGA 7529 socket engineering sample motherboard.
Meteor Lake is the codename for Core Ultra Series 1 mobile processors, designed by Intel and officially released on December 14, 2023. It is the first generation of Intel mobile processors to use a chiplet architecture which means that the processor is a multi-chip module. Meteor Lake's design effort was led by Tim Wilson.
Socket SP6 is a zero insertion force land grid array CPU socket designed by AMD supporting its Zen 4c-based Siena Epyc server processors that launched on September 18, 2023. It is designed for server systems targeting infrastructure and edge computing segments.
LGA 4710 is a zero insertion force flip-chip land grid array (LGA) socket designed by Intel that is used by Sierra Forest, a line of E-core only Xeon processors designed for heavily multithreaded cloud workloads. It is expected to also support the upcoming Granite Rapids line of mainstream server processors.
... Intel announced the on-time launch of its high-performance Xen 6 'Granite Rapids' 6900P-series models today, with five new models spanning from 72 cores up to 128 cores, ... Intel will launch the more general-purpose P-core Xeon 6 models with 86 or fewer cores in the first quarter of 2025 (more info below). ... Intel's Xeon 6700P[ sic ] series launches today worldwide, and the follow-on models come in Q1 2025. ...
... With the launch of its Granite Rapids Xeons on Tuesday [24 September 2024], Intel is finally closing the gap ... Its 6700P-series parts, due out early next year, will feature up to two compute dies on board sporting up to 86 cores and a maximum of eight memory channels. ... The remainder of Intel's Xeon 6 roadmap, including its monster 288 E-core 6900E processors and four and eight-socket-capable 6700P parts, won't arrive until early next year. ...