Zilog Z80

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Zilog Z80
Zilog Z80.jpg
A Z80 manufactured in June 1976 according to the date stamp
ProducedFrom March 1976 to present
Common manufacturer(s)
Max. CPU clock rate 2.5, 4, 6, 8 MHz to 10 MHz with CMOS variant up to 20 MHz and binary compatible derivatives (from Zilog) up to 33 and 50 MHz.
A CMOS Z80 in a Quad Flat Package Z84C0010FEC LQFP.png
A CMOS Z80 in a Quad Flat Package
A May 1976 advertisement for the Zilog Z-80 8-bit microprocessor Zilog Z-80 Microprocessor ad May 1976.jpg
A May 1976 advertisement for the Zilog Z-80 8-bit microprocessor

The Z80 CPU is an 8-bit based microprocessor. It was introduced by Zilog in 1976 as the startup company's first product. The Z80 was conceived by Federico Faggin in late 1974 and developed by him and his then-11 employees at Zilog from early 1975 until March 1976, when the first fully working samples were delivered. With the revenue from the Z80, the company built its own chip factories and grew to over a thousand employees over the following two years. [2]

Central processing unit electronic circuitry within a computer that carries out the instructions of a computer program by performing the basic arithmetic, logical, control and input/output (I/O) operations specified by the instructions

A central processing unit (CPU), also called a central processor or main processor, is the electronic circuitry within a computer that carries out the instructions of a computer program by performing the basic arithmetic, logic, controlling, and input/output (I/O) operations specified by the instructions. The computer industry has used the term "central processing unit" at least since the early 1960s. Traditionally, the term "CPU" refers to a processor, more specifically to its processing unit and control unit (CU), distinguishing these core elements of a computer from external components such as main memory and I/O circuitry.

In computer architecture, 8-bit integers, memory addresses, or other data units are those that are 8 bits wide. Also, 8-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 8-bit is also a generation of microcomputers in which 8-bit microprocessors were the norm.

Microprocessor computer processor contained on an integrated-circuit chip

A microprocessor is a computer processor that incorporates the functions of a central processing unit on a single integrated circuit (IC), or at most a few integrated circuits. The microprocessor is a multipurpose, clock driven, register based, digital integrated circuit that accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output. Microprocessors contain both combinational logic and sequential digital logic. Microprocessors operate on numbers and symbols represented in the binary number system.


The Zilog Z80 was a software-compatible extension and enhancement of the Intel 8080 and, like it, was mainly aimed at embedded systems. According to the designers, the primary targets for the Z80 CPU (and its optional support and peripheral ICs [3] ) were products like intelligent terminals, high end printers and advanced cash registers as well as telecom equipment, industrial robots and other kinds of automation equipment. The Z80 was officially introduced on the market in July 1976 and came to be widely used also in general desktop computers using CP/M and other operating systems as well as in the home computers of the 1980s. It was also common in military applications, musical equipment, such as synthesizers, and in the computerized coin operated video games of the late 1970s and early 1980, the arcade machines or video game arcade cabinets.

Intel 8080 8-bit microprocessor

The Intel 8080 ("eighty-eighty") was the second 8-bit microprocessor designed and manufactured by Intel and was released in April 1974. It is an extended and enhanced variant of the earlier 8008 design, although without binary compatibility. The initial specified clock frequency limit was 2 MHz, and with common instructions using 4, 5, 7, 10, or 11 cycles this meant that it operated at a typical speed of a few hundred thousand instructions per second. A faster variant 8080A-1 became available later with clock frequency limit up to 3.125 MHz.

Printer (computing) electronic device which produces a representation of an electronic document on physical media

In computing, a printer is a peripheral device which makes a persistent human-readable representation of graphics or text on paper. The first computer printer designed was a mechanically driven apparatus by Charles Babbage for his difference engine in the 19th century; however, his mechanical printer design was not built until 2000. The first electronic printer was the EP-101, invented by Japanese company Epson and released in 1968. The first commercial printers generally used mechanisms from electric typewriters and Teletype machines. The demand for higher speed led to the development of new systems specifically for computer use. In the 1980s were daisy wheel systems similar to typewriters, line printers that produced similar output but at much higher speed, and dot matrix systems that could mix text and graphics but produced relatively low-quality output. The plotter was used for those requiring high quality line art like blueprints.

Telecommunication transmission of information between locations using electromagnetics

Telecommunication is the transmission of signs, signals, messages, words, writings, images and sounds or information of any nature by wire, radio, optical or other electromagnetic systems. Telecommunication occurs when the exchange of information between communication participants includes the use of technology. It is transmitted either electrically over physical media, such as cables, or via electromagnetic radiation. Such transmission paths are often divided into communication channels which afford the advantages of multiplexing. Since the Latin term communicatio is considered the social process of information exchange, the term telecommunications is often used in its plural form because it involves many different technologies.

The Z80 was one of the most commonly used CPUs in the home computer market from the late 1970s to the mid-1980s. [4] [5] Zilog licensed the Z80 to the US-based Synertek and Mostek, which had helped them with initial production, as well as to a European second source manufacturer, SGS. The design was also copied by several Japanese, East European and Soviet manufacturers. [6] This won the Z80 acceptance in the world market since large companies like NEC, Toshiba, Sharp, and Hitachi started to manufacture the device (or their own Z80-compatible clones or designs). In recent decades Zilog has refocused on the ever-growing market for embedded systems (for which the original Z80 and the Z180 were designed) and the most recent Z80-compatible microcontroller family, the fully pipelined 24-bit eZ80 with a linear 16  MB address range, has been successfully introduced alongside the simpler Z180 and Z80 products.

In the electronics industry, a second source is a company that is licensed to manufacture and sell components originally designed by another company.

In electronic design a semiconductor intellectual property core, IP core, or IP block is a reusable unit of logic, cell, or integrated circuit layout design that is the intellectual property of one party. IP cores may be licensed to another party or can be owned and used by a single party alone. The term is derived from the licensing of the patent and/or source code copyright that exist in the design. IP cores can be used as building blocks within application-specific integrated circuit (ASIC) designs or field-programmable gate array (FPGA) logic designs.

NEC Japanese technology corporation

NEC Corporation is a Japanese multinational provider of information technology (IT) services and products, headquartered in Minato, Tokyo, Japan. It provides IT and network solutions to business enterprises, communications services providers and to government agencies, and has also been the biggest PC vendor in Japan since the 1980s. The company was known as the Nippon Electric Company, Limited, before rebranding in 1983 as NEC.


Photo of the original Zilog Z80 microprocessor design in depletion-load nMOS. Total die size is 3545x3350 um. (This actual chip manufactured in 1990.) Z80-Z0840004PSC-HD.jpg
Photo of the original Zilog Z80 microprocessor design in depletion-load nMOS. Total die size is 3545×3350 µm. (This actual chip manufactured in 1990.)
The Z80's original DIP40 chip package pinout Z80 pinout.svg
The Z80's original DIP40 chip package pinout

The Z80 came about when physicist Federico Faggin left Intel at the end of 1974 to found Zilog with Ralph Ungermann. At Fairchild Semiconductor, and later at Intel, Faggin had been working on fundamental transistor and semiconductor manufacturing technology. He also developed the basic design methodology used for memories and microprocessors at Intel and led the work on the Intel 4004, the 8080 and several other ICs. Masatoshi Shima, the principal logic and transistor level-designer of the 4004 and the 8080 under Faggin's supervision, joined the Zilog team.

Physicist scientist who does research in physics

A physicist is a scientist who specializes in the field of physics, which encompasses the interactions of matter and energy at all length and time scales in the physical universe. Physicists generally are interested in the root or ultimate causes of phenomena, and usually frame their understanding in mathematical terms. Physicists work across a wide range of research fields, spanning all length scales: from sub-atomic and particle physics, through biological physics, to cosmological length scales encompassing the universe as a whole. The field generally includes two types of physicists: experimental physicists who specialize in the observation of physical phenomena and the analysis of experiments, and theoretical physicists who specialize in mathematical modeling of physical systems to rationalize, explain and predict natural phenomena. Physicists can apply their knowledge towards solving practical problems or to developing new technologies.

Federico Faggin Italian physicist and electrical engineer

Federico Faggin is an Italian physicist, inventor and entrepreneur, widely known for designing the first commercial microprocessor. He led the 4004 (MCS-4) project and the design group during the first five years of Intel's microprocessor effort. Most importantly, Faggin created in 1968, while working at Fairchild Semiconductor, the self-aligned MOS silicon gate technology (SGT) that made possible dynamic memories, non-volatile memories, CCD image sensors, and the microprocessor. In addition, he further developed at Intel his original SGT into a new methodology for random logic chip design that was essential to the creation of the world's first single chip microprocessor and all other early Intel microprocessors. He was co-founder and CEO of Zilog, the first company solely dedicated to microprocessors. He was also co-founder and CEO of Cygnet Technologies and of Synaptics.

Zilog American manufacturer

Zilog, Inc. is an American manufacturer of 8-bit and 16-bit microcontrollers. Its most famous product is the Z80 series of 8-bit microprocessors that were compatible with the Intel 8080 but significantly cheaper. The Z80 was widely used during the 1980s in many popular home computers such as the TRS-80 and the ZX Spectrum, as well as arcade games such as Pac-Man. The company also made 16- and 32-bit processors, but these did not see widespread use. From the 1990s, the company focused primarily on the microcontroller market.

By March 1976, Zilog had developed the Z80 as well as an accompanying assembler based development system for its customers, and by July 1976, this was formally launched onto the market. [7] (Some of the Z80 support and peripheral ICs were under development at this point, and many of them were launched during the following year.)

Microprocessor development board

A microprocessor development board is a printed circuit board containing a microprocessor and the minimal support logic needed for a computer engineer to become acquainted with the microprocessor on the board and to learn to program it. It also served users of the microprocessor as a method to prototype applications in products.

Early Z80s were manufactured by Synertek and Mostek, before Zilog had its own manufacturing factory ready, in late 1976. These companies were chosen because they could do the ion implantation needed to create the depletion-mode MOSFETs that the Z80 design used as load transistors in order to cope with a single 5 Volt power supply. [8]

Synertek business

Synertek, Inc. was an American semiconductor manufacturer founded in 1973. The initial founding group consisted of Bob Schreiner, Dan Floyd, Zvi Grinfas, Jack Balletto, and Gunnar Wetlesen. The manufacturing technology was MOS/LSI. Initial products included custom designed devices, as well as a line of standard products and then, sometime before 1979, second sourced versions of MOS Technology's successful 6502 8-bit microprocessor, and the Philips/Signetics 2650 processor and Zilog Z8 microcomputer.

Mostek company

Mostek was an integrated circuit manufacturer, founded in 1969 by L. J. Sevin, Louay E. Sharif, Richard L. Petritz and other ex-employees of Texas Instruments. Initially their products were manufactured in Worcester, Massachusetts, however by 1974 most of its manufacturing was done in the Carrollton, Texas facility on Crosby Road. At its peak in the late 1970s, Mostek held an 85% market share of the dynamic random-access memory (DRAM) memory chip market worldwide, until being eclipsed by Japanese DRAM manufacturers who offered equivalent chips at lower prices by dumping memory on the market.

Ion implantation Material and chemical process

Ion implantation is a low-temperature process by which ions of one element are accelerated into a solid target, thereby changing the physical, chemical, or electrical properties of the target. Ion implantation is used in semiconductor device fabrication and in metal finishing, as well as in materials science research. The ions can alter the elemental composition of the target if they stop and remain in the target. Ion implantation also causes chemical and physical changes when the ions impinge on the target at high energy. The crystal structure of the target can be damaged or even destroyed by the energetic collision cascades, and ions of sufficiently high energy can cause nuclear transmutation.

Faggin designed the instruction set to be binary compatible with the Intel 8080 [9] [10] so that most 8080 code, notably the CP/M operating system and Intel's PL/M compiler for 8080 (as well as its generated code), would run unmodified on the new Z80 CPU. Masatoshi Shima designed most of the microarchitecture as well as the gate and transistor levels of the Z80 CPU, assisted by a small number of engineers and layout people. [11] [12] CEO Federico Faggin was actually heavily involved in the chip layout work, together with two dedicated layout people. Faggin worked 80 hours a week in order to meet the tight schedule given by the financial investors, according to himself. [13]

The Z80 offered many improvements over the 8080: [10]

The Z80 took over from the 8080 and its offspring, the 8085, in the processor market, [21] and became one of the most popular 8-bit CPUs. [4] [5] Perhaps a key to the initial success of the Z80 was the built-in DRAM refresh, and other features which allowed systems to be built with fewer support chips (Z80 embedded systems typically use static RAM and hence do not need this refresh).

For the original NMOS design, the specified upper clock frequency limit increased successively from the introductory 2.5  MHz, via the well known 4 MHz (Z80A), up to 6 (Z80B) and 8 MHz (Z80H). [22] [23] The NMOS version has been produced as a 10 MHz part since the late 1980s. CMOS versions were developed with specified upper frequency limits ranging from 4 MHz up to 20 MHz for the version sold today. The CMOS versions allowed low-power sleep with internal state retained, having no lower frequency limit. [24] The fully compatible derivatives HD64180/Z180 [25] [26] and eZ80 are currently specified for up to 33 and 50 MHz respectively.


Programming model and register set

An approximate block diagram of the Z80. There is no dedicated adder for offsets or separate incrementer for R, and no need for more than a single 16-bit temporary register WZ (although the incrementer latches are also used as a 16-bit temporary register, in other contexts). It is the PC and IR registers that are placed in a separate group, with a detachable bus segment, to allow updates of these registers in parallel with the main register bank. Z80 arch.svg
An approximate block diagram of the Z80. There is no dedicated adder for offsets or separate incrementer for R, and no need for more than a single 16-bit temporary register WZ (although the incrementer latches are also used as a 16-bit temporary register, in other contexts). It is the PC and IR registers that are placed in a separate group, with a detachable bus segment, to allow updates of these registers in parallel with the main register bank.

The programming model and register set are fairly conventional, ultimately based on the register structure of the Datapoint 2200 (which the related 8086 family also inherited). The Z80 was designed as an extension of the 8080, created by the same engineers, which in turn was an extension of the 8008. The 8008 was basically a PMOS implementation of the TTL-based CPU of the Datapoint 2200.

This original design allowed register H and L to be paired into a 16-bit address register HL [28] In the 8080 this pairing was generalized into BC and DE, while HL also became usable as a 16-bit accumulator. The 8080 also introduced the important 8-bit immediate data mode for accumulator operations and immediate 16-bit data for HL, BC and DE loads. Furthermore, direct 16-bit copying between HL and memory was now possible, using a direct address. The Z80 orthogonalized this a bit further by making all 16-bit register pairs (including IX and IY) more general purpose, with 16-bit copying directly to and from memory.

The 16-bit IX and IY registers in the Z80 are primarily intended as base address-registers, where a particular instruction supplies a constant offset, but they are also usable as 16-bit accumulators, among other things. The Z80 also introduces a new signed overflow flag and complements the fairly simple 16-bit arithmetics of the 8080 with dedicated instructions for signed 16-bit arithmetics.

The 8080 compatible registers AF, BC, DE, HL are duplicated as two separate banks in the Z80, [29] where the processor can quickly switch from one bank to the other; [30] a feature useful for speeding up responses to single-level, high-priority interrupts. A similar feature was present in the Datapoint 2200 but was never implemented at Intel. The dual register-set makes sense as the Z80 (like most microprocessors at the time) was really intended for embedded use, not for personal computers, or the yet-to-be invented home computers. According to one of the designers, Masatoshi Shima, the market focus was on high performance printers, high-end cash registers, and intelligent terminals, although Ralph Ungermann also saw other opportunities, such as computers. [31] The two register sets also turned out to be quite useful for heavily optimized manual assembly-language coding, such as for floating point arithmetics or home computer games.


The Z80 registers
15141312111009080706050403020100(bit position)
Main registers
AFlagsAF (accumulator and flags)
HLHL (indirect address)
Alternate registers
A'Flags'AF' (accumulator and flags)
H'L'HL' (indirect address)
Index registers
IXIndex X
IYIndex Y
SPStack Pointer
Other registers
 IInterrupt vector
 RRefresh counter
Program counter
PCProgram Counter
Status register
  S Z - H - P N C Flags

As on the 8080, 8-bit registers are typically paired to provide 16-bit versions. The 8080 compatible registers [32] are:

  • AF: 8-bit accumulator (A) and flag bits (F) carry, zero, minus, parity/overflow, half-carry (used for BCD), and an Add/Subtract flag (usually called N) also for BCD
  • BC: 16-bit data/address register or two 8-bit registers
  • DE: 16-bit data/address register or two 8-bit registers
  • HL: 16-bit accumulator/address register or two 8-bit registers
  • SP: stack pointer, 16 bits
  • PC: program counter, 16 bits

The new registers introduced with the Z80 are:

  • IX: 16-bit index or base register for 8-bit immediate offsets or two 8-bit registers
  • IY: 16-bit index or base register for 8-bit immediate offsets or two 8-bit registers
  • I: interrupt vector base register, 8 bits
  • R: DRAM refresh counter, 8 bits (msb does not count)
  • AF': alternate (or shadow) accumulator and flags (toggled in and out with EX AF,AF' )
  • BC', DE' and HL': alternate (or shadow) registers (toggled in and out with EXX)
  • Four bits of interrupt status and interrupt mode status

There is no direct access to the alternate registers; instead, two special instructions, EX AF,AF' and EXX, [32] each toggles one of two multiplexer flip-flops. This enables fast context switches for interrupt service routines: EX AF, AF' may be used alone, for really simple and fast interrupt routines, or together with EXX to swap the whole BC, DE, HL set. This is still several times as fast as pushing the same registers on the stack. Slower, lower priority, or multi level interrupts normally use the stack to store registers, however.

The refresh register, R, increments each time the CPU fetches an opcode (or opcode prefix) and has no simple relationship with program execution. This has sometimes been used to generate pseudorandom numbers in games, and also in software protection schemes.[ citation needed ] It has also been employed as a "hardware" counter in some designs; an example of this is the ZX81, which lets it keep track of character positions on the TV screen by triggering an interrupt at wrap around (by connecting INT to A6).

The interrupt vector register, I, is used for the Z80 specific mode 2 interrupts (selected by the IM 2 instruction). It supplies the high byte of the base address for a 128-entry table of service routine addresses which are selected via an index sent to the CPU during an interrupt acknowledge cycle; this index is simply the low byte part of the pointer to the tabulated indirect address pointing to the service routine. [17] The pointer identifies a particular peripheral chip or peripheral function or event, where the chips are normally connected in a so-called daisy chain for priority resolution. Like the refresh register, this register has also sometimes been used creatively; in interrupt modes 0 and 1 (or in a system not using interrupts) it can be used as simply another 8-bit data register.

The instructions LD A,R and LD A,I affect the Z80 flags register, unlike all the other LD (load) instructions. The Sign (bit 7) and Zero (bit 6) flags are set according to the data loaded from the Refresh or Interrupt source registers. For both instructions, the Parity/Overflow flag (bit 2) is set according to the current state of the IFF2 flip-flop. [33]

Z80 assembly language

Datapoint 2200 and Intel 8008

The first Intel 8008 assembly language was based on a very simple (but systematic) syntax inherited from the Datapoint 2200 design. This original syntax was later transformed into a new, somewhat more traditional, assembly language form for this same original 8008 chip. At about the same time, the new assembly language was also extended to accommodate the added addressing possibilities in the more advanced Intel 8080 chip (the 8008 and 8080 shared a language subset without being binary compatible; however, the 8008 was binary compatible with the Datapoint 2200).

In this process, the mnemonic L, for LOAD, was replaced by various abbreviations of the words LOAD, STORE and MOVE, intermixed with other symbolic letters. The mnemonic letter M, for memory (referenced by HL), was lifted out from within the instruction mnemonic to become a syntactically freestanding operand, while registers and combinations of registers became very inconsistently denoted; either by abbreviated operands (MVI D, LXI H and so on), within the instruction mnemonic itself (LDA, LHLD and so on), or both at the same time (LDAX B, STAX D and so on).

Datapoint 2200 & i8008i8080Z80i8086/i8088
before ca. 1973ca. 197419761978

Illustration of four syntaxes, using samples of equivalent, or (for 8086) very similar, load and store instructions. [35] The Z80 syntax uses parentheses around an expression to indicate that the value should be used as a memory address (as mentioned below), while the 8086 syntax uses brackets instead of ordinary parentheses for this purpose. Both Z80 and 8086 use the + sign to indicate that a constant is added to a base register to form an address

New syntax

Because Intel claimed a copyright on their assembly mnemonics, [36] a new assembly syntax had to be developed for the Z80. This time a more systematic approach was used:

  • All registers and register pairs are explicitly denoted by their full names
  • Parentheses are consistently used to indicate "memory contents at" (constant address or variable pointer dereferencing) with the exception of some jump instructions. [37]
  • All load and store instructions use the same mnemonic name, LD, for LOAD (a return to the simplistic Datapoint 2200 vocabulary); other common instructions, such as ADD and INC, use the same mnemonic regardless of addressing mode or operand size. This is possible because the operands themselves carry enough information.

These principles made it straightforward to find names and forms for all new Z80 instructions, as well as orthogonalizations of old ones, such as LD BC,(1234).

Apart from naming differences, and despite a certain discrepancy in basic register structure, the Z80 and 8086 syntax are virtually isomorphic for a large portion of instructions. Only quite superficial similarities (such as the word MOV, or the letter X, for extended register) exist between the 8080 and 8086 assembly languages, although 8080 programs can be assembled into 8086 object code using a special assembler or translated to 8086 assembly language by a translator program. [38] [39]

Instruction set and encoding

The Z80 uses 252 out of the available 256 codes as single byte opcodes ("root instruction"); the four remaining codes are used extensively as opcode prefixes: [40] CB and ED enable extra instructions and DD or FD selects IX+d or IY+d respectively (in some cases without displacement d) in place of HL. This scheme gives the Z80 a large number of permutations of instructions and registers; Zilog categorizes these into 158 different "instruction types", 78 of which are the same as those of the Intel 8080 [40] (allowing operation of most 8080 programs on a Z80). The Zilog documentation further groups instructions into the following categories:

No multiply instructions are available in the original Z80. [41] Different sizes and variants of additions, shifts, and rotates have somewhat differing effects on flags because most of the flag-changing properties of the 8080 were copied. However, the parity flag bit P of the 8080 (bit 2) is called P/V (parity/overflow) in the Z80 as it serves the additional purpose of a twos complement overflow indicator, a lacking feature in the 8080. Arithmetic instructions on the Z80 set it to indicate overflow rather than parity, while bitwise instructions still use it as a parity flag. This new overflow flag is used for all new Z80-specific 16-bit operations (ADC, SBC) as well as for 8-bit arithmetic operations, although the 16-bit operations inherited from the 8080 (ADD, INC, DEC) does not affect it. Also, bit 1 of the flags register (a spare bit on the 8080) is used as a flag, N, that indicates whether the last arithmetic instruction executed was a subtraction or addition. The Z80 version of the DAA instruction checks the N flag and behaves accordingly, so a (hypothetical) subtraction followed later by DAA will yield a different result on an old 8080 than on the Z80. However, this would likely be erroneous code on the 8080, as DAA was defined for addition only on that processor.

The Z80 has six new LD instructions that can load the DE, BC, and SP register pairs from memory, and load memory from these three register pairs—unlike the 8080. [42] As on the 8080, load instructions do not affect the flags (except for the special purpose I and R register loads). A result of a regular encoding (common with the 8080) is that each of the 8-bit registers can be loaded from themselves (e.g. LD A,A). This is effectively a NOP.

Unlike the 8080, the Z80 can jump to a relative address (jr instead of jp) using a signed 8-bit displacement. Only the Zero and Carry flags can be tested for these new two-byte JR instructions. A two-byte instruction specialized for program looping is also new to the Z80. DJNZ (Decrement Jump if Non-Zero) takes a signed 8-bit displacement as an immediate operand. The B register is decremented. If the result is nonzero then program execution jumps relative to the address of the PC plus the displacement. The flags remain unaltered. To perform an equivalent loop on an 8080 would require separate decrement and jump (to a two-byte absolute address) instructions, and the flag register would be altered.

The index register (IX/IY) instructions can be useful for accessing data organised in fixed heterogenous structures (such as records) or at fixed offsets relative a variable base address (as in recursive stack frames) and can also reduce code size by removing the need for multiple short instructions using non-indexed registers. However, although they may save speed in some contexts when compared to long/complex "equivalent" sequences of simpler operations, they incur a lot of additional CPU time (e.g. 19 T-states to access one indexed memory location vs. as little as 11 to access the same memory using HL and INCrement it to point to the next). Thus, for simple or linear accesses of data, IX and IY tend to be slower. Still, they may be useful in cases where the 'main' registers are all occupied, by removing the need to save/restore registers. Their officially undocumented 8-bit halves (see below) can be especially useful in this context, for they incur less slowdown than their 16-bit parents. Similarly, instructions for 16-bit additions are not particularly fast (11 clocks) in the original Z80; nonetheless, they are about twice as fast as performing the same calculations using 8-bit operations, and equally important, they reduce register usage.

The 10-year-newer microcoded Z180 design could initially afford more "chip area", permitting a slightly more efficient implementation (using a wider ALU, among other things); similar things can be said for the Z800, Z280, and Z380. However, it was not until the fully pipelined eZ80 was launched in 2001 that those instructions finally became approximately as cycle-efficient as it is technically possible to make them, i.e. given the Z80 encodings combined with the capability to do an 8-bit read or write every clock cycle.[ citation needed ]

Undocumented instructions

The index registers, IX and IY, were intended as flexible 16 bit pointers, enhancing the ability to manipulate memory, stack frames and data structures. Officially, they were treated as 16-bit only. In reality, they were implemented as a pair of 8-bit registers, [43] in the same fashion as the HL register, which is accessible either as 16 bits or separately as the High and Low registers. Even the binary opcodes (machine language) were identical, but preceded by a new opcode prefix. [44] Zilog published the opcodes and related mnemonics for the intended functions, but did not document the fact that every opcode that allowed manipulation of the H and L registers was equally valid for the 8 bit portions of the IX and IY registers. As an example, the opcode 26h followed by an immediate byte value (LD H,n) will load that value into the H register. Preceding this two-byte instruction with the IX register's opcode prefix, DD, would instead result in the most significant 8 bits of the IX register being loaded with that same value. A notable exception to this would be instructions similar to LD H,(IX+d) which make use of both the HL and IX or IY registers in the same instruction; [44] in this case the DD prefix is only applied to the (IX+d) portion of the instruction.

There are several other undocumented instructions as well. [45] Undocumented or illegal opcodes are not detected by the Z80 and have various effects, some of which are useful. However, as they are not part of the formal definition of the instruction set, different implementations of the Z80 are not guaranteed to work the same way for every undocumented opcode.


The OTDR instruction does not conform to the Z80 documentation. Both the OTDR and OTIR instructions are supposed to leave the carry (C) flag unmodified. The OTIR instruction operates correctly; however, during the execution of the OTDR instruction, the carry flag takes the results of a spurious compare between the accumulator (A) and the last output of the OTDR instruction.

Example code

The following Z80 assembly source code is for a subroutine named memcpy that copies a block of data bytes of a given size from one location to another. Important: the example code does not handle a certain case where the destination block overlaps the source; a fatal bug. The sample code is extremely inefficient, intended to illustrate various instruction types, rather than best practices for speed. In particular, the Z80 has a single instruction that will execute the entire loop (LDIR). The data block is copied one byte at a time, and the data movement and looping logic utilizes 16-bit operations. Note that the assembled code is binary-compatible with the Intel 8080 and 8085 CPUs.

                                                                                                                                                                                                   1000              1000              1000 78           1001 B1           1002 C8           1003 1A           1004 77           1005 13           1006 23           1007 0B           1008 C3 00 10     100B 
; memcpy --; Copy a block of memory from one location to another.;; Entry registers;      BC - Number of bytes to copy;      DE - Address of source data block;      HL - Address of target data block;; Return registers;      BC - Zeroorg1000h;Origin at 1000hmemcpypubliclooplda,b;Test BC,orc;If BC = 0,retz;Returnlda,(de);Load A from (DE)ld(hl),a;Store A into (HL)incde;Increment DEinchl;Increment HLdecbc;Decrement BCjploop;Repeat the loopend

Instruction execution

Each instruction is executed in steps that are usually termed machine cycles (M-cycles), each of which can take between three and six clock periods (T-cycles). [46] Each M-cycle corresponds roughly to one memory access or internal operation. Many instructions actually end during the M1 of the next instruction which is known as a fetch/execute overlap.

Examples of typical instructions (R=read, W=write)


1 [47] INCBCopcode
2 [48] ADDA,nopcoden
3 [49] ADDHL,DEopcodeinternalinternal
4 [50] SETb,(HL)prefixopcodeR(HL), setW(HL)
5 [51] LD(IX+d),nprefixopcodedn,addW(IX+d)
6 [52] INC(IY+d)prefixopcodedaddR(IY+d),incW(IY+d)

The Z80 machine cycles are sequenced by an internal state machine which builds each M-cycle out of 3, 4, 5 or 6 T-cycles depending on context. This avoids cumbersome asynchronous logic and makes the control signals behave consistently at a wide range of clock frequencies. It also means that a higher frequency crystal must be used than without this subdivision of machine cycles (approximately 2–3 times higher). It does not imply tighter requirements on memory access times, since a high resolution clock allows more precise control of memory timings and so memory can be active in parallel with the CPU to a greater extent, allowing more efficient use of available memory bandwidth.[ citation needed ]

One central example of this is that, for opcode fetch, the Z80 combines two full clock cycles into a memory access period (the M1-signal). In the Z80 this signal lasts for a relatively larger part of the typical instruction execution time than in a design such as the 6800, 6502, or similar, where this period would typically last typically 30-40% of a clock cycle.[ citation needed ] With memory chip affordability (i.e. access times around 450-250 ns in the 1980s[ citation needed ]) typically determining the fastest possible access time, this meant that such designs were locked to a significantly longer clock cycle (i.e. lower internal clock speed) than the Z80.

Memory was generally slow compared to the state machine sub-cycles (clock cycles) used in contemporary microprocessors. The shortest machine cycle that could safely be used in embedded designs has therefore often been limited by memory access times, not by the maximum CPU frequency (especially so during the home computer era). However, this relation has slowly changed during the last decades, particularly regarding SRAM; cacheless, single-cycle designs such as the eZ80 have therefore become much more meaningful recently.

The content of the refresh register R is sent out on the lower half of the address bus along with a refresh control signal while the CPU is decoding and executing the fetched instruction. During refresh the contents of the Interrupt register I are sent out on the upper half of the address bus. [53]

Compatible peripherals

Zilog introduced a number of peripheral parts for the Z80, which all support the Z80's interrupt handling system and I/O address space. These include the Counter/Timer Channel (CTC), [54] the SIO (Serial Input Output), the DMA (Direct Memory Access), the PIO (Parallel Input-Output) and the DART (Dual Asynchronous Receiver Transmitter). As the product line developed, low-power, high-speed and CMOS versions of these chips were introduced.

Like the 8080, 8085 and 8086 processors, but unlike processors such as the Motorola 6800 and MOS Technology 6502, the Z80 and 8080 has a separate control line and address space for I/O instructions. While some Z80-based computers such as the Osborne 1 used "Motorola-style" memory mapped input/output devices, usually the I/O space was used to address one of the many Zilog peripheral chips compatible with the Z80. Zilog I/O chips supported the Z80's new mode 2 interrupts which simplified interrupt handling for large numbers of peripherals.

The Z80 was officially described as supporting 16-bit (64 KB) memory addressing, and 8-bit (256 ports) I/O-addressing. All I/O instructions actually assert the entire 16-bit address bus. OUT (C),reg and IN reg,(C) places the contents of the entire 16 bit BC register on the address bus; [55] OUT (n),A and IN A,(n) places the contents of the A register on b8-b15 of the address bus and n on b0-b7 of the address bus. A designer could choose to decode the entire 16 bit address bus on I/O operations in order to take advantage of this feature, or use the high half of the address bus to select subfeatures of the I/O device. This feature has also been used to minimise decoding hardware requirements, such as in the Amstrad CPC/PCW and ZX81.

Second sources and derivatives

Second sources

Mostek's Z80: MK3880 KL Mostek MK3880P Z80.jpg
Mostek's Z80: MK3880
NEC's mPD780C Z80 second-sourced by NEC KL NEC uPD780C.jpg
NEC's μPD780C Z80 second-sourced by NEC
Sharp's LH0080 Sharp version of the Z80 Sharp LH0080A.jpg
Sharp's LH0080 Sharp version of the Z80
The T34BM1, a Soviet Z80 clone KL USSR T34BM1 Z80 Black Background.jpg
The T34BM1, a Soviet Z80 clone
Toshiba TMPZ84C015; a standard Z80 with several Z80-family peripherals on chip in a QFP package TMPZ84C015AF 01.png
Toshiba TMPZ84C015; a standard Z80 with several Z80-family peripherals on chip in a QFP package
The Z80 compatible Hitachi HD64180 HD64180 DIP.jpg
The Z80 compatible Hitachi HD64180
Z180 in a PLCC package Z180 PLCC 1988.png
Z180 in a PLCC package
The Z80 compatible R800 in QFP R800 02.jpg
The Z80 compatible R800 in QFP
The Z280 in a PLCC package Z280 PLCC 1987.png
The Z280 in a PLCC package

Mostek, who produced the first Z80 for Zilog, offered it as second-source as MK3880. SGS-Thomson (now STMicroelectronics) was a second-source, too, with their Z8400. Sharp and NEC developed second sources for the NMOS Z80, the LH0080, µPD780-1 and µPD780C respectively. The µPD780C was used in the Sinclair ZX80 and ZX81, original versions of the ZX Spectrum, and several MSX computers, and in musical synthesizers such as Oberheim OB-8 and others, while the µPD780-1 (a Z80A part which ran at 4MHz) was used in Sega’s SG-1000 game console. The LH0080 was used in various home computers and personal computers made by Sharp and other Japanese manufacturers, including Sony MSX computers, and a number of computers in the Sharp MZ series. [56]

Toshiba made a CMOS-version, the TMPZ84C00, which is believed[ by whom? ] (but not verified) to be the same design also used by Zilog for its own CMOS Z84C00. There were also Z80-chips made by GoldStar (now LG) and the BU18400 series of Z80-clones (including DMA, PIO, CTC, DART and SIO) in NMOS and CMOS made by ROHM Electronics.

In East Germany, an unlicensed clone of the Z80, known as the U880, was manufactured. It was very popular and was used in Robotron's and VEB Mikroelektronik Mühlhausen's computer systems (such as the KC85-series) and also in many self-made computer systems. In Romania another unlicensed clone could be found, named MMN80CPU and produced by Microelectronica, used in home computers like TIM-S, HC, COBRA.

Also, several clones of Z80 were created in the Soviet Union, notable ones being the T34BM1, also called КР1858ВМ1 (parallelling the Soviet 8080-clone KR580VM80A). The first marking was used in pre-production series, while the second had to be used for a larger production. Though, due to the collapse of Soviet microelectronics in the late 1980s, there are many more T34BM1s than КР1858ВМ1s.[ citation needed ]


Compatible with the original Z80
Partly compatible
No longer produced

Notable uses

Desktop computers

The Z80A was used as the CPU in a number of gaming consoles, such as this ColecoVision. ColecoVision-Open-FL.jpg
The Z80A was used as the CPU in a number of gaming consoles, such as this ColecoVision.

During the late 1970s and early 1980s, the Z80 was used in a great number of fairly anonymous business-oriented machines with the CP/M operating system, a combination that dominated the market at the time. [67] [68] Four well-known examples of Z80 business computers running CP/M are the Heathkit H89, the portable Osborne 1, the Kaypro series, and the Epson QX-10. Less well-known was the expensive high-end Otrona Attache. [69] Research Machines manufactured the 380Z and 480Z microcomputers which were networked with a thin Ethernet type LAN and CP/NET in 1981. Other manufacturers of such systems included Televideo, Xerox (820 range), Sanyo (MBC-1000/1100/1200), [70] [71] Toshiba (T100) [72] and a number of more obscure firms such as Altos, NorthStar, [73] and Eagle. Some systems used multi-tasking operating system software (like MP/M) to share the one processor between several concurrent users.

In the U.S., the Radio Shack TRS-80, introduced in 1977, as well as the Models II, III, 4, and the proposed Model V, used the Z80. A number of TRS-80 clones were produced by companies like Lobo (Max-80), LNW (LNW-80), and Hong Kong-based EACA (Video Genie and derivatives TRZ-80, PMC-80, and Dick Smith System 80). In the Netherlands a TRS-80 Model III clone was produced that had CP/M capability; this was the Aster CT-80. The Coleco Adam hybrid computer/game console could use Colecovision games as well as CP/M. An early Z80 home computer was the Exidy Sorcerer. In the United Kingdom, Sinclair Research used the Z80 and Z80A in its ZX80, ZX81, and ZX Spectrum home computers. These were marketed in the US by Timex as the Timex/Sinclair series. Amstrad used the Z80A in their Amstrad CPC and PCW ranges and an early UK computer, the Nascom 1 and 2 also used it. The Z80 powered a great many home computers adhering to the MSX standard in Japan, Asia, and to a lesser extent, Europe and South America (some 5 million in Japan alone). Also in Japan Sharp used the Z80 in its MZ and X1 series. The Hong Kong-based VTech made its Laser 200 home computer with a Z80. In Germany an Apple-CP/M hybrid called the Base 108 paired a Z80 with a 6502. Similarly the Commodore 128 featured a Z80 processor alongside its MOS Technology 8502 processor for CP/M compatibility. [74] Other 6502 architecture computers on the market at the time, such as the BBC Micro, Apple II, [75] and the 6510 based Commodore 64, [76] could make use of the Z80 with an external unit, a plug-in card, or an expansion ROM cartridge. The Microsoft Z-80 SoftCard for the Apple II was a particularly successful add-on card and one of Microsoft's few hardware products of the era.

In 1981, Multitech (later to become Acer) introduced the Microprofessor I, a simple and inexpensive training system for the Z80 microprocessor. Currently, it is still manufactured and sold by Flite Electronics International Limited in Southampton, England.

A Sinclair ZX Spectrum which used a Z80 Clocked at 3.5 MHz ZX Spectrum.jpg
A Sinclair ZX Spectrum which used a Z80 Clocked at 3.5 MHz

Embedded systems and consumer electronics

Z80-based PABX. The Z80 is third chip in from the left, to the right of the chip with the hand-written white label on it. PABX.jpg
Z80-based PABX. The Z80 is third chip in from the left, to the right of the chip with the hand-written white label on it.

The Zilog Z80 has long been a popular microprocessor in embedded systems and microcontroller cores, [32] where it remains in widespread use today. [4] [77] The following list provides examples of such applications of the Z80, including uses in consumer electronics products.


Consumer electronics

Musical instruments

See also


  1. Only in CMOS, National made no NMOS version, according to Oral History with Federico Faggin
  2. Source: Federico Faggin oral history.
  3. These were named the Z80 CTC (counter/timer), Z80 DMA (direct memory access), Z80 DART (dual asynchronous receiver-transmitter), Z80 SIO (synchronous communication controller), and Z80 PIO (parallel input/output)
  4. 1 2 3 4 Balch, Mark (2003-06-18). "Digital Fundamentals". Complete Digital Design: A Comprehensive Guide to Digital Electronics and Computer System Architecture. Professional Engineering. New York, New York: McGraw-Hill Professional. p. 122. ISBN   0-07-140927-0.
  5. 1 2 The Seybold report on professional computing. Seybold Publications. 1983. In the 8-bit world, the two most popular microcomputers are the Z80 and 6502 computer chips.
  6. Zilog included several "traps" in the layout of the chip to try to delay this copying. According to Faggin, an NEC engineer later told him it had cost them several months of work, before they were able to get their μPD780 to function.
  7. Anderson 1994 , p. 51
  8. Zilog manufactured the Z80 as well as most of their other products for many years until they sold their manufacturing plants and become the "fabless" company they are today.
  9. Anderson 1994 , p. 57
  10. 1 2 Brock, Gerald W. (2003). The second information revolution. Harvard University Press. ISBN   978-0-674-01178-6.
  11. "History of the 8-bit: travelling far in a short time". InfoWorld. Vol. 4 no. 47. Palo Alto, CA: Popular Computing Inc. November 29, 1982. pp. 58–60. ISSN   0199-6649.
  12. Shima, Masatoshi; Federico Faggin; Ralph Ungermann (August 19, 1976). "Z-80 chip set heralds third microprocessor generation". Electronics. New York. 49 (17): 32–33 McGraw–Hill.
  13. See Federico Faggin, oral history.
  14. Mathur. Introduction to Microprocessors. p. 111. ISBN   978-0-07-460222-5. The register architecture of the Z80 is more innovative than that of the 8085
  15. Ciarcia 1981 , pp. 31,32
  16. Although the 8080 had 16-bit addition and 16-bit increment and decrement instructions, it had no explicit 16-bit subtraction, and no overflow flag. The Z80 complemented this with the ADC HL,rr and SBC HL,rr instructions which sets the new overflow flag accordingly. (The 8080 compatible ADD HL,rr does not.)
  17. 1 2 Wai-Kai Chen (2002). The circuits and filters handbook. CRC Press. p. 1943. ISBN   978-0-8493-0912-0. interrupt processing commences according to the interrupt method stipulated by the IM i, i=0, 1, or 2, instruction. If i=1, for direct method, the PC is loaded with 0038H. If i=0, for vectored method, the interrupting device has the opportunity to place the op-code for one byte . If i=2, for indirect vector method, the interrupting device must then place a byte . The Z80 then uses this byte where one of 128 interrupt vectors can be selected by the byte .
  18. Notably to simultaneously handle the 32-bit mantissas of two operands in the 40-bit floating point format used in the Sinclair home computers. They were also used in a similar fashion in some earlier but lesser known Z80 based computers, such as the Swedish ABC 80 and ABC 800.
  19. As this refresh does not need to transfer any data, just output sequential row-addresses, it occupies less than 1.5 T-states. The dedicated M1-signal (machine cycle one) in the Z80 can be used to allow memory chips the same amount of access time for instruction fetches as for data access, i.e almost two full T-states out of the 4T fetch cycle (as well as out of the 3T data read cycle). The Z80 could use memory with the same range of access times as the 8080 (or the 8086) at the same clock frequency. This long M1-signal (relative to the clock) also meant that the Z80 could employ about 4-5 times the internal frequency of a 6800, 6502 or similar using the same type of memory.
  20. "Z80 Special Reset".
  21. Adrian, Andre. "Z80, the 8-bit Number Cruncher".
  22. Popular Computing. McGraw-Hill. 1983. p. 15.
  23. Markoff, John (18 October 1982). "Zilog's speedy Z80 soups up 8-bit to 16-bit perfofrmance". InfoWorld . InfoWorld Media Group. p. 1. ISSN   0199-6649.
  24. Unlike the original nMOS version, which used dynamic latches and could not be stopped for more than a few thousand clock cycles.
  25. Electronic design. Hayden. 1988. p. 142. In addition to supporting the entire Z80 instruction set, the Z180
  26. Ganssle, Jack G. (1992). "The Z80 Lives!". The designers picked an architecture compatible with the Z80, giving Z80 users a completely software compatible upgrade path. The 64180 processor runs every Z80 instruction exactly as a Z80 does
  27. "Down to the silicon: how the Z80's registers are implemented".
  28. This variable HL pointer was actually the only way to access memory (for data) in the Datapoint 2200, and hence also in the Intel 8008. No direct addresses could be used to access data.
  29. Kilobaud. 1001001. 1977. p. 22.
  30. Zaks, Rodnay (1982). Programming the Z80 (3rd ed.). SYBEX. p. 62. ISBN   978-0-89588-069-7.
  31. See Z80 oral history.
  32. 1 2 3 Steve Heath. (2003). Embedded systems design. Oxford: Newnes. p. 21. ISBN   978-0-7506-5546-0.
  33. "Z80 Flag Affection". www.z80.info. Thomas Scherrer. Retrieved June 14, 2016.
  34. It is not actually possible to encode this instruction on the Intel 8086 or later processors. See Intel reference manuals.
  35. Frank Durda IV. "8080/Z80 Instruction Set".
  36. Jump (JP) instructions, which load the program counter with a new instruction address, do not themselves access memory. Absolute and relative forms of the jump reflect this by omitting the round brackets from their operands. Register based jump instructions such as "JP (HL)" include round brackets in an apparent deviation from this convention. "Z80 Relocating Macro Assembler User's Guide" (PDF). p. B–2. Archived from the original (PDF) on 2011-07-20. Retrieved 2009-06-04.
  37. Scanlon, Leo J. (1988). 8086/8088/80286 assembly language. Brady Books. p. 12. ISBN   978-0-13-246919-7. The 8086 is software-compatible with the 8080 at the assembly-language level.
  38. Nelson, Ross P. (1988). The 80386 book: assembly language programmer's guide for the 80386. Microsoft Press. p. 2. ISBN   978-1-55615-138-5. An Intel translator program could convert 8080 assembler programs into 8086 assembler programs
  39. 1 2 "Z80 CPU Introduction". Zilog. 1995. It has a language of 252 root instructions and with the reserved 4 bytes as prefixes, accesses an additional 308 instructions.
  40. Sanchez, Julio; Canton, Maria P. (2008). Software Solutions for Engineers And Scientists. Taylor & Francis. p. 65. ISBN   978-1-4200-4302-0. The 8-bit microprocessors that preceded the 80x86 family (such as the Intel 8080, the Zilog Z80, and the Motorola) did not include multiplication.
  41. "8080/Z80 Instruction Sets". Quick and Dirty 8080 Assembler. Frank Durda. Retrieved July 25, 2016.
  42. Froehlich, Robert A. (1984). The free software catalog and directory. Crown Publishers. p. 133. ISBN   978-0-517-55448-7. Undocumented Z80 codes allow 8 bit operations with IX and IY registers.
  43. 1 2 Bot, Jacco J. T. "Z80 Undocumented Instructions". Home of the Z80 CPU. If an opcode works with the registers HL, H or L then if that opcode is preceded by #DD (or #FD) it works on IX, IXH or IXL (or IY, IYH, IYL), with some exceptions. The exceptions are instructions like LD H,IXH and LD L,IYH
  44. Robin Nixon The Amstrad Notepad Advanced User Guide ,Robin Nixon, 1993 ISBN   1-85058-515-6, pages 219-223
  45. Zilog (2005). Z80 Family CPU User Manual (PDF). Zilog. p. 11.
  46. Ciarcia 1981 , p. 65
  47. Zaks, Rodnay (1989). Programming the Z80. Sybex. p. 200. ISBN   978-0-89588-069-7. ADD A, n Add accumulator with immediate data n. MEMORY Timing: 2 M cycles; 7 T states.
  48. Ciarcia 1981 , p. 63
  49. Ciarcia 1981 , p. 77
  50. Ciarcia 1981 , p. 36
  51. Ciarcia 1981 , p. 58
  52. "Z80 User Manual, Special Registers pg. 3". www.zilog.com. Zilog. Retrieved June 14, 2016.
  53. "Z80 Family CPU Peripherals User Manual" (PDF). EEWORLD Datasheet. ZiLOG. 2001. Retrieved April 30, 2014.[ permanent dead link ]
  54. Young, Sean (1998). "Z80 Undocumented Features (in software behaviour)". The I/O instructions use the whole of the address bus, not just the lower 8 bits. So in fact, you can have 65536 I/O ports in a Z80 system (the Spectrum uses this). IN r,(C), OUT (C),r and all the I/O block instructions put the whole of BC on the address bus. IN A,(n) and OUT (n),A put A*256+n on the address bus.
  55. "Overview of the SHARP MZ-series". SharpMZ.org. Archived from the original on 2008-03-27. Retrieved 2011-07-28. Most MZ's use the 8bit CPU LH0080 / Z80 [...]
  56. Ganssle, Jack G. (1992). "The Z80 Lives!". The 64180 is a Hitachi-supplied Z80 core with numerous on-chip "extras". Zilog's version is the Z180, which is essentially the same part.
  57. Ganssle, Jack G. (1992). "The Z80 Lives!". Both Toshiba and Zilog sell the 84013 and 84015, which are Z80 cores with conventional Z80 peripherals integrated on-board.
  58. "EZ80 ACCLAIM Product Family". Zilog.
  59. Electronic Business Asia. Cahners Asia Limited. 1997. p. 5. Kawasaki's KL5C80A12, KL5C80A16 and KL5C8400 are high speed 8-bit MCUs and CPU. Their CPU code, KC80 is compatible with Zilog's Z80 at binary level. KC80 executes instructions about four times faster than Z80 at the same clock rate
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  61. "Projects :: OpenCores".
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  63. Axelson, Jan (2003). Embedded ethernet and internet complete. Lakeview research. p. 93. ISBN   978-1-931448-00-0. Rabbit Semiconductor's Rabbit 3000 microprocessor, which is a much improved and enhanced derivative of ZiLOG, Inc.'s venerable Z80 microprocessor.
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  93. Daniel Sanchez-Crespo Dalmau (2004). Core techniques and algorithms in game programming. Indianapolis, Ind.: New Riders. p. 14. ISBN   978-0-13-102009-2. Internally, both the NES and Master System were equipped with 8-bit processors (a 6502 and a Zilog Z80, respectively)
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The Intel 4004 is a 4-bit central processing unit (CPU) released by Intel Corporation in 1971. It was the first commercially available microprocessor by Intel, and the first in a long line of Intel CPUs.

Zilog Z8000 16-bit microprocessor

The Z8000 is a 16-bit microprocessor introduced by Zilog in early 1979, between the launch of the Intel 8086 and the Motorola 68000. The architecture was designed by Bernard Peuto while the logic and physical implementation was done by Masatoshi Shima, assisted by a small group of people. The Z8000 was not Z80-compatible, and although it saw steady use well into the 1990s, it was not very widely used. However, the Z16C01 and Z16C02 Serial Communication Controllers still use the Z8000 core.


The NEC V20 (μPD70108) was a processor made by NEC that was a reverse-engineered, pin-compatible version of the Intel 8088 with an instruction set compatible with the Intel 80186. The V20 was introduced in 1982, and the V30 debuted in 1983.

Zilog Z180

The Zilog Z180 eight-bit processor is a successor of the Z80 CPU. It is compatible with the large base of software written for the Z80. The Z180 family adds higher performance and integrated peripheral functions like clock generator, 16-bit counters/timers, interrupt controller, wait-state generators, serial ports and a DMA controller. It uses separate read and write strobes, sharing similar timings with the Z80 and Intel processors. The on-chip memory management unit (MMU) has the capability of addressing up to 1 MB of memory. It is possible to configure the Z180 to operate as the Hitachi HD64180.

Zilog Z380

The Z380 is a Zilog 16-bit/32-bit processor from 1994. It is Z80 compatible, but it was released much later than its competitors and as a result was never able to gain any significant market leverage. On the other hand, the newer and faster eZ80 family has been more successful recently.

Intel 8087

The Intel 8087, announced in 1980, was the first x87 floating-point coprocessor for the 8086 line of microprocessors.

Zilog eZ80 8-bit microprocessor

The Zilog eZ80 is an 8-bit microprocessor from Zilog which is essentially an updated version of the company's earlier Z80 8-bit microprocessor.

In computer engineering, an orthogonal instruction set is an instruction set architecture where all instruction types can use all addressing modes. It is "orthogonal" in the sense that the instruction type and the addressing mode vary independently. An orthogonal instruction set does not impose a limitation that requires a certain instruction to use a specific register.

Signetics 2650 8-bit microprocessor

The Signetics 2650 was an 8-bit microprocessor introduced in mid-1975. According to Adam Osborne's book An Introduction to Microprocessors Vol 2: Some Real Products, it was "the most minicomputer-like" of the microprocessors available at the time.

The history of general-purpose CPUs is a continuation of the earlier history of computing hardware.

In computer architecture, 16-bit integers, memory addresses, or other data units are those that are 16 bits wide. Also, 16-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 16-bit microcomputers are computers in which 16-bit microprocessors were the norm.


Further reading