The Fujitsu FR (Fujitsu RISC) is a 32-bit RISC processor family. [1] New variants include a floating point unit and partly video input analog-to-digital converter and digital signal processor. It is supported by Softune, GNU Compiler Collection and other integrated development environments.
Fujitsu FR are used to control previous versions of Milbeaut signal processors specialized for image processing. [2] [3] Although variants of the 6th generation in 2011 and later generations changed to dual-core ARM architecture, ASSP/ASIC variants with FR controller are continued. They are also used as processor cores inside versions 1 to 3 of the Nikon Expeed image processors (versions 3A and 4 have moved to ARM CPUs). [4]
A microprocessor is a computer processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, and control circuitry required to perform the functions of a computer's central processing unit (CPU). The IC is capable of interpreting and executing program instructions and performing arithmetic operations. The microprocessor is a multipurpose, clock-driven, register-based, digital integrated circuit that accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output. Microprocessors contain both combinational logic and sequential digital logic, and operate on numbers and symbols represented in the binary number system.
ARM is a family of RISC instruction set architectures (ISAs) for computer processors. Arm Holdings develops the ISAs and licenses them to other companies, who build the physical devices that use the instruction set. It also designs and licenses cores that implement these ISAs.
In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in 32-bit units. Compared to smaller bit widths, 32-bit computers can perform large calculations more efficiently and process more data per clock cycle. Typical 32-bit personal computers also have a 32-bit address bus, permitting up to 4 GB of RAM to be accessed, far more than previous generations of system architecture allowed.
In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit central processing units (CPU) and arithmetic logic units (ALU) are those that are based on processor registers, address buses, or data buses of that size. A computer that uses such a processor is a 64-bit computer.
VxWorks is a real-time operating system developed as proprietary software by Wind River Systems, a subsidiary of Aptiv. First released in 1987, VxWorks is designed for use in embedded systems requiring real-time, deterministic performance and in many cases, safety and security certification for industries such as aerospace, defense, medical devices, industrial equipment, robotics, energy, transportation, network infrastructure, automotive, and consumer electronics.
Intel's i960 was a RISC-based microprocessor design that became popular during the early 1990s as an embedded microcontroller. It became a best-selling CPU in that segment, along with the competing AMD 29000. In spite of its success, Intel stopped marketing the i960 in the late 1990s, as a result of a settlement with DEC whereby Intel received the rights to produce the StrongARM CPU. The processor continues to be used for a few military applications.
The ITRON project was the first sub-project of the TRON project. It has formulated and defined Industrial TRON (ITRON) specification for an embedded real-time OS (RTOS) kernel.
V850 is a 32-bit RISC CPU architecture produced by Renesas Electronics for embedded microcontrollers. It was designed by NEC as a replacement for their earlier NEC V60 family, and was introduced shortly before NEC sold their designs to Renesas in the early 1990s. It has continued to be developed by Renesas as of 2018.
The Fujitsu FR-V is one of the very few processors ever able to process both a very long instruction word (VLIW) and vector processor instructions at the same time, increasing throughput with high parallel computing while increasing performance per watt and hardware efficiency. The family was presented in 1999. Its design was influenced by the VPP500/5000 models of the Fujitsu VP/2000 vector processor supercomputer line.
The history of general-purpose CPUs is a continuation of the earlier history of computing hardware.
NeuroMatrix is a digital signal processor (DSP) series developed by NTC Module. The DSP has a VLIW/SIMD architecture. It consists of a 32-bit RISC core and a 64-bit vector co-processor. The vector co-processor supports vector operations with elements of variable bit length and is optimized to support the implementation of artificial neural networks. From this derives the name NeuroMatrix Core (NMC). Newer devices contain multiple DSP cores and additional ARM or PowerPC 470 cores.
An image processor, also known as an image processing engine, image processing unit (IPU), or image signal processor (ISP), is a type of media processor or specialized digital signal processor (DSP) used for image processing, in digital cameras or other devices. Image processors often employ parallel computing even with SIMD or MIMD technologies to increase speed and efficiency. The digital image processing engine can perform a range of tasks. To increase the system integration on embedded devices, often it is a system on a chip with multi-core processor architecture.
BIONZ is a line of image processors used in Sony digital cameras.
The Nikon Expeed image/video processors are media processors for Nikon's digital cameras. They perform a large number of tasks: Bayer filtering, demosaicing, image sensor corrections/dark-frame subtraction, image noise reduction, image sharpening, image scaling, gamma correction, image enhancement/Active D-Lighting, colorspace conversion, chroma subsampling, framerate conversion, lens distortion/chromatic aberration correction, image compression/JPEG encoding, video compression, display/video interface driving, digital image editing, face detection, audio processing/compression/encoding and computer data storage/data transmission.
The discontinued SPARClite RISC processor family was based on the 32-bit SPARC V8 architecture. It was manufactured in (approximately) the 1990s by Fujitsu, with the designation MB8683x. It was used in many embedded applications. It was followed by the Fujitsu FR and FR-V processors.
Softune is an Integrated development environment from Fujitsu for the Fujitsu FR, FR-V and F²MC processor families. It provides an REALOS μITRON realtime kernel.
The Socionext Milbeaut image/video processors are media processors in multi-processor system on a chip architecture. Started by Fujitsu with the M-1 Series in 2000 each generation has several variants regarding included modules and processor-cores, built for mobile phones, digital compact cameras, MILCs and DSLRs like Leica M and Leica S2, Nikon DSLRs, some Pentax K mount cameras and for the Sigma True-II processor.
RISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. The project began in 2010 at the University of California, Berkeley, transferred to the RISC-V Foundation in 2015, and on to RISC-V International, a Swiss non-profit entity, in November 2019. Like several other RISC ISAs, e.g. Amber (ARMv2) or OpenRISC, RISC-V is offered under royalty-free open-source licenses. The documents defining the RISC-V instruction set architecture (ISA) are offered under a Creative Commons license or a BSD License.