IBM Enterprise Systems Architecture

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IBM Enterprise Systems Architecture is an instruction set architecture introduced by IBM as ESA/370 in 1988. It is based on the IBM System/370-XA architecture.

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It extended the dual-address-space mechanism introduced in later IBM System/370 models by adding a new mode in which general-purpose registers 1-15 are each associated with an access register referring to an address space, with instruction operands whose address is computed with a given general-purpose register as a base register will be in the address space referred to by the corresponding address register.

The later ESA/390, introduced in 1990, added a facility to allow device descriptions to be read using channel commands and, in later models, added instructions to perform IEEE 754 floating-point operations and increased the number of floating-point registers from 4 to 16.

Enterprise Systems Architecture is essentially a 32-bit architecture; as with System/360, System/370, and 370-XA, the general-purpose registers are 32 bits long, and the arithmetic instructions support 32-bit arithmetic. Only byte-addressable real memory (Central Storage) and Virtual Storage addressing is limited to 31 bits, as is the case with 370-XA. (IBM reserved the most significant bit to easily support applications expecting 24-bit addressing, as well as to sidestep a problem with extending two instructions to handle 32-bit unsigned addresses.) It maintains problem state backward compatibility dating back to 1964 with the 24-bit-address/32-bit-data (System/360 and System/370) and subsequent 24/31-bit-address/32-bit-data architecture (System/370-XA). However, the I/O subsystem is based on System/370 Extended Architecture (S/370-XA), not on the original S/370 I/O instructions.

ESA/370 architecture

ESA/370
Designer IBM
Bits32-bit
Introduced1988;36 years ago (1988)
Design CISC
TypeRegister–Register
Register–Memory
Memory–Memory
Encoding Variable (2, 4 or 6 bytes long)
Branching Condition code, indexing, counting
Endianness Big
Predecessor System/370-XA
SuccessorESA/390
Registers
General-purpose 16
Floating point 4 64-bit
IBM S/370-ESA and S/390-ESA registers
General Registers 0-15

Two's complement value
031
Access Registers 0-15 [1]

0000000PALESNALEN
0678151631
ESA Access register abbreviations
BitsFieldMeaning
0-60000000
7PPrimary
0=use dispatchable-unit access list
1=use primary-space access list
8-15ALESNaccess-list-entry sequence number
16-31ALENaccess-list-entry number
Control Registers 0-15

See Principles of Operation [2] [3] or Control Registers
031
Floating Point Control (FPC) Register
Interrupt Masks
(IM)		Status Flags
(SF)		Data Exception Code
(DXC)		Rounding Mode
(RM)
izoux000izoux000izouxy00000000RM
0123457891011121315161718192021222324293031
Floating Point Registers (hexadecimal) 0-6/0-15 [lower-alpha 1]

SBiased exponentMantissa
017831

Mantissa (continued)
3263
Floating Point Registers (binary, single precision) 0-15 [lower-alpha 2]

SBiased exponentMantissa
018931
Floating Point Registers (binary, double precision) 0-15 [lower-alpha 3]

SBiased exponentMantissa
01111231

Mantissa (continued)
3263
Enterprise Systems Architecture Extended Control mode PSW [4] [5]

0R000TI
O		E
X		Key1MWPASCCProgram
Mask		00000000
0124567811121314151617181920232431

AInstruction Address
323363
ESA EC mode PSW abbreviations
BitsFieldMeaning
1RPER Mask
5TDAT mode
6IOI/O Mask; subject to channel mask in CR2
7EXExternal Mask; subject to external subclass mask in CR0
8-11KeyPSW key
12E=1Extended Control mode
13MMachine-check mask
14WWait state
15PProblem state
16-17ASAddress-Space Control
00=primary-space mode
01=Access-register mode
10=Secondary-space mode
11=Home-space mode
18-19CCCondition Code
20-23PM
Program Mask
BitMeaning
20Fixed-point overflow
21Decimal overflow
22Exponent underflow [lower-alpha 4]
23Significance [lower-alpha 5]
32AAddressing mode
0=24 bit; 1=31 bit
33-63IAInstruction Address

On February 15, 1988, IBM announced [6] [7] Enterprise Systems Architecture/370 (ESA/370) for 3090 enhanced ("E") models and for 4381 model groups 91E and 92E.

In addition to the primary-space and secondary-space addressing modes that later System/370 models, and System/370 Extended Architecture (S/370-XA) models, support, ESA has an access register mode in which each use of general register 1-15 as a base register uses an associated access register to select an address space. [8] In addition to the normal address spaces that machines with the dual-address-space facility support, ESA also allows data spaces, which contain no executable code.

A machine may be divided into Logical Partitions (LPARs), each with its own virtual system memory so that multiple operating systems may run concurrently on one machine.

ESA/390 architecture

ESA/390
Designer IBM
Bits32-bit
Introduced1990;34 years ago (1990)
Design CISC
TypeRegister–Register
Register–Memory
Memory–Memory
Encoding Variable (2, 4 or 6 bytes long)
Branching Condition code, indexing, counting
Endianness Big
PredecessorESA/370
Successor z/Architecture
Registers
Access 16× 32, Control 16×32, Floating Point Control (FPC) 32-bit, Prefix 32 bit, PSW 64-bit
General-purpose 16
Floating point 4 64-bit up to the G4; 16 64-bit starting with the G5 [9] [10]

An important capability to form a Parallel Sysplex was added to the architecture in 1994.

ESA/390 also extends the Sense ID command to provide additional information about a device, and additional device-dependent channel commands, the command codes for which are provided in the Sense ID information, to allow device description information to be fetched from a device. [11] [12]

Starting with the System/390 G5, [9] [10] IBM introduced: [13]

Some PC-based IBM-compatible mainframes which provide ESA/390 processors in smaller machines have been released over time, but are only intended for software development.

New facilities

ESA/390 adds the following [14] facilities

All models
  • Access-list-controlled protection
Some models
  • Concurrent sense
  • PER 2
  • Storage-protection override
  • Move-page facility 2
  • Square root
  • String instruction
  • Suppression on protection with virtual-address enhancement
  • Set address space control fast
  • Subspace group
  • Called-space identification
  • Checksum
  • Compare and move extended
  • Immediate and relative instruction
  • Branch and set authority
  • Perform locked operation
  • Additional floating-point
  • Program call fast
  • Resume program
  • Trap
  • Extended TOD clock
  • TOD-clock-control override
  • Store system information
  • Extended translation 1
  • Extended translation 2
  • z/Architecture (certain instructions)
  • Enhanced input/output

New channel commands

The following channel commands [lower-alpha 6] are new, or have their functionality changed, in ESA/390: [12]

ESA/390 I/O-Device Commands
CommandBit Position
01234567
Read configuration dataDDDDDDD0
Read node identifierDDDDDDD0
Sense ID11100100
Set interface identifierDDDDDDD1
Note:
D Device dependent. The command code, if any, recognized by an I/O device may be obtained by using a sense-ID command.

Notes

  1. ↑ The number and format of floating-point registers depends on the installed features:
    ESA/370
    ESA/390 without the new floating-point facilities
    Only the hexadecimal floating point (HFP) registers FP0, FP2, FP4 and FP6 exist
    ESA/390 with the new floating-point facilities
    FP0_FP15 may be HFP or IEEE floating point
  2. ↑ ESA/390 with the new floating-point facilities
  3. ↑ ESA/390 with the new floating-point facilities
  4. ↑ Bit 22 is renamed as HFP exponent underflow in ESA/390
  5. ↑ Bit 23 is renamed as HFP significance in ESA/390
  6. ↑ The data returned by Sense ID include the command codes for Read configuration data, Read node identifier and Set interface identifier.

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References

S370-ESA
IBM Enterprise Systems Architecture/370 Principles of Operation (PDF) (First ed.). IBM. August 1988. SA22-7200-0.
S/390-ESA
IBM Enterprise Systems Architecture/390 Principles of Operation (PDF) (Ninth ed.). IBM. June 2003. SA22-7201-08.
  1. ↑ S370-ESA, p. 5-30, Access-list-Entry Token.
  2. ↑ S370-ESA, pp. 4-7–4-9, Figure 4-3 Assignment of Control-Register Fields.
  3. ↑ S390-ESA, pp. 4-8–4-10, Figure 4-3 Assignment of Control-Register Fields.
  4. ↑ S370-ESA, p. 4-5, Program-Status-Word Format.
  5. ↑ S390-ESA, p. 4-5, Program-Status-Word Format.
  6. ↑ "IBM 3090 PROCESSOR UNIT MODELS 280E AND 500E AND IBM 3090 PROCESSOR UNIT MODEL 300E TO 400E UPGRADE". Announcement Letters. IBM. February 15, 1988. 188-038.
  7. ↑ "ENTERPRISE SYSTEMS ARCHITECTURE/370 (TM) AND MVS/SYSTEM PRODUCT VERSION 3". Announcement Letters. IBM. February 15, 1988. 288-059.
  8. ↑ S370-ESA.
  9. 1 2 Slegel, Timothy J. (August 17, 1998). "IBM S/390 G5 Microprocessor" (PDF). Hot Chips .
  10. 1 2 Schwarz, E. M.; Krygowski, C. A. (September 1, 1999). "The S/390 G5 floating-point unit". IBM Journal of Research and Development. 43 (5): 707–721. doi:10.1147/rd.435.0707.
  11. ↑ S390-ESA, pp. 1–8.
  12. 1 2 Enterprise Systems Architecture/390 Common I/O-Device Commands, Second Edition, IBM, April 1992, SA22-7204-01
  13. ↑ S390-ESA, pp. 1-3–1-4, Highlights of ESA/390.
  14. ↑ S390-ESA, pp. D-1–D-7, Appendix D. Comparison between ESA/370 and ESA/390.
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