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Non contact wafer testing is an alternative to mechanical probing of ICs during the wafer testing step in semiconductor device fabrication.
| | This article needs additional citations for verification .(August 2018) |
Non contact wafer testing is an alternative to mechanical probing of ICs during the wafer testing step in semiconductor device fabrication.
Probing ICs while they are still on the wafer normally requires that contact be made between the automatic test equipment (ATE) and IC. This contact is usually made with some form of mechanical probe. A set of mechanical probes will often be arranged together on a probe card, which is attached to the wafer prober. The wafer is lifted by the wafer prober until metal pads on one or more ICs on the wafer make physical contact with the probes. A certain amount of over-travel is required after the first probe makes contact with the wafer, for two reasons:
There are numerous types of mechanical probes available commercially: their shape can be in the form of a cantilever, spring, or membrane, and they can be bent into shape, stamped, or made by microelectromechanical systems processing.
Using mechanical probes has certain drawbacks:
Alternatives to mechanical probing of ICs have been explored by various groups (Slupsky, [4] Moore, [5] Scanimetrics, [6] Kuroda [7] ). These methods use tiny RF antennae (similar to RFID tags, but on a much smaller scale) to replace both the mechanical probes and the metal probe pads. If the antennae on the probe card and IC are properly aligned, then a transmitter on the probe card can send data wirelessly to the receiver on the IC via RF communication.
This method has several advantages:
An integrated circuit (IC), also known as a microchip, computer chip, or simply chip, is a small electronic device made up of multiple interconnected electronic components such as transistors, resistors, and capacitors. These components are etched onto a small piece of semiconductor material, usually silicon. Integrated circuits are used in a wide range of electronic devices, including computers, smartphones, and televisions, to perform various functions such as processing and storing information. They have greatly impacted the field of electronics by enabling device miniaturization and enhanced functionality.
Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as computer processors, microcontrollers, and memory chips. It is a multiple-step photolithographic and physico-chemical process during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.
In microelectronics, a dual in-line package is an electronic component package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board (PCB) or inserted in a socket. The dual-inline format was invented by Don Forbes, Rex Rice and Bryant Rogers at Fairchild R&D in 1964, when the restricted number of leads available on circular transistor-style packages became a limitation in the use of integrated circuits. Increasingly complex circuits required more signal and power supply leads ; eventually microprocessors and similar complex devices required more leads than could be put on a DIP package, leading to development of higher-density chip carriers. Furthermore, square and rectangular packages made it easier to route printed-circuit traces beneath the packages.
Complementary metal–oxide–semiconductor is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors, data converters, RF circuits, and highly integrated transceivers for many types of communication.
Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting dies such as semiconductor devices, IC chips, integrated passive devices and microelectromechanical systems (MEMS), to external circuitry with solder bumps that have been deposited onto the chip pads. The technique was developed by General Electric's Light Military Electronics Department, Utica, New York. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external circuitry, it is flipped over so that its top side faces down, and aligned so that its pads align with matching pads on the external circuit, and then the solder is reflowed to complete the interconnect. This is in contrast to wire bonding, in which the chip is mounted upright and fine wires are welded onto the chip pads and lead frame contacts to interconnect the chip pads to external circuitry.
Integrated circuit packaging is the final stage of semiconductor device fabrication, in which the die is encapsulated in a supporting case that prevents physical damage and corrosion. The case, known as a "package", supports the electrical contacts which connect the device to a circuit board.
Wafer testing is a step performed during semiconductor device fabrication after back end of line (BEOL) and before IC packaging.
A mixed-signal integrated circuit is any integrated circuit that has both analog circuits and digital circuits on a single semiconductor die. Their usage has grown dramatically with the increased use of cell phones, telecommunications, portable electronics, and automobiles with electronics and digital sensors.
Automatic test equipment or automated test equipment (ATE) is any apparatus that performs tests on a device, known as the device under test (DUT), equipment under test (EUT) or unit under test (UUT), using automation to quickly perform measurements and evaluate the test results. An ATE can be a simple computer-controlled digital multimeter, or a complicated system containing dozens of complex test instruments capable of automatically testing and diagnosing faults in sophisticated electronic packaged parts or on wafer testing, including system on chips and integrated circuits.
Integrated circuit design, semiconductor design, chip design or IC design, is a sub-field of electronics engineering, encompassing the particular logic and circuit design techniques required to design integrated circuits, or ICs. ICs consist of miniaturized electronic components built into an electrical network on a monolithic semiconductor substrate by photolithography.
Maxim Integrated Products, Inc., was an American semiconductor company that designed, manufactured, and sold analog and mixed-signal integrated circuits for the automotive, industrial, communications, consumer, and computing markets. Maxim's product portfolio included power and battery management ICs, sensors, analog ICs, interface ICs, communications solutions, digital ICs, embedded security, and microcontrollers. The company is headquartered in San Jose, California, and has design centers, manufacturing facilities, and sales offices worldwide. In 2021, the company was acquired by Analog Devices.
A probe card is used in automated integrated circuit testing. It is an interface between an electronic test system and a semiconductor wafer.
In electronic engineering, a through-silicon via (TSV) or through-chip via is a vertical electrical connection (via) that passes completely through a silicon wafer or die. TSVs are high-performance interconnect techniques used as an alternative to wire-bond and flip chips to create 3D packages and 3D integrated circuits. Compared to alternatives such as package-on-package, the interconnect and device density is substantially higher, and the length of the connections becomes shorter.
A three-dimensional integrated circuit is a MOS integrated circuit (IC) manufactured by stacking as many as 16 or more ICs and interconnecting them vertically using, for instance, through-silicon vias (TSVs) or Cu-Cu connections, so that they behave as a single device to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes. The 3D IC is one of several 3D integration schemes that exploit the z-direction to achieve electrical performance benefits in microelectronics and nanoelectronics.
Reliability of a semiconductor device is the ability of the device to perform its intended function during the life of the device in the field.
Wafer-level packaging (WLP) is a process in integrated circuit manufacturing where packaging components are attached to an integrated circuit (IC) before the wafer – on which the IC is fabricated – is diced. In WLP, the top and bottom layers of the packaging and the solder bumps are attached to the integrated circuits while they are still in the wafer. This process differs from a conventional process, in which the wafer is sliced into individual circuits (dice) before the packaging components are attached.
Wafer backgrinding is a semiconductor device fabrication step during which wafer thickness is reduced to allow stacking and high-density packaging of integrated circuits (IC).
Ultrapure water (UPW), high-purity water or highly purified water (HPW) is water that has been purified to uncommonly stringent specifications. Ultrapure water is a term commonly used in manufacturing to emphasize the fact that the water is treated to the highest levels of purity for all contaminant types, including: organic and inorganic compounds; dissolved and particulate matter; volatile and non-volatile; reactive, and inert; hydrophilic and hydrophobic; and dissolved gases.
Glossary of microelectronics manufacturing terms
