In electronic design, a netlist is a description of the connectivity of an electronic circuit. In its simplest form, a netlist consists of a list of the electronic components in a circuit and a list of the nodes they are connected to. A network (net) is a collection of two or more interconnected components.
Capacitance is the capacity of a material object or device to store electric charge. It is measured by the charge in response to a difference in electric potential, expressed as the ratio of those quantities. Commonly recognized are two closely related notions of capacitance: self capacitance and mutual capacitance. An object that can be electrically charged exhibits self capacitance, for which the electric potential is measured between the object and ground. Mutual capacitance is measured between two components, and is particularly important in the operation of the capacitor, an elementary linear electronic component designed to add capacitance to an electric circuit.
SPICE is a general-purpose, open-source analog electronic circuit simulator. It is a program used in integrated circuit and board-level design to check the integrity of circuit designs and to predict circuit behavior.
In electronics, a varicap diode, varactor diode, variable capacitance diode, variable reactance diode or tuning diode is a type of diode designed to exploit the voltage-dependent capacitance of a reverse-biased p–n junction.
An electrolytic capacitor is a polarized capacitor whose anode or positive plate is made of a metal that forms an insulating oxide layer through anodization. This oxide layer acts as the dielectric of the capacitor. A solid, liquid, or gel electrolyte covers the surface of this oxide layer, serving as the cathode or negative plate of the capacitor. Because of their very thin dielectric oxide layer and enlarged anode surface, electrolytic capacitors have a much higher capacitance-voltage (CV) product per unit volume than ceramic capacitors or film capacitors, and so can have large capacitance values. There are three families of electrolytic capacitor: aluminium electrolytic capacitors, tantalum electrolytic capacitors, and niobium electrolytic capacitors.
Capacitors and inductors as used in electric circuits are not ideal components with only capacitance or inductance. However, they can be treated, to a very good degree of approximation, as being ideal capacitors and inductors in series with a resistance; this resistance is defined as the equivalent series resistance (ESR). If not otherwise specified, the ESR is always an AC resistance, which means it is measured at specified frequencies, 100 kHz for switched-mode power supply components, 120 Hz for linear power-supply components, and at its self-resonant frequency for general-application components. Additionally, audio components may report a "Q factor", incorporating ESR among other things, at 1000 Hz.
In semiconductor design, standard-cell methodology is a method of designing application-specific integrated circuits (ASICs) with mostly digital-logic features. Standard-cell methodology is an example of design abstraction, whereby a low-level very-large-scale integration (VLSI) layout is encapsulated into an abstract logic representation.
Integrated circuit design, semiconductor design, chip design or IC design, is a sub-field of electronics engineering, encompassing the particular logic and circuit design techniques required to design integrated circuits, or ICs. ICs consist of miniaturized electronic components built into an electrical network on a monolithic semiconductor substrate by photolithography.
In electronics, the Miller effect accounts for the increase in the equivalent input capacitance of an inverting voltage amplifier due to amplification of the effect of capacitance between the amplifier's input and output terminals, and is given by
An EDA database is a database specialized for the purpose of electronic design automation. These application specific databases are required because general purpose databases have historically not provided enough performance for EDA applications.
Delay calculation is the term used in integrated circuit design for the calculation of the gate delay of a single logic gate and the wires attached to it. By contrast, static timing analysis computes the delays of entire paths, using delay calculation to determine the delay of each gate and wire.
The Layout Versus Schematic (LVS) is the class of electronic design automation (EDA) verification software that determines whether a particular integrated circuit layout corresponds to the original schematic or circuit diagram of the design.
A switched capacitor (SC) is an electronic circuit that implements a function by moving charges into and out of capacitors when electronic switches are opened and closed. Usually, non-overlapping clock signals are used to control the switches, so that not all switches are closed simultaneously. Filters implemented with these elements are termed switched-capacitor filters, which depend only on the ratios between capacitances and the switching frequency, and not on precise resistors. This makes them much more suitable for use within integrated circuits, where accurately specified resistors and capacitors are not economical to construct, but accurate clocks and accurate relative ratios of capacitances are economical.
In integrated circuit design, physical design is a step in the standard design cycle which follows after the circuit design. At this step, circuit representations of the components of the design are converted into geometric representations of shapes which, when manufactured in the corresponding layers of materials, will ensure the required functioning of the components. This geometric representation is called integrated circuit layout. This step is usually split into several sub-steps, which include both design and verification and validation of the layout.
IP-XACT, also known as IEEE 1685, is an XML format that defines and describes individual, re-usable electronic circuit designs to facilitate their use in creating integrated circuits. IP-XACT was created by the SPIRIT Consortium as a standard to enable automated configuration and integration through tools and evolving into an IEEE standard.
Altos Design Automation, Inc. was an electronic design automation software company. Altos developed and marketed cell and semiconductor intellectual property (IP) characterization tools that created library views for timing, signal integrity and power analysis and optimization. The Altos tools were fully automated and the company claimed that its tools are extremely fast. The Altos tools were used by engineers employing both corner-based and statistical-based design implementation flows to reduce time-to -market and improve yield.
Spectre is a SPICE-class circuit simulator owned and distributed by the software company Cadence Design Systems. It provides the basic SPICE analyses and component models. It also supports the Verilog-A modeling language. Spectre comes in enhanced versions that also support RF simulation (SpectreRF) and mixed-signal simulation.
In electronic design automation, parasitic extraction is the calculation of the parasitic effects in both the designed devices and the required wiring interconnects of an electronic circuit: parasitic capacitances, parasitic resistances and parasitic inductances, commonly called parasitic devices, parasitic components, or simply parasitics.
LTspice is a SPICE-based analog electronic circuit simulator computer software, produced by semiconductor manufacturer Analog Devices. It is the most widely distributed and used SPICE software in the industry. Though it is freeware, LTspice is not artificially restricted to limit its capabilities. It ships with a library of SPICE models from Analog Devices, Linear Technology, Maxim Integrated, and third-party sources.
Power integrity or PI is an analysis to check whether the desired voltage and current are met from source to destination. Today, power integrity plays a major role in the success and failure of new electronic products. There are several coupled aspects of PI: on the chip, in the chip package, on the circuit board, and in the system. Four main issues must be resolved to ensure power integrity at the printed circuit board level:
- Keep the voltage ripple at the chips pads lower than the specification
- Control ground bounce
- Control electromagnetic interference and maintain electromagnetic compatibility: the power distribution network is generally the largest set of conductors on the circuit board and therefore the largest (unwanted) antenna for emission and reception of noise.
- Maintaining a proper DC voltage level at the load at high currents. A modern processor or field-programmable gate array can pull 1–100 A from a sub-1 V power rail with voltage margins in the tens of millivolts. Very little DC voltage drop can thus be tolerated on the power distribution network.
