European Processor Initiative

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Logo of the European Processor Initiative European Processor Initiative Logo.png
Logo of the European Processor Initiative

The European Processor Initiative (EPI) is a European processor project to design and build a new family of European low-power processors for supercomputers, Big Data, automotive, [1] and offering high performance on traditional HPC applications and emerging applications such as on machine learning. It is led by a consortium of European companies and universities. The project is divided in multiple phases funded under Specific Grant Agreements. The first grant agreement is implemented under the European Commission program Horizon 2020 (FPA: 800928) in the December 2018 to November 2021 time span. The second agreement will be implemented afterwards under the EuroHPC Joint Undertaking which issued a call answered to in January 2021 by the same consortium (H2020-JTI-EuroHPC-2020-02 FPA in EPI (phase II)).

Contents

The processor is a SoC, of RISC technology, implementing microprocessor cores of ARM architecture and accelerators, specialised in matrix calculations and deep learning for artificial intelligence. The processor is designed to be integrated in an exascale supercomputer, but also to be implemented in cars.

Objectives

The aim of the EPI project is to design and build a high-performance, low-power processor, implementing vector instructions and specific accelerators, such as accelerators for AI, with high-bandwidth memory access. The design will be based on the results obtained through an intensive use of simulation, the development of a complete software stack and the use of advanced semiconductor manufacturing technologies. During the development of the processor, a co-design methodology will be implemented to ensure that the processor is suitable for efficiently running many applications and that it is equipped with the appropriate software development tools. The objective of the EPI is to develop European know-how on the design and construction of processors for high-performance computing, allowing Europe technological sovereignty.[ citation needed ]

Members

EPI is a non-legal entity, a project organized by 30 institutions from 10 countries in Europe. The members of the consortium are: [2]

Members of the EPI consortium
OrganizationtypeIndustryCountry
Atos CompanyIT services and consultingFlag of France.svg  France
BSC Public research centerSupercomputingFlag of Spain.svg  Spain
Infineon CompanySemiconductorsFlag of Germany.svg  Germany
SemidynamicsCompanySemiconductorsFlag of Spain.svg  Spain
CEA Public research centerEnergy, defense, security, IT, healthFlag of France.svg  France
Chalmers University of Technology Private universityScientific and technological research, educationFlag of Sweden.svg  Sweden
ETH Zurich Public universityScientific and technological research, educationFlag of Switzerland (Pantone).svg  Switzerland
Foundation for Research & Technology – Hellas Public research centerScientific and technological researchFlag of Greece.svg  Greece
GENCI State-owned companySupercomputingFlag of France.svg  France
Tecnico Lisboa Public universityScientific and technological research, educationFlag of Portugal.svg  Portugal
Forschungszentrum Jülich Public research centerScientific and technological researchFlag of Germany.svg  Germany
University of Bologna Public universityScientific and technological research, educationFlag of Italy.svg  Italy
Faculty of Electrical Engineering and Computing, University of Zagreb Public universityScientific and technological research, educationFlag of Croatia.svg  Croatia
Fraunhofer Public research centerApplied scienceFlag of Germany.svg  Germany
STMicroelectronics ItalyCompanySemiconductorsFlag of Italy.svg  Italy
E4 Computer EngineeringCompanyEngineeringFlag of Italy.svg  Italy
University of Pisa Public universityScientific and technological research, educationFlag of Italy.svg  Italy
Surf Public research centerScientific and technological researchFlag of the Netherlands.svg  Netherlands
Kalray CompanySemiconductorsFlag of France.svg  France
ExtollCompanySemiconductorsFlag of Germany.svg  Germany
CINECA Public research centerScientific and technological researchFlag of Italy.svg  Italy
BMW Group CompanyAutomobileFlag of Germany.svg  Germany
ElektrobitCompanyAutomobile, softwareFlag of Germany.svg  Germany
Prove & RunCompanySoftwareFlag of France.svg  France
Karlsruhe Institute of Technology Public universityScientific and technological research, educationFlag of Germany.svg  Germany
MentaCompanySemiconductorsFlag of France.svg  France
SiPearlCompanySemiconductorsFlag of France.svg  France / Flag of Germany.svg  Germany
KernkonzeptCompanySoftwareFlag of Germany.svg  Germany
Leonardo CompanySoftwareFlag of Italy.svg  Italy
ZeroPoint TechnologiesCompanySoftwareFlag of Sweden.svg  Sweden

History

The initiative started in 2015, in the aim to produce an exascale supercomputer by 2023. The first phase of the project started in December 2018. [3] In the summer of 2019, the basis of the architecture was decided. [4] In January 2020, the first prototype was presented. [5]

Illustration of EPI's first working RISC-V chip sample in 2021. RISC-V EPAC.png
Illustration of EPI's first working RISC-V chip sample in 2021.

Organization of the project

The European Processor Initiative has five streams of operation. The first four are technical streams (Common Platform and Global Architecture, HPC General Purpose Processor, Accelerator, Automotive platform), while the last one is dedicated to the coordination and communication activities.

Related Research Articles

<span class="mw-page-title-main">Reduced instruction set computer</span> Processor executing one instruction in minimal clock cycles

In computer engineering, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set computer (CISC), a RISC computer might require more instructions in order to accomplish a task because the individual instructions are written in simpler code. The goal is to offset the need to process more instructions by increasing the speed of each instruction, in particular by implementing an instruction pipeline, which may be simpler to achieve given simpler instructions.

<span class="mw-page-title-main">Supercomputer</span> Type of extremely powerful computer

A supercomputer is a computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second (FLOPS) instead of million instructions per second (MIPS). Since 2017, there have existed supercomputers which can perform over 1017 FLOPS (a hundred quadrillion FLOPS, 100 petaFLOPS or 100 PFLOPS). For comparison, a desktop computer has performance in the range of hundreds of gigaFLOPS (1011) to tens of teraFLOPS (1013). Since November 2017, all of the world's fastest 500 supercomputers run on Linux-based operating systems. Additional research is being conducted in the United States, the European Union, Taiwan, Japan, and China to build faster, more powerful and technologically superior exascale supercomputers.

<span class="mw-page-title-main">High-performance computing</span> Computing with supercomputers and clusters

High-performance computing (HPC) uses supercomputers and computer clusters to solve advanced computation problems.

<span class="mw-page-title-main">MareNostrum</span> Supercomputer in the Barcelona Supercomputing Center

MareNostrum is the main supercomputer in the Barcelona Supercomputing Center. It is the most powerful supercomputer in Spain, one of thirteen supercomputers in the Spanish Supercomputing Network and one of the seven supercomputers of the European infrastructure PRACE.

<span class="mw-page-title-main">TOP500</span> Database project devoted to the ranking of computers

The TOP500 project ranks and details the 500 most powerful non-distributed computer systems in the world. The project was started in 1993 and publishes an updated list of the supercomputers twice a year. The first of these updates always coincides with the International Supercomputing Conference in June, and the second is presented at the ACM/IEEE Supercomputing Conference in November. The project aims to provide a reliable basis for tracking and detecting trends in high-performance computing and bases rankings on HPL benchmarks, a portable implementation of the high-performance LINPACK benchmark written in Fortran for distributed-memory computers.

<span class="mw-page-title-main">Arm (company)</span> British multinational semiconductor and software design company

Arm is a British semiconductor and software design company based in Cambridge, England whose primary business is the design of ARM processors (CPUs). It also designs other chips, provides software development tools under the DS-5, RealView and Keil brands, and provides systems and platforms, system-on-a-chip (SoC) infrastructure and software. As a "holding" company, it also holds shares of other companies. Since 2016, it has been owned by Japanese conglomerate SoftBank Group.

Manycore processors are special kinds of multi-core processors designed for a high degree of parallel processing, containing numerous simpler, independent processor cores. Manycore processors are used extensively in embedded computers and high-performance computing.

Exascale computing refers to computing systems capable of calculating at least "1018 IEEE 754 Double Precision (64-bit) operations (multiplications and/or additions) per second (exaFLOPS)"; it is a measure of supercomputer performance.

Eurotech is a company dedicated to the research, development, production and marketing of miniature computers (NanoPCs) and high performance computers (HPCs).

Zero ASIC Corporation, formerly Adapteva, Inc., is a fabless semiconductor company focusing on low power many core microprocessor design. The company was the second company to announce a design with 1,000 specialized processing cores on a single integrated circuit.

<span class="mw-page-title-main">Supercomputing in Europe</span> Overview of supercomputing in Europe

Several centers for supercomputing exist across Europe, and distributed access to them is coordinated by European initiatives to facilitate high-performance computing. One such initiative, the HPC Europa project, fits within the Distributed European Infrastructure for Supercomputing Applications (DEISA), which was formed in 2002 as a consortium of eleven supercomputing centers from seven European countries. Operating within the CORDIS framework, HPC Europa aims to provide access to supercomputers across Europe.

<span class="mw-page-title-main">Xeon Phi</span> Series of x86 manycore processors from Intel

Xeon Phi was a series of x86 manycore processors designed and made by Intel. It was intended for use in supercomputers, servers, and high-end workstations. Its architecture allowed use of standard programming languages and application programming interfaces (APIs) such as OpenMP.

<span class="mw-page-title-main">T-Platforms</span>

T-Platforms is a Russian supercomputer company. The main competitor is RSC Group.

IBM Power microprocessors are designed and sold by IBM for servers and supercomputers. The name "POWER" was originally presented as an acronym for "Performance Optimization With Enhanced RISC". The Power line of microprocessors has been used in IBM's RS/6000, AS/400, pSeries, iSeries, System p, System i, and Power Systems lines of servers and supercomputers. They have also been used in data storage devices and workstations by IBM and by other server manufacturers like Bull and Hitachi.

The Hartree Centre is a high performance computing, data analytics and artificial intelligence (AI) research facility focused on industry-led challenges. It was formed in 2012 at Daresbury Laboratory on the Sci-Tech Daresbury science and innovation campus in Cheshire, UK. The Hartree Centre is part of the Science and Technology Facilities Council (STFC) which itself is part of United Kingdom Research and Innovation (UKRI).

The Sunway TaihuLight is a Chinese supercomputer which, as of November 2021, is ranked fourth in the TOP500 list, with a LINPACK benchmark rating of 93 petaflops. The name is translated as divine power, the light of Taihu Lake. This is nearly three times as fast as the previous Tianhe-2, which ran at 34 petaflops. As of June 2017, it is ranked as the 16th most energy-efficient supercomputer in the Green500, with an efficiency of 6.1 GFlops/watt. It was designed by the National Research Center of Parallel Computer Engineering & Technology (NRCPC) and is located at the National Supercomputing Center in Wuxi in the city of Wuxi, in Jiangsu province, China.

<span class="mw-page-title-main">European High-Performance Computing Joint Undertaking</span>

The European High-Performance Computing Joint Undertaking is a public-private partnership in High Performance Computing (HPC), enabling the pooling of European Union–level resources with the resources of participating EU Member States and participating associated states of the Horizon Europe and Digital Europe programmes, as well as private stakeholders. The Joint Undertaking has the twin stated aims of developing a pan-European supercomputing infrastructure, and supporting research and innovation activities. Located in Luxembourg City, Luxembourg, the Joint Undertaking started operating in November 2018 under the control of the European Commission and became autonomous in 2020.

The A64FX is a 64-bit ARM architecture microprocessor designed by Fujitsu. The processor is replacing the SPARC64 V as Fujitsu's processor for supercomputer applications. It powers the Fugaku supercomputer, ranked in the TOP500 as the fastest supercomputer in the world from June of 2020, until falling to second place behind Frontier in June of 2022.

Aurora is a planned supercomputer, originally contracted to be completed by 2018 but through a series of delays at the prime contractor, Intel Corporation, now planned to be completed in 2023. It was originally planned be the worlds’ fastest supercomputer with over 2 exaflops, however a series of delays have cast that into doubt. It is sponsored by the United States Department of Energy (DOE) and designed by Intel and Cray for the Argonne National Laboratory. It will have c. 2 exaFLOPS in computing power which is approximately a quintillion (260 or 1018) calculations per second and will have an expected cost of US$500 million. It will follow Frontier, which was the world's first exascale supercomputer in 2022 and the first half of 2023.


Performance portability refers to the ability of computer programs and applications to operate effectively across different platforms. Developers of performance portable applications seek to support multiple platforms without impeding performance, and ideally while minimizing platform-specific code.

References

  1. Mario Kovač, Dominik Reinhardt, Oliver Jesorsky, Matthias Traub, Jean-Marc Denis, Philippe Notton. "European Processor Initiative (EPI)—An Approach for a Future Automotive eHPC Semiconductor Platform". In: Langheim J. (eds) Electronic Components and Systems for Automotive Applications. Lecture Notes in Mobility. Springer, Cham. https://doi.org/10.1007/978-3-030-14156-1_15 pp 185-195 First online: 26 May 2019. https://link.springer.com/chapter/10.1007/978-3-030-14156-1_15
  2. Community Research and Development Information Service "SGA1 (Specific Grant Agreement 1) OF THE EUROPEAN PROCESSOR INITIATIVE (EPI)". CORDIS Website. Luxembourg: EU Publications Office. https://cordis.europa.eu/project/id/826647 Archived 9 December 2020 at the Wayback Machine [lists partners and budget per partner]
  3. Christian D. "EPI : un premier processeur HPC made in Europe en développement". Génération NT. 10 June 2019. on line. Archived 24 October 2020 at the Wayback Machine
  4. "How the European Processor Initiative is Leveraging RISC-V for the Future of Supercomputing". Inside HPC. 22 August 2019. Archived from the original on 22 January 2021.
  5. Michael Feldman (27 January 2020). "European Processor Initiative Readies Prototype". NextPlatform.com. Archived from the original on 1 December 2020.

Bibliography