The planar process is a manufacturing process used in the semiconductor industry to build individual components of a transistor, and in turn, connect those transistors together. It is the primary process by which silicon integrated circuit chips are built. The process utilizes the surface passivation and thermal oxidation methods.
The planar process was developed at Fairchild Semiconductor in 1959 by Jean Hoerni, who adopted the surface passivation and thermal oxidation methods originally developed by Mohamed Atalla at Bell Labs in 1957. Hoerni's planar process was in turn the basis for Robert Noyce's invention of the monolithic integrated circuit chip at Fairchild, later in 1959.
The key concept is to view a circuit in its two-dimensional projection (a plane), thus allowing the use of photographic processing concepts such as film negatives to mask the projection of light exposed chemicals. This allows the use of a series of exposures on a substrate (silicon) to create silicon oxide (insulators) or doped regions (conductors). Together with the use of metallization, and the concepts of p–n junction isolation and surface passivation, it is possible to create circuits on a single silicon crystal slice (a wafer) from a monocrystalline silicon boule.
The process involves the basic procedures of silicon dioxide (SiO2) oxidation, SiO2 etching and heat diffusion. The final steps involves oxidizing the entire wafer with an SiO2 layer, etching contact vias to the transistors, and depositing a covering metal layer over the oxide, thus connecting the transistors without manually wiring them together.
In 1955, Carl Frosch and Lincoln Derick at Bell Telephone Laboratories (BTL) accidentally discovered that silicon dioxide could be grown on silicon.Later in 1958, they proposed that silicon oxide layers could protect silicon surfaces during diffusion processes, and could be used for diffusion masking.
Surface passivation, the process by which a semiconductor surface is rendered inert, and does not change semiconductor properties as a result of interaction with air or other materials in contact with the surface or edge of the crystal,was first developed by Egyptian engineer Mohamed M. Atalla at BTL in the late 1950s. He discovered that the formation of a thermally grown silicon dioxide (SiO2) layer greatly reduced the concentration of electronic states at the silicon surface, and discovered the important quality of SiO2 films to preserve the electrical characteristics of p–n junctions and prevent these electrical characteristics from deteriorating by the gaseous ambient environment. He found that silicon oxide layers could be used to electrically stabilize silicon surfaces. He developed the surface passivation process, a new method of semiconductor device fabrication that involves coating a silicon wafer with an insulating layer of silicon oxide so that electricity could reliably penetrate to the conducting silicon below. By growing a layer of silicon dioxide on top of a silicon wafer, Atalla was able to overcome the surface states that prevented electricity from reaching the semiconducting layer.
Atalla first published his findings in 1957.According to Fairchild Semiconductor engineer Chih-Tang Sah, the surface passivation process developed by Atalla and his team was "the most important and significant technology advance, which blazed the trail" that led to the silicon integrated circuit.
At a 1958 Electrochemical Society meeting, Mohamed Atalla presented a paper about the surface passivation of PN junctions by thermal oxidation, based on his 1957 BTL memos,and demonstrated silicon dioxide's passivating effect on a silicon surface. This was the first demonstration to show that high-quality silicon dioxide insulator films could be grown thermally on the silicon surface to protect the underlying silicon p-n junction diodes and transistors.
Swiss engineer Jean Hoerni attended the same 1958 meeting, and was intrigued by Atalla's presentation. Hoerni came up with the "planar idea" one morning while thinking about Atalla's device.Taking advantage of silicon dioxide's passivating effect on the silicon surface, Hoerni proposed to make transistors that were protected by a layer of silicon dioxide. This led to the first successful product implementation of the Atalla silicon transistor passivation technique by thermal oxide.
The planar process was developed by Jean Hoerni, one of the "traitorous eight", while working at Fairchild Semiconductor, with a first patent issued 1959.
Together with the use of metallization (to join together the integrated circuits), and the concept of p–n junction isolation (from Kurt Lehovec), the researchers at Fairchild were able to create circuits on a single silicon crystal slice (a wafer) from a monocrystalline silicon boule.
In 1959, Robert Noyce built on Hoerni's work with his conception of an integrated circuit (IC), which added a layer of metal to the top of Hoerni's basic structure to connect different components, such as transistors, capacitors, or resistors, located on the same piece of silicon. The planar process provided a powerful way of implementing an integrated circuit that was superior to earlier conceptions of the integrated circuit.Noyce's invention was the first monolithic IC chip.
Early versions of the planar process used a photolithography process using near-ultraviolet light from a mercury vapor lamp. As of 2011, small features are typically made with 193 nm "deep" UV lithography.Some researchers use even higher-energy extreme ultraviolet lithography.
An integrated circuit or monolithic integrated circuit is a set of electronic circuits on one small flat piece of semiconductor material that is normally silicon. The integration of large numbers of tiny MOS transistors into a small chip results in circuits that are orders of magnitude smaller, faster, and less expensive than those constructed of discrete electronic components. The IC's mass production capability, reliability, and building-block approach to circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other digital home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.
Robert Norton Noyce, nicknamed "the Mayor of Silicon Valley," was an American physicist who co-founded Fairchild Semiconductor in 1957 and Intel Corporation in 1968. He is also credited with the realization of the first monolithic integrated circuit or microchip, which fueled the personal computer revolution and gave Silicon Valley its name.
Silicon is a chemical element with the symbol Si and atomic number 14. It is a hard and brittle crystalline solid with a blue-grey metallic lustre; and it is a tetravalent metalloid and semiconductor. It is a member of group 14 in the periodic table: carbon is above it; and germanium, tin, and lead are below it. It is relatively unreactive. Because of its high chemical affinity for oxygen, it was not until 1823 that Jöns Jakob Berzelius was first able to prepare it and characterize it in pure form. Its melting and boiling points of 1414 °C and 3265 °C respectively are the second-highest among all the metalloids and nonmetals, being only surpassed by boron. Silicon is the eighth most common element in the universe by mass, but very rarely occurs as the pure element in the Earth's crust. It is most widely distributed in dusts, sands, planetoids, and planets as various forms of silicon dioxide (silica) or silicates. More than 90% of the Earth's crust is composed of silicate minerals, making silicon the second most abundant element in the Earth's crust after oxygen.
A semiconductor material has an electrical conductivity value falling between that of a conductor, such as metallic copper, and an insulator, such as glass. Its resistance falls as its temperature rises; metals are the opposite. Its conducting properties may be altered in useful ways by introducing impurities ("doping") into the crystal structure. Where two differently-doped regions exist in the same crystal, a semiconductor junction is created. The behavior of charge carriers which include electrons, ions and electron holes at these junctions is the basis of diodes, transistors and all modern electronics. Some examples of semiconductors are silicon, germanium, gallium arsenide, and elements near the so-called "metalloid staircase" on the periodic table. After silicon, gallium arsenide is the second most common semiconductor and is used in laser diodes, solar cells, microwave-frequency integrated circuits and others. Silicon is a critical element for fabricating most electronic circuits.
The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET), also known as the metal–oxide–silicon transistor (MOS transistor, or MOS), is a type of insulated-gate field-effect transistor (IGFET) that is fabricated by the controlled oxidation of a semiconductor, typically silicon. The voltage of the covered gate determines the electrical conductivity of the device; this ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. The MOSFET was invented by Egyptian engineer Mohamed M. Atalla and Korean engineer Dawon Kahng at Bell Labs in November 1959. It is the basic building block of modern electronics, and the most frequently manufactured device in history, with an estimated total of 13 sextillion (1.3 × 1022) MOSFETs manufactured between 1960 and 2018.
Passivation, in physical chemistry and engineering, refers to a material becoming "passive," that is, less affected or corroded by the environment of future use. Passivation involves creation of an outer layer of shield material that is applied as a microcoating, created by chemical reaction with the base material, or allowed to build from spontaneous oxidation in the air. As a technique, passivation is the use of a light coat of a protective material, such as metal oxide, to create a shell against corrosion. Passivation can occur only in certain conditions, and is used in microelectronics to enhance silicon. The technique of passivation strengthens and preserves the appearance of metallics. In electrochemical treatment of water, passivation reduces the effectiveness of the treatment by increasing the circuit resistance, and active measures are typically used to overcome this effect, the most common being polarity reversal, which results in limited rejection of the fouling layer. Other proprietary systems to avoid electrode passivation, several discussed below, are the subject of ongoing research and development.
Fairchild Semiconductor International, Inc. was an American semiconductor company based in San Jose, California. Founded in 1957 as a division of Fairchild Camera and Instrument, it became a pioneer in the manufacturing of transistors and of integrated circuits. Schlumberger bought the firm in 1979 and sold it to National Semiconductor in 1987; Fairchild was spun off as an independent company again in 1997. In September 2016, Fairchild was acquired by ON Semiconductor.
Jean Amédée Hoerni was a Swiss-American engineer. He was a silicon transistor pioneer, and a member of the "traitorous eight". He developed the planar process, an important technology for reliably fabricating and manufacturing semiconductor devices, such as transistors and integrated circuits.
Dr. Frank Marion Wanlass was an American electrical engineer. He is best known for inventing CMOS logic with Chih-Tang Sah in 1963. CMOS has since become the standard semiconductor device fabrication process for MOSFETs.
p–n junction isolation is a method used to electrically isolate electronic components, such as transistors, on an integrated circuit (IC) by surrounding the components with reverse biased p–n junctions.
In electronics, a self-aligned gate is a transistor manufacturing feature whereby a refractory gate electrode region of a MOSFET is used as a mask for the doping of the source and drain regions. This technique ensures that the gate will slightly overlap the edges of the source and drain.
In microfabrication, thermal oxidation is a way to produce a thin layer of oxide on the surface of a wafer. The technique forces an oxidizing agent to diffuse into the wafer at high temperature and react with it. The rate of oxide growth is often predicted by the Deal–Grove model. Thermal oxidation may be applied to different materials, but most commonly involves the oxidation of silicon substrates to produce silicon dioxide.
A diffused junction transistor is a transistor formed by diffusing dopants into a semiconductor substrate. The diffusion process was developed later than the alloy junction and grown junction processes for making BJTs.
A transistor is a semiconductor device with at least three terminals for connection to an electric circuit. The vacuum-tube triode, also called a (thermionic) valve, was the transistor's precursor, introduced in 1907. The principle of a field-effect transistor was proposed by Julius Edgar Lilienfeld in 1925.
The gate oxide is the dielectric layer that separates the gate terminal of a MOSFET from the underlying source and drain terminals as well as the conductive channel that connects source and drain when the transistor is turned on. Gate oxide is formed by thermal oxidation of the silicon of the channel to form a thin insulating layer of silicon dioxide. The insulating silicon dioxide layer is formed through a process of self-limiting oxidation, which is described by the Deal-Grove model. A conductive gate material is subsequently deposited over the gate oxide to form the transistor. The gate oxide serves as the dielectric layer so that the gate can sustain as high as 1 to 5 MV/cm transverse electric field in order to strongly modulate the conductance of the channel.
This article details the history of electronic engineering. Chambers Twentieth Century Dictionary (1972) defines electronics as "The science and technology of the conduction of electricity in a vacuum, a gas, or a semiconductor, and devices based thereon".
The integrated circuit (IC) chip was invented during 1958–1959. The idea of integrating electronic circuits into a single device was born when the German physicist and engineer Werner Jacobi developed and patented the first known integrated transistor amplifier in 1949 and the British radio engineer Geoffrey Dummer proposed to integrate a variety of standard electronic components in a monolithic semiconductor crystal in 1952. A year later, Harwick Johnson filed a patent for a prototype IC. Between 1953 and 1957, Sidney Darlington and Yasuro Tarui proposed similar chip designs where several transistors could share a common active area, but there was no electrical isolation to separate them from each other.
Dawon Kahng was a Korean-American electrical engineer and inventor, known for his work in solid-state electronics. He is best known for inventing the MOSFET, also known as the MOS transistor, with Mohamed Atalla in 1959. Atalla and Kahng developed both the PMOS and NMOS processes for MOSFET semiconductor device fabrication. The MOSFET is the most widely used type of transistor, and the basic element in most modern electronic equipment.
Mohamed Mohamed Atalla was an Egyptian-American engineer, physical chemist, cryptographer, inventor and entrepreneur. His pioneering work in semiconductor technology laid the foundations for modern electronics. Most importantly, his invention of the MOSFET in 1959, along with his earlier surface passivation and thermal oxidation processes, revolutionized the electronics industry. He is also known as the founder of the data security company Atalla Corporation, founded in 1972, which introduced the first hardware security module and was a pioneer in online security. He received the Stuart Ballantine Medal and was inducted into the National Inventors Hall of Fame for his important contributions to semiconductor technology as well as data security.
Bernard A Yurash was a significant contributor to the creation of the first commercially viable CMOS integrated circuits by finding the sources of mobile sodium ions coming from the manufacturing process. Today, virtually all digital electronics use CMOS circuitry. Bernard worked at Fairchild Semiconductor in Silicon Valley from 1958, through the buyouts of the company by Schlumberger and National Semiconductor, and finally retiring in 1990. In the 1960s Fairchild Semiconductor, a division of Fairchild Camera and Instrument Corp., and Texas Instruments, revolutionized electronics by employing the first integrated circuit technology. Fairchild's Robert Noyce filed for this patent using deposited (printed) metal lines and Jean Hoerni's Planar Process. At the time virtually all the devices were of the bipolar type which were used to construct RTL and DTL type circuits, which unfortunately drew more power than was desired, and eventually lost ground to Texas Instruments' TTL (Transistor-Transistor-logic). The next great technological leap in computer chips would be CMOS transistors, which promised significantly lower power and greater circuit density than the Bipolar circuitry. Although Frank Wanlass first filed for the CMOS patent in 1963, Fairchild could not produce the devices for commercial output for many years because of the mystery of the mobile ions degrading their performance. Much research time and money was expended in 1967 and 1968 at Fairchild on trying to manufacture the highly promising technology, the MOS SGT circuits utilizing the field effect from the "gate" on the conducting "channel" from source to drain.