Tsu-Jae King Liu | |
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Dean of the UC Berkeley College of Engineering | |
Assumed office June 2018 | |
Personal details | |
Born | Ithaca, New York, U.S. | June 4, 1963
Alma mater | Stanford University (BS, MS, PhD) |
Tsu-Jae King Liu is an American academic and engineer who serves as the Dean and the Roy W. Carlson Professor of Engineering at the UC Berkeley College of Engineering.
Liu is an electrical engineer with extensive expertise and achievements in both academia and the semiconductor industry. At Berkeley, Liu leads a research team that explores the development of novel semiconductor devices, non-volatile memory devices, and M/NEMS technology for ultra-low power circuits. Her team is a part of the Berkeley Emerging Technologies Research Center and the NSF Center for Energy Efficient Electronics in Science. She is also a faculty member of the Kavli Energy NanoScience Institute at Berkeley [1] and an affiliate faculty member of Berkeley's Applied Science & Technology Graduate Program and the Nanoscale Science and Engineering Graduate Group.
Liu was born in Ithaca, New York to Taiwanese parents who were graduate students at Cornell University. Her father's research was in the area of earthquake prediction and, as such, she spent the majority of her childhood in the San Francisco Bay Area. [2] As a high-school student, Liu was given a tour of the PARC campus, where her interest in computing was stimulated by a demonstration of the Xerox Alto. [3] [4]
Liu received a bachelor of science, a master of science, and a doctor of philosophy in electrical engineering from Stanford University in 1984, 1986, and 1994, respectively. [5]
After graduating from Stanford, Liu joined the research staff at the Xerox Palo Alto Research Center (PARC). Her time at PARC from 1992 to 1996 was distinguished by her work on polycrystalline thin-film transistors. In August 1996, Liu joined Berkeley as a faculty member of the Electrical Engineering and Computer Science Department. Liu has contributed to many developments in the field of semiconductor devices and technology and has co-authored over 500 papers.
Liu's leading contributions span many research areas but she is perhaps best known for the development of polycrystalline silicon-germanium thin film technology for applications in integrated circuits and microsystems. Liu is also the co-inventor of the three-dimensional FinFET transistor (fin field-effect transistor) which is the design that is used in all leading microprocessor chips today. Liu was elected to the National Academy of Engineering in 2017 "for contributions to the fin field effect transistor (FinFET) and its application to nanometer complementary metal–oxide–semiconductor (CMOS) technology". [6]
She holds over 94 patents in the area of semiconductor devices and fabrication methods, with 80 patents pending as of 2017, 37 of which had been assigned to a company she founded, Progressant Technologies, acquired by Synopsys in 2004. [7]
In her role as dean of Berkeley's College of Engineering, Liu has been outspoken about her commitment to increase diversity and foster inclusion and respect for women and members of underrepresented minorities in engineering. [8] Prior to assuming her role as dean, Liu had served in extensive leadership roles at Berkeley. She was the faculty director of the Marvell Nanofabrication Laboratory. [9] From 2008 to 2012, she was associate dean for research in the College of Engineering. She served as chair of the Electrical Engineering Division from 2012 to 2014 and as chair of the Electrical Engineering and Computer Science Department from 2014 to 2016. [10]
She was previously senior director of engineering in the Advanced Technology Group of Synopsys. [11]
Since 2016, Liu has served as a member of the board of directors of Intel. [12]
In 2024 she received the IEEE Founders Medal. [13]
A full list of Liu's publications are available online. [14] This is a list are of her most cited works:
Liu has received numerous accolades for her research contributions:
She has also been recognized for her contributions to teaching and mentorship as a faculty member:
Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as computer processors, microcontrollers, and memory chips. It is a multiple-step photolithographic and physio-chemical process during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.
A transistor is a semiconductor device used to amplify or switch electrical signals and power. It is one of the basic building blocks of modern electronics. It is composed of semiconductor material, usually with at least three terminals for connection to an electronic circuit. A voltage or current applied to one pair of the transistor's terminals controls the current through another pair of terminals. Because the controlled (output) power can be higher than the controlling (input) power, a transistor can amplify a signal. Some transistors are packaged individually, but many more in miniature form are found embedded in integrated circuits. Because transistors are the key active components in practically all modern electronics, many people consider them one of the 20th century's greatest inventions.
Moore's law is the observation that the number of transistors in an integrated circuit (IC) doubles about every two years. Moore's law is an observation and projection of a historical trend. Rather than a law of physics, it is an empirical relationship linked to gains from experience in production.
EEPROM or E2PROM (electrically erasable programmable read-only memory) is a type of non-volatile memory. It is used in computers, usually integrated in microcontrollers such as smart cards and remote keyless systems, or as a separate chip device, to store relatively small amounts of data by allowing individual bytes to be erased and reprogrammed.
In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving performance. SOI-based devices differ from conventional silicon-built devices in that the silicon junction is above an electrical insulator, typically silicon dioxide or sapphire. The choice of insulator depends largely on intended application, with sapphire being used for high-performance radio frequency (RF) and radiation-sensitive applications, and silicon dioxide for diminished short-channel effects in other microelectronics devices. The insulating layer and topmost silicon layer also vary widely with application.
A fin field-effect transistor (FinFET) is a multigate device, a MOSFET built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, forming a double or even multi gate structure. These devices have been given the generic name "FinFETs" because the source/drain region forms fins on the silicon surface. The FinFET devices have significantly faster switching times and higher current density than planar CMOS technology.
Aldert van der Ziel, was a Dutch physicist who studied electronic noise processes in materials such as semiconductors and metals.
SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"silicon dioxide"—"silicon", is a cross sectional structure of MOSFET (metal–oxide–semiconductor field-effect transistor), realized by P.C.Y. Chen of Fairchild Camera and Instrument in 1977. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and Floadia.
The "14 nanometer process" refers to a marketing term for the MOSFET technology node that is the successor to the "22 nm" node. The "14 nm" was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following "22 nm" was expected to be "16 nm". All "14 nm" nodes use FinFET technology, a type of multi-gate MOSFET technology that is a non-planar evolution of planar silicon CMOS technology.
A multigate device, multi-gate MOSFET or multi-gate field-effect transistor (MuGFET) refers to a metal–oxide–semiconductor field-effect transistor (MOSFET) that has more than one gate on a single transistor. The multiple gates may be controlled by a single gate electrode, wherein the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes. A multigate device employing independent gate electrodes is sometimes called a multiple-independent-gate field-effect transistor (MIGFET). The most widely used multi-gate devices are the FinFET and the GAAFET, which are non-planar transistors, or 3D transistors.
Nanocircuits are electrical circuits operating on the nanometer scale where quantum mechanical effects become important. One nanometer is equal to 10−9 meters or a row of 10 hydrogen atoms. With such progressively smaller circuits, more can be fitted on a computer chip. This allows faster and more complex functions using less power. Nanocircuits are composed of three different fundamental components. These are transistors, interconnections, and architecture, all fabricated on the nanometer scale.
Chenming Calvin Hu is a Taiwanese-American electronic engineer who specializes in microelectronics. He is TSMC Distinguished Professor Emeritus in the electronic engineering and computer science department of the University of California, Berkeley, in the United States. In 2009, the Institute of Electrical and Electronics Engineers described him as a “microelectronics visionary … whose seminal work on metal-oxide semiconductor MOS reliability and device modeling has had enormous impact on the continued scaling of electronic devices”.
In semiconductor manufacturing, the International Roadmap for Devices and Systems defines the "5 nm" process as the MOSFET technology node following the "7 nm" node. In 2020, Samsung and TSMC entered volume production of "5 nm" chips, manufactured for companies including Apple, Marvell, Huawei and Qualcomm.
The field-effect transistor (FET) is a type of transistor that uses an electric field to control the flow of current in a semiconductor. It comes in two types: junction FET (JFET) and metal-oxide-semiconductor FET (MOSFET). FETs have three terminals: source, gate, and drain. FETs control the flow of current by the application of a voltage to the gate, which in turn alters the conductivity between the drain and source.
A nanoelectromechanical (NEM) relay is an electrically actuatedswitch that is built on the nanometer scale using semiconductor fabrication techniques. They are designed to operate in replacement of, or in conjunction with, traditional semiconductor logic. While the mechanical nature of NEM relays makes them switch much slower than solid-state relays, they have many advantageous properties, such as zero current leakage and low power consumption, which make them potentially useful in next generation computing.
Beyond CMOS refers to the possible future digital logic technologies beyond the scaling limits of CMOS technology. which limits device density and speeds due to heating effects.
Dr. Gary Patton is an American technologist and business executive. He is currently the Corporate Vice President and General Manager of Design Enablement and Components Research in the Technology Development Group at Intel. He has spent most of his career in IBM, starting in IBM's Research Division and holding management and executive positions in IBM's Microelectronics Division in Technology Development, Design Enablement, Manufacturing, and Business Line Management.
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Costas J. Spanos is the Director of the Center for Information Technology Research in the Interest of Society (CITRIS) at UC Berkeley. He is also the CEO of the Berkeley Educational Alliance for Research in Singapore (BEARS) and the Andrew S. Grove Distinguished Professor of Electrical Engineering and Computer Sciences (EECS) at UC Berkeley.