Tape-automated bonding

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Drawing of a tape-automated bonding carrier and definitions of various parts of the TAB assembly. Tape-automated bonding carrier.svg
Drawing of a tape-automated bonding carrier and definitions of various parts of the TAB assembly.

Tape-automated bonding (TAB) is a process that places bare semiconductor chips (dies) like integrated circuits onto a flexible circuit board (FPC) by attaching them to fine conductors in a polyamide or polyimide (like trade names Kapton or UPILEX) film carrier. This FPC with the die(s) (TAB inner lead bonding, ILB) can be mounted on the system or module board or assembled inside a package (TAB outer lead bonding, OLB). Typically the FPC includes from one to three conductive layers and all inputs and outputs of the semiconductor die are connected simultaneously during the TAB bonding. [1] [2] [3] Tape automated bonding is one of the methods needed for achieving chip-on-flex (COF) assembly and it is one of the first roll-to-roll processing (also called R2R, reel-to-reel) type methods in the electronics manufacturing.

Contents

A silicon IC as tape automated bonded (TAB) realization on the 35 mm wide tape. The upper picture shows the IC front side as glob topped (in the middle seen as a black object) and the lower picture shows the backside of the same assembly. A silicon IC as tape automated bonded (TAB) on the 35mm tape. Upper picture shows IC front side as glob topped and lower picture backside of the IC.png
A silicon IC as tape automated bonded (TAB) realization on the 35 mm wide tape. The upper picture shows the IC front side as glob topped (in the middle seen as a black object) and the lower picture shows the backside of the same assembly.

Process

The TAB mounting is done such that the bonding sites of the die, usually in the form of bumps or balls made of gold, solder or anisotropic conductive material, are connected to fine conductors on the tape, which provide the means of connecting the die to the package or directly to external circuits. The bumps or balls can locate either on the die or on the TAB tape. TAB compliant metallizations systems are: [4]

Sometimes the tape on which the die is bonded already contains the actual application circuit of the die. [5] The film is moved to the target location, and the leads are cut and joining the chip takes place as necessary. There are several joining methods used with TAB: thermocompression bonding (with help of a pressure, sometimes called as a gang bonding), thermosonic bonding etc. The bare chip may then be encapsulated ("glob topped") with epoxy or similar. [6]

Example of a TAB tape after assembly. Chips can be located on other places than in the middle of the tape, in this case on the left hand side of the tape. Glob topped chips are visible as black, one missing and the rest without a glob top. Example of a TAB tape after assembly. Chips can be located on othe places tha in the middle of the tape, in this case on the left hand side of the tape. Glob topped chips are visible as black, one missing and the rest without glob top.png
Example of a TAB tape after assembly. Chips can be located on other places than in the middle of the tape, in this case on the left hand side of the tape. Glob topped chips are visible as black, one missing and the rest without a glob top.

The merits of the tape-automated bonding are:

The challenges of the tape-automated bonding are:

Standards

Standard sizes for polyimide tapes include widths of 35 mm, 45 mm, and 70 mm and thicknesses between 50 and 100 micrometers. Since the tape is in the form of a roll, the length of the circuit is measured in terms of sprocket pitches, with each sprocket pitch measuring about 4.75 mm. Thus, a circuit size of 16 pitches is about 76 mm long.

History and background

Technically the process was invented by Frances Hugle -patent issued 1969 - although it was not named as TAB. [10] The TAB was first outlined by Gerard Dehaine 1971 at Honeywell Bull. [11] Historically, TAB was created as an alternative to wire bonding and finds common use by electronics manufacturers. [12] However speed up of wire bonding methods and development of flip chip - enabling simultaneous bonding of all IOs of the die and easier repaire compared to TAB - have pushed TAB bonding to be used in specific areas like for interconnection of display drivers to the display like liquid crystal display (LCD).

Related Research Articles

<span class="mw-page-title-main">Semiconductor device fabrication</span> Manufacturing process used to create integrated circuits

Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as computer processors, microcontrollers, and memory chips that are present in everyday electrical and electronic devices. It is a multiple-step photolithographic and physio-chemical process during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.

<span class="mw-page-title-main">Dual in-line package</span> Type of electronic component package

In microelectronics, a dual in-line package, is an electronic component package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board (PCB) or inserted in a socket. The dual-inline format was invented by Don Forbes, Rex Rice and Bryant Rogers at Fairchild R&D in 1964, when the restricted number of leads available on circular transistor-style packages became a limitation in the use of integrated circuits. Increasingly complex circuits required more signal and power supply leads ; eventually microprocessors and similar complex devices required more leads than could be put on a DIP package, leading to development of higher-density chip carriers. Furthermore, square and rectangular packages made it easier to route printed-circuit traces beneath the packages.

<span class="mw-page-title-main">Printed circuit board</span> Board to support and connect electronic components

A printed circuit board is a medium used to connect electronic components to one another in a controlled manner. It takes the form of a laminated sandwich structure of conductive and insulating layers: each of the conductive layers is designed with an artwork pattern of traces, planes and other features etched from one or more sheet layers of copper laminated onto and/or between sheet layers of a non-conductive substrate. Electrical components may be fixed to conductive pads on the outer layers in the shape designed to accept the component's terminals, generally by means of soldering, to both electrically connect and mechanically fasten them to it. Another manufacturing process adds vias: plated-through holes that allow interconnections between layers.

<span class="mw-page-title-main">Wire bonding</span> Technique used to connect a microchip to its package

Wire bonding is the method of making interconnections between an integrated circuit (IC) or other semiconductor device and its packaging during semiconductor device fabrication. Although less common, wire bonding can be used to connect an IC to other electronics or to connect from one printed circuit board (PCB) to another. Wire bonding is generally considered the most cost-effective and flexible interconnect technology and is used to assemble the vast majority of semiconductor packages. Wire bonding can be used at frequencies above 100 GHz.

<span class="mw-page-title-main">Ball grid array</span> Surface-mount packaging that uses an array of solder balls

A ball grid array (BGA) is a type of surface-mount packaging used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be put on a dual in-line or flat package. The whole bottom surface of the device can be used, instead of just the perimeter. The traces connecting the package's leads to the wires or balls which connect the die to package are also on average shorter than with a perimeter-only type, leading to better performance at high speeds.

<span class="mw-page-title-main">Flexible electronics</span> Mounting of electronic devices on flexible plastic substrates

Flexible electronics, also known as flex circuits, is a technology for assembling electronic circuits by mounting electronic devices on flexible plastic substrates, such as polyimide, PEEK or transparent conductive polyester film. Additionally, flex circuits can be screen printed silver circuits on polyester. Flexible electronic assemblies may be manufactured using identical components used for rigid printed circuit boards, allowing the board to conform to a desired shape, or to flex during its use.

<span class="mw-page-title-main">Flip chip</span> Technique that flips a microchip upside down to connect it

Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting dies such as semiconductor devices, IC chips, integrated passive devices and microelectromechanical systems (MEMS), to external circuitry with solder bumps that have been deposited onto the chip pads. The technique was developed by General Electric's Light Military Electronics Department, Utica, New York. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external circuitry, it is flipped over so that its top side faces down, and aligned so that its pads align with matching pads on the external circuit, and then the solder is reflowed to complete the interconnect. This is in contrast to wire bonding, in which the chip is mounted upright and fine wires are welded onto the chip pads and lead frame contacts to interconnect the chip pads to external circuitry.

<span class="mw-page-title-main">Integrated circuit packaging</span> Final stage of semiconductor device fabrication

In electronics manufacturing, integrated circuit packaging is the final stage of semiconductor device fabrication, in which the block of semiconductor material is encapsulated in a supporting case that prevents physical damage and corrosion. The case, known as a "package", supports the electrical contacts which connect the device to a circuit board.

<span class="mw-page-title-main">Quad flat package</span> Surface mount integrated circuit package with "gull wing" pins extending from all sides

A quad flat package (QFP) is a surface-mounted integrated circuit package with "gull wing" leads extending from each of the four sides. Socketing such packages is rare and through-hole mounting is not possible. Versions ranging from 32 to 304 pins with a pitch ranging from 0.4 to 1.0 mm are common. Other special variants include low-profile QFP (LQFP) and thin QFP (TQFP).

<span class="mw-page-title-main">Hybrid integrated circuit</span> Type of miniature electronic circuit

A hybrid integrated circuit (HIC), hybrid microcircuit, hybrid circuit or simply hybrid is a miniaturized electronic circuit constructed of individual devices, such as semiconductor devices and passive components, bonded to a substrate or printed circuit board (PCB). A PCB having components on a Printed Wiring Board (PWB) is not considered a true hybrid circuit according to the definition of MIL-PRF-38534.

<span class="mw-page-title-main">System in a package</span>

A system in a package (SiP) or system-in-package is a number of integrated circuits (ICs) enclosed in one chip carrier package or encompassing an IC package substrate that may include passive components and perform the functions of an entire system. The ICs may be stacked using package on package, placed side by side, and/or embedded in the substrate. The SiP performs all or most of the functions of an electronic system, and is typically used when designing components for mobile phones, digital music players, etc. Dies containing integrated circuits may be stacked vertically on a substrate. They are internally connected by fine wires that are bonded to the package. Alternatively, with a flip chip technology, solder bumps are used to join stacked chips together. SiPs are like systems on a chip (SoCs) but less tightly integrated and not on a single semiconductor die.

Package on a package (PoP) is an integrated circuit packaging method to vertically combine discrete logic and memory ball grid array (BGA) packages. Two or more packages are installed atop each other, i.e. stacked, with a standard interface to route signals between them. This allows higher component density in devices, such as mobile phones, personal digital assistants (PDA), and digital cameras, at the cost of slightly higher height requirements. Stacks with more than 2 packages are uncommon, due to heat dissipation considerations.

<span class="mw-page-title-main">Thermal copper pillar bump</span>

The thermal copper pillar bump, also known as the "thermal bump", is a thermoelectric device made from thin-film thermoelectric material embedded in flip chip interconnects for use in electronics and optoelectronic packaging, including: flip chip packaging of CPU and GPU integrated circuits (chips), laser diodes, and semiconductor optical amplifiers (SOA). Unlike conventional solder bumps that provide an electrical path and a mechanical connection to the package, thermal bumps act as solid-state heat pumps and add thermal management functionality locally on the surface of a chip or to another electrical component. The diameter of a thermal bump is 238 μm and 60 μm high.

<span class="mw-page-title-main">Integrated passive devices</span>

Integrated passive devices (IPDs), also known as integrated passive components (IPCs) or embedded passive components (EPC), are electronic components where resistors (R), capacitors (C), inductors (L)/coils/chokes, microstriplines, impedance matching elements, baluns or any combinations of them are integrated in the same package or on the same substrate. Sometimes integrated passives can also be called as embedded passives, and still the difference between integrated and embedded passives is technically unclear. In both cases passives are realized in between dielectric layers or on the same substrate.

<span class="mw-page-title-main">BPDA</span> Chemical compound

BPDA or biphenyl-tetracarboxylic acid dianhydride is a monomer used in the production of some polyimides.

Thermosonic bonding is widely used to wire bond silicon integrated circuits into computers. Alexander Coucoulas was named "Father of Thermosonic Bonding" by George Harman, the world's foremost authority on wire bonding, where he referenced Coucoulas's leading edge publications in his book, Wire Bonding In Microelectronics. Owing to the well proven reliability of thermosonic bonds, it is extensively used to connect the central processing units (CPUs), which are encapsulated silicon integrated circuits that serve as the "brains" of today's computers.

<span class="mw-page-title-main">Compliant bonding</span>

Compliant bonding is used to connect gold wires to electrical components such as integrated circuit "chips". It was invented by Alexander Coucoulas in the 1960s. The bond is formed well below the melting point of the mating gold surfaces and is therefore referred to as a solid-state type bond. The compliant bond is formed by transmitting heat and pressure to the bond region through a relatively thick indentable or compliant medium, generally an aluminum tape.

<span class="mw-page-title-main">Chip on board</span> Method of circuit board manufacture

Chip on board (COB) is a method of circuit board manufacturing in which the integrated circuits (e.g. microprocessors) are attached (wired, bonded directly) to a printed circuit board, and covered by a blob of epoxy. By eliminating the packaging of individual semiconductor devices, the completed product can be more compact, lighter, and less costly. In some cases, COB construction improves the operation of radio frequency systems by reducing the inductance and capacitance of integrated circuit leads.

Glossary of microelectronics manufacturing terms

References

  1. "Lecture: Interconnection in IC assembly" (PDF).
  2. Greig, W. J. (2007). Integrated Circuit Packaging, Assembly and Interconnections. Springer. pp. 129–142. ISBN   978-0-387-28153-7.
  3. Lau, J. H. (1982). Handbook of Tape Automated Bonding 645 p. Springer. ISBN   978-0442004279.
  4. "Roadmaps of Packaging Technology, Integrated circuit Engineering, Chapter 9 (editors D. Potter and L. Peters), Chip bonding at the first level, 9-1...9-38" (PDF).
  5. "TAB at Silicon Far East on-line".
  6. "Tape-Automated Bonding". Centre for High Performance Integrated Technologies and Systems (CHIPTEC). March 1997.
  7. Lai, J.K.L.; et., al. (1995). "Effects of bond temperature and pressure on microstructures of tape automated bonding (TAB) inner lead bonds (ILB) with thin tape metallization". 1995 Proceedings. 45th Electronic Components and Technology Conference. pp. 819–826. doi:10.1109/ECTC.1995.517782. ISBN   0-7803-2736-5. S2CID   136639010.
  8. Yan-Xiang, K.; Ling, L. (1990). "Tape bump forming and bonding in BTAB". 40th Conference Proceedings on Electronic Components and Technology. 2: 943–947. doi:10.1109/ECTC.1990.122302. S2CID   110303672.
  9. Kurzweil, K.; Dehaine, G. (1982). "Density Upgrade in Tape Automated Bonding". Electrocomponent Science and Technology, Gordon and Breach Science Publishers, Inc. 10: 51–55.
  10. "Patent US3440027 Automated packaging of Semiconductors".
  11. "Tape Automated Bonding" (PDF).
  12. "Tape Automated Bonding (TAB)". Advantest Europe Customer Newsletter. Advantest GmbH.