Hartley oscillator

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The Hartley oscillator is an electronic oscillator circuit in which the oscillation frequency is determined by a tuned circuit consisting of capacitors and inductors, that is, an LC oscillator. The circuit was invented in 1915 by American engineer Ralph Hartley. The distinguishing feature of the Hartley oscillator is that the tuned circuit consists of a single capacitor in parallel with two inductors in series (or a single tapped inductor), and the feedback signal needed for oscillation is taken from the center connection of the two inductors.

Contents

History

Original patent drawing Hartley-US-Pat 1,356,763.png
Original patent drawing

The Hartley oscillator was invented by Hartley while he was working for the Research Laboratory of the Western Electric Company. Hartley invented and patented the design in 1915 while overseeing Bell System's transatlantic radiotelephone tests; it was awarded patent number 1,356,763 on October 26, 1920. [1] Note that the basic schematic shown below labeled "Common-drain Hartley circuit" is essentially the same as in the patent drawing, except that the tube is replaced by a JFET, and that the battery for a negative grid bias is not needed.

In 1946 Hartley was awarded the IRE medal of honor "For his early work on oscillating circuits employing triode tubes and likewise for his early recognition and clear exposition of the fundamental relationship between the total amount of information which may be transmitted over a transmission system of limited band-width and the time required." [2] (The second half of the citation refers to Hartley's work in information theory which largely paralleled Harry Nyquist.)

Operation

Common-drain Hartley circuit, using an n-channel JFET. Hartley osc.svg
Common-drain Hartley circuit, using an n-channel JFET.

The Hartley oscillator is distinguished by a tank circuit consisting of two series-connected coils (or, often, a tapped coil) in parallel with a capacitor, with an amplifier between the relatively high impedance across the entire LC tank and the relatively low voltage/high current point between the coils. The original 1915 version used a triode as the amplifying device in common cathode configuration, with three batteries, and separate adjustable coils. The simplified circuit shown to the right uses a JFET (in common-drain configuration), an LC tank circuit (here the single winding is tapped) and a single battery. The circuit illustrates the Hartley oscillator operation:[ dubious ]

Variations on the simple circuit often include ways to automatically reduce the amplifier gain to maintain a constant output voltage at a level below overload; the simple circuit above will limit the output voltage due to the gate conducting on positive peaks, effectively damping oscillations but not before significant distortion (spurious harmonics) may result. Changing the tapped coil to two separate coils, as in the original patent schematic, still results in a working oscillator but now that the two coils are not magnetically coupled the inductance, and so frequency, calculation has to be modified (see below), and the explanation of the voltage increase mechanism is more complicated than the autotransformer scenario.

A quite different implementation using a tapped coil in an LC tank feedback arrangement is to employ a common-grid (or common-gate or common-base) amplifier stage, [3] which is still non-inverting but provides voltage gain instead of current gain; the coil tapping is still connected to the cathode (or source or emitter), but this is now the (low impedance) input to the amplifier; the split tank circuit is now dropping the impedance from the relatively high output impedance of the plate (or drain or collector).

Comparison of Hartley and Colpitts oscillator Oscillator comparison.svg
Comparison of Hartley and Colpitts oscillator

The Hartley oscillator is the mono of the Colpitts oscillator which uses a voltage divider made of two capacitors rather than two inductors. Although there is no requirement for there to be mutual coupling between the two coil segments, the circuit is usually implemented using a tapped coil, with the feedback taken from the tap, as shown here. The optimal tapping point (or ratio of coil inductances) depends on the amplifying device used, which may be a bipolar junction transistor, FET, triode, or amplifier of almost any type (non-inverting in this case, although variations of the circuit with an earthed centre-point and feedback from an inverting amplifier or the collector/drain of a transistor are also common), but a junction FET (shown) or triode is often employed as a good degree of amplitude stability (and thus distortion reduction) can be achieved with a simple grid leak resistor-capacitor combination in series with the gate or grid (see the Scott circuit below) thanks to diode conduction on signal peaks building up enough negative bias to limit amplification.

The frequency of oscillation is approximately the resonant frequency of the tank circuit. If the capacitance of the tank capacitor is C and the total inductance of the tapped coil is L then

If two uncoupled coils of inductance L1 and L2 are used then

However, if the two coils are magnetically coupled the total inductance will be greater because of mutual inductance k [4]

The actual oscillation frequency will be slightly lower than given above, because of parasitic capacitance in the coil and loading by the transistor.

Advantages of the Hartley oscillator :

Disadvantages:

Practical example

Practical common-drain Hartley oscillator with an oscillation frequency of ~10 MHz Hartley Osz JFET Drain.gif
Practical common-drain Hartley oscillator with an oscillation frequency of ~10 MHz

The schematic shows an example with component values. [5] Instead of field-effect transistors, other active components such as bipolar junction transistors or vacuum tubes, capable of producing gain at the desired frequency, could be used.

The common drain amplifier has a high input impedance and a low output impedance. Therefore the amplifier input is connected to the high impedance top of the LC circuit C1, L1, L2 and the amplifier output is connected to the low impedance tap of the LC circuit. The grid leak C2 and R1 sets the operating point automatically through grid leak bias. A smaller value of C2 gives less harmonic distortion, but requires a larger load resistor. The load resistor RL is part of the simulation, not part of the circuit.

See also

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References

  1. "Patent US1356763: Oscillation-generator" (PDF). United States Office Patent. Retrieved 22 March 2016.
  2. "Ralph Hartley". Engineering and Technology History Wiki. 24 February 2016. Retrieved December 4, 2021.
  3. Coates, Eric. "The Hartley Oscillator". Learnabout electronics. Retrieved 22 March 2016.
  4. Jim McLucas, Hartley oscillator requires no coupled inductors, EDN October 26, 2006 "Hartley oscillator requires no coupled inductors - 10/26/2006 - EDN". Archived from the original on 2008-07-04. Retrieved 2008-12-10.
  5. Hayward, Wes (1994). "Figure 7.16 A practical JFET Hartley oscillator". Introduction to Radio Frequency Design. US: ARRL. p. 285. ISBN   0-87259-492-0.

Bibliography