Type | Digital computer |
---|---|
Release date | 1954 |
Predecessor | IBM CPC (604, 605) |
Successor | IBM 7070 (hi-end) IBM 1620 (low-end) |
Related | IBM 701, IBM 702; IBM 608 |
The IBM 650 Magnetic Drum Data-Processing Machine is an early digital computer produced by IBM in the mid-1950s. [2] [3] It was the first mass-produced computer in the world. [4] [5] Almost 2,000 systems were produced, the last in 1962, [6] [7] and it was the first computer to make a meaningful profit. [7] The first one was installed in late 1954 and it was the most popular computer of the 1950s. [8]
The 650 was offered to business, scientific and engineering users as a slower and less expensive alternative to the IBM 701 and IBM 702 computers, which were for scientific and business purposes respectively. [7] It was also marketed to users of punched card machines who were upgrading from calculating punches, such as the IBM 604, to computers. [1] : 5 [9]
Because of its relatively low cost and ease of programming, the 650 was used to pioneer a wide variety of applications, from modeling submarine crew performance [10] to teaching high school and college students computer programming. The IBM 650 became highly popular in universities, where a generation of students first learned programming. [11]
It was announced in 1953 and in 1956 enhanced as the IBM 650 RAMAC with the addition of up to four disk storage units. [12] The purchase price for the bare IBM 650 console, without the reader punch unit, was $150,000 in 1959, [13] or roughly $1,500,000 as of 2023. Support for the 650 and its component units was withdrawn in 1969.
The 650 was a two-address, bi-quinary coded decimal computer (both data and addresses were decimal), with memory on a rotating magnetic drum. Character support was provided by the input/output units converting punched card alphabetical and special character encodings to/from a two-digit decimal code.
The 650 was clocked at a frequency of 125 kHz. [14] It could add or subtract in 1.63 milliseconds, multiply in 12.96 ms, and divide in 16.90 ms. The average speed of the 650 was estimated to be around 27.6 ms per instruction, or roughly 40 instructions per second. [15]
Donald Knuth's series of books The Art of Computer Programming is famously dedicated to a 650. [15]
The first 650 was installed on December 8, 1954 in the controller's department of the John Hancock Mutual Life Insurance Company in Boston. [16]
The IBM 7070 (signed 10-digit decimal words), announced 1958, was expected to be a "common successor to at least the 650 and the [IBM] 705". [17] The IBM 1620 (variable-length decimal), introduced in 1959, addressed the lower end of the market. The UNIVAC Solid State (a two-address computer, signed 10-digit decimal words) was announced by Sperry Rand in December 1958 as a response to the 650. None of these had an instruction set that was compatible with the 650.
The basic 650 system consisted of three units: [18]
Weight: 5,400–6,263 pounds (2.7–3.1 short tons; 2.4–2.8 t). [24] [25]
Optional units: [18]
Rotating drum memory provided 1,000, 2,000, or 4,000 words of memory at addresses 0000 to 0999, 1999, or 3999 respectively. Each word had 10 bi-quinary coded decimal digits, representing a signed 10-digit number or five characters. (Counting a bi-quinary coded digit as seven bits, 4000 words would be equivalent to 35 kilobytes.) [31] [32] Words on the drums were organized in bands around the drum, fifty words per band, and 20, 40, or 80 bands for the respective models. A word could be accessed when its location on the drum surface passed under the read/write heads during rotation (rotating at 12,500 rpm, the non-optimized average access time was 2.5 ms). Because of this timing, the second address in each instruction was the address of the next instruction. Programs could then be optimized by placing instructions at addresses that would be immediately accessible when execution of the previous instruction was completed. IBM provided a form with ten columns and 200 rows to allow programmers to keep track of where they put instructions and data. Later an assembler, SOAP (Symbolic Optimal Assembly Program), was provided that performed rough optimization. [33] [34]
The LGP-30, Bendix G-15 and IBM 305 RAMAC computers used vacuum tubes and drum memory too, but they were quite different from the IBM 650.
Instructions read from the drum went to a program register (in current terminology, an instruction register). Data read from the drum went through a 10-digit distributor. The 650 had a 20-digit accumulator, divided into 10-digit lower and upper accumulators with a common sign. Arithmetic was performed by a one-digit adder. The console (10 digit switches, one sign switch, and 10 bi-quinary display lights), distributor, lower and upper accumulators were all addressable; 8000, 8001, 8002, 8003 respectively.
The optional IBM 653 Storage Unit, was introduced on May 3, 1955, ultimately providing up to five features: [35]
The 650 instructions consisted of a two-digit operation code, a four-digit data address and the four-digit address of the next instruction. The sign was ignored on the basic machine, but was used on machines with optional features. The base machine had 44 operation codes. Additional operation codes were provided for options, such as floating point, core storage, index registers and additional I/O devices. With all options installed, there were 97 operation codes. [35]
The Table lookup (TLU) instruction could high-equal compare a referenced 10-digit word with 48 consecutive words on the same drum band in one 5ms revolution and then switch to the next band in time for the next 48 words. This feat was about one-third the speed of a one-thousand times faster binary machine in 1963 (1,500 microseconds on the IBM 7040 to 5,000 microseconds on the 650) for looking up 46 entries as long as both were programmed in assembler. There was an optional Table lookup Equal instruction, with the same performance.
The Read (RD) instruction read an 80-column card of numeric data into ten memory words; the distribution of digits to words determined by the card reader's control panel wiring. When used with the 533 Reader Punch unit's Alphabetic device, a combination of numeric and alphanumeric columns (maximum of 30 alphanumeric columns) could be read. [1] An expansion feature allowed more alphanumeric columns but certainly not over 50, as only ten words (five characters per word) were stored on the drum by a card read operation.[ citation needed ]
The base machine operation codes were: [36]
17 | AABL | Add absolute to lower accumulator |
15 | AL | Add to lower accumulator |
10 | AU | Add to upper accumulator |
45 | BRNZ | Branch on accumulator non-zero |
46 | BRMIN | Branch on minus accumulator |
44 | BRNZU | Branch on non-zero in upper accumulator |
47 | BROV | Branch on overflow |
90-99 | BRD | Branch on 8 in distributor positions 1-10 [lower-alpha 1] |
14 | DIV | Divide |
64 | DIVRU | Divide and reset upper accumulator |
69 | LD | Load distributor |
19 | MULT | Multiply |
00 | NO-OP | No operation |
71 | PCH | Punch a card |
70 | RD | Read a card |
67 | RAABL | Reset accumulator and add absolute to lower accumulator |
65 | RAL | Reset accumulator and add to lower accumulator |
60 | RAU | Reset accumulator and add to upper accumulator |
68 | RSABL | Reset accumulator and subtract absolute from lower accumulator |
66 | RSL | Reset accumulator and subtract from lower accumulator |
61 | RSU | Reset accumulator and subtract from upper accumulator |
35 | SLT | Shift accumulator left |
36 | SCT | Shift accumulator left and count [lower-alpha 2] |
30 | SRT | Shift accumulator right |
31 | SRD | Shift accumulator right and round accumulator |
01 | STOP | Stop if console switch is set to stop, otherwise continue as a NO-OP |
24 | STD | Store distributor into memory |
22 | STDA | Store lower accumulator data address into distributor Then store distributor into memory |
23 | STIA | Store lower accumulator instruction address into distributor Then store distributor into memory |
20 | STL | Store lower accumulator into memory |
21 | STU | Store upper accumulator into memory. [lower-alpha 3] |
18 | SABL | Subtract absolute from lower accumulator |
16 | SL | Subtract from lower accumulator |
11 | SU | Subtract from upper accumulator |
84 | TLU | Table lookup |
Notes:
The IBM 653 options could implement additional instruction codes. [35]
This one-card program, taken from the 650 Programming Bulletin 5, IBM, 1956, 22-6314-0, will set most of the drum storage to minus zeros. The program includes examples of instructions being executed from the console switches and from an accumulator.
To begin, a load card is keypunched with 80 consecutive digits (the second column below) so that, when read, drum locations 0001 through 0008 contents will be as shown. [37]
0001 0000010000 0002 0000000000- 0003 1000018003 0004 6100080007 0005 2400008003 0006 0100008000 0007 6900060005 0008 2019990003
The console digit switches (address 8000) are manually set to a Read instruction with data address 0004.
loc- op|data|next ation |addr|instruction | |addr
8000 RD 70 0004 xxxx Read load card into first band read area
Each drum band has a read area; these read areas are in locations 0001-0010, 0051-0060, 0101-0110 and so on. Any address in a band can be used to identify that band for a read instruction; the address 0004 identifies the first band. Execution begins then, from the console with the reading of the eight words on the load card into locations 0001-0008 of the first memory band. In the case of reading a load card, the "next instruction address" is taken from the data address field, not the next instruction address field (shown above as xxxx). Thus execution continues at 0004
0004 RSU 61 0008 0007 Reset entire accumulator, subtract into upper (8003) the value 2019990003 0007 LD 69 0006 0005 Load distributor with 0100008000 0005 STD 24 0000 8003 Store distributor in location 0000, next instruction is in 8003 (the upper accumulator) Note: the moving of data or instructions from one drum location to another requires two instructions: LD, STD.
Now a two-instruction loop executes:
8003 STL 20 1999 0003 Store lower accumulator (that accumulator was reset to 0- by the RSU instruction above) The "1999" data address is decremented, below, on each iteration. This instruction was placed in the upper accumulator by the RSU instruction above. Note: this instruction, now in the upper accumulator, will be decremented and then executed again while still in the accumulator.
0003 AU 10 0001 8003 Decrement data address of the instruction in the accumulator by 1 (by adding 10000 to a negative number)
The STL's data address will, eventually, be decremented to 0003, and the AU ... instruction at 0003 will be overwritten with zeros. When that occurs (the STL's next instruction address remains 0003) execution continues as follows:
0003 NOOP 00 0000 0000 No-operation instruction, next instruction address is 0000 0000 HALT 01 0000 8000 Halt, next instruction address is the console (this Halt instruction was stored in 0000 by the STD instruction above)
The 650 instruction set is simple enough that small programs could be written in machine language and this was common for student exercises. [38] There was a single-instruction-per-card format that could be loaded directly into the machine and executed.
Machine language was awkward for large programs and, over time, a variety of programming languages and tools were written for the IBM 650. These included:
This is a reprint of IBM 650 Technical Newsletter No. 11, March 1956, form 31-6822. This reference manual contains the following report, noting that In its external characteristics, the interpretive system described in this report owes much to the IBM Speedcoding System for the 701.Wolontis, V.M. Complete Floating Decimal Interpretive System for the IBM 650 Magnetic Drum Calculator. Bell Laboratories, Inc, Murray Hill, New Jersey.
The Interpretive routine described here is a fixed decimal three address system that provides for mathematical, logical, and input-output operations. The logic for this system was obtained from the Complete Floating Decimal Interpretive System for the 650 that was developed by the Bell Laboratories, Murray Hill, New Jersey.
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