OR gate

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The OR gate is a digital logic gate that implements logical disjunction. The OR gate outputs "true" if any of its inputs are "true"; otherwise it outputs "false". The input and output states are normally represented by different voltage levels.

Contents

Description

OR gate truth table
InputOutput
ABA OR B
000
011
101
111

Any OR gate can be constructed with two or more inputs. It outputs a 1 if any of these inputs are 1, or outputs a 0 only if all inputs are 0. The inputs and outputs are binary digits ("bits") which have two possible logical states. In addition to 1 and 0, these states may be called true and false, high and low, active and inactive, or other such pairs of symbols.

Thus it performs a logical disjunction (∨) from mathematical logic. The gate can be represented with the plus sign (+) because it can be used for logical addition. [1] Equivalently, an OR gate finds the maximum between two binary digits, just as the AND gate finds the minimum. [2]

Together with the AND gate and the NOT gate, the OR gate is one of three basic logic gates from which any Boolean circuit may be constructed. All other logic gates may be made from these three gates; any function in binary mathematics may be implemented with them. [3]

It is sometimes called the inclusive OR gate to distinguish it from XOR, the exclusive OR gate. [4] The behavior of OR is the same as XOR except in the case of a 1 for both inputs. In situations where this never arises (for example, in a full-adder) the two types of gates are interchangeable. This substitution is convenient when a circuit is being implemented using simple integrated circuit chips which contain only one gate type per chip.

Symbols

There are two logic gate symbols currently representing the OR gate: the American (ANSI or 'military') symbol and the IEC ('European' or 'rectangular') symbol. The DIN symbol is deprecated. [5] [6]

The "≥1" on the IEC symbol indicates that the output is activated by at least one active input. [7]

OR ANSI Labelled.svg
MIL/ANSI Symbol
IEC OR.svg
IEC Symbol
OR DIN.svg
DIN Symbol

Hardware description and pinout

This schematic diagram shows the arrangement of four OR gates within a standard 4071 CMOS integrated circuit. CMOS 4071 diagram.svg
This schematic diagram shows the arrangement of four OR gates within a standard 4071 CMOS integrated circuit.

OR gates are basic logic gates, and are available in TTL and CMOS ICs logic families. The standard 4000 series CMOS IC is the 4071, which includes four independent two-input OR gates. The TTL device is the 7432. There are many offshoots of the original 7432 OR gate, all having the same pinout but different internal architecture, allowing them to operate in different voltage ranges and/or at higher speeds. In addition to the standard 2-input OR gate, 3- and 4-input OR gates are also available. In the CMOS series, these are:

Variations include:

Implementations

CMOS OR.svg
CMOS OR gate (NOT gate is visible on the right)
NMOS OR gate.png
NMOS OR gate
Transistor OR Gate.png
BJT OR gate
Diode OR Gate.svg
OR gate using diodes

Analytical representation

is the analytical representation of OR gate:

OR gates with many inputs

OR gates with multiple inputs are designated with the same symbol, with more lines leading in. [8] While direct implementations with more than three inputs are possible in logic families like CMOS, these are inefficient. More efficient implementations use a cascade of NOR and NAND gates, as shown in the picture below.

Alternatives

If no specific OR gates are available, one can be made from NAND or NOR gates in the configuration shown in the image below. Any logic gate can be made from a combination of NAND or NOR gates.

Desired gateNAND constructionNOR construction
OR ANSI Labelled.svg OR from NAND.svg OR from NOR.svg

Wired-OR

Wired OR gate using open-collector NOR gates Wired or.png
Wired OR gate using open-collector NOR gates

With active low open collector logic outputs, as used for control signals in many circuits, an OR function can be produced by wiring together several outputs. This arrangement is called a wired OR. This implementation of an OR function typically is also found in integrated circuits of N or P-type only transistor processes.

See also

Related Research Articles

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References

  1. "Logic OR Gate Tutorial". Electronics Tutorials.
  2. "OR Gate". Hyperphysics.phy-astr.gsu.edu. Retrieved 2012-09-24.
  3. Broesch, James D. (2012). Practical Programmable Circuits: A Guide to PLDs, State Machines, and Microcontrollers. Elsevier Science. p. 19. ISBN   978-0323139267.
  4. U.S. Department of Defense (February 26, 1962). Graphical Symbols for Logic Diagrams (Report). MIL-STD-806.
  5. Harris, David Harris, Sarah (2007). Digital design and computer architecture (1st ed.). San Francisco, Calif.: Morgan Kaufmann. p. 21. ISBN   9780123704979.{{cite book}}: CS1 maint: multiple names: authors list (link)
  6. Brumbach, Michael E. Industrial electricity (8th ed.). Clifton Park, N.Y.: Delmar. p. 546. ISBN   9781435483743.
  7. Semiconductor Group. Overview of IEEE Standard 91-1984: Explanation of Logic Symbols (PDF) (Report). Texas Instruments. p. 4. SDYZ001A.
  8. "Multiple-input Gates". All About Circuits. Retrieved 2024-02-04.