Company type | Private Subsidiary |
---|---|
Industry | HPC Interconnects |
Founded | 1996 |
Defunct | 2009 |
Headquarters | , |
Products | QsNet, RMS, 10GigE switches |
Services | Linux clustering |
Parent | Alenia, part of Finmeccanica |
Quadrics was a supercomputer company formed in 1996 as a joint venture between Alenia Spazio and the technical team from Meiko Scientific. They produced hardware and software for clustering commodity computer systems into massively parallel systems. Their highpoint was in June 2003 when six out of the ten fastest supercomputers in the world were based on Quadrics' interconnect. [1] They officially closed on June 29, 2009. [2]
The Quadrics name was first used in 1993 for a commercialized version of the APE100 SIMD parallel computer produced by Alenia Spazio and originally developed by INFN, the Italian National Institute of Nuclear Physics. In 1996, a new Alenia subsidiary, Quadrics Supercomputers World (QSW) was formed, based in Bristol, UK and Rome, Italy, inheriting the Quadrics SIMD product line and the Meiko CS-2 massively parallel supercomputer architecture. In 2002 the company name was shortened to be simply Quadrics.
Initially, the new company focussed on the development potential of the CS-2's processor interconnect technology. Their first design was the Elan2 network ASIC, intended for use with the UltraSPARC CPU, attached to it using the Ultra Port Architecture (UPA) system bus. Plans to introduce the Elan2 were later dropped, and a new Elan3 hosted on PCI introduced instead. By the time of its release Elan3 had been re-aimed at the Alpha/PCI market instead, after Quadrics had formed a relationship with Digital Equipment Corporation (DEC).
The combination of Quadrics and Alpha 21264 (EV6) microprocessors proved very successful, and Digital/Compaq rapidly became one of the world's largest suppliers of supercomputers. This culminated with the building the largest machine in the US, the 20 TFLOP ASCI Q, installed at Los Alamos National Laboratory during 2002 and 2003. The machine consisted of 2,048 AlphaServer SC nodes (which are based on AlphaServer ES45), each with four 1.25 GHz Alpha 21264A (EV67) microprocessors and two rails of the Quadrics QsNet network. Unfortunately this system failed in reliability and was never put into production use.
Quadrics also had success in selling Linux based systems. Quadrics' first Linux based system was installed in June/July 2001 at SHARCNET. It was the fastest civilian system in Canada at the time of installation. Another high-profile Quadrics system was the fastest [3] Linux cluster in the world called Thunder [4] installed at Lawrence Livermore National Laboratory in 2003/2004. Thunder consisted of 1024 Intel Tiger Quad Itanium II Processor servers to deliver 19.94 teraflops on parallel Linpack. Peak performance of the system was 22.9 teraflops, at a level of efficiency of 87%.
In 2004, Quadrics was selected by Bull for what was the fastest [5] supercomputer in Europe: TERA-10 at the French CEA: 544 Bull NovaScale 6160 computing nodes, each including eight Itanium 2 processors. The global configuration will feature 8,704 processors with 27 terabytes of core memory. Each of these computing nodes will contain multiple Quadrics QsNetII (Elan4) network adapters to deliver over 60 teraflops (sixty thousands billions of operations per second).
Quadrics was selected by HP for the upgrade of SHARCNET, the Canadian Cluster of Clusters, with four new high-performance computing clusters that would increase the network's capacity from 1,000 to 6,000 processors. QsNetII was used for one capacity and one capability cluster.
In August 2005 Quadrics and STMicroelectronics signed a development agreement. The cooperation was to cover the design of a future generations of Quadrics high speed multi gigabit interconnect, and the exploitation of the products in a range of high volume applications. This co-operation never bore fruit despite the secondment of STMicroelectronics Bristol based staff to Quadrics.
The decision to close the company was made in April 2009, despite the next-generation QsNetIII product being very close to completion. Support for older products and the IP rights were transferred to Vega UK Ltd (now Telespazio VEGA ), and the Quadrics offices were closed on June 29, 2009. Many of Quadrics' technical staff have since found similar employment in developing HPC networking products with Gnodal, one of the many fabless semiconductor companies based in Bristol in the UK.
QsNet was a high speed interconnect designed by Quadrics used in high-performance computing computer clusters, particularly Linux Beowulf clusters. Although it can be used with TCP/IP; like SCI, Myrinet and InfiniBand it is usually used with a communication API such as Message Passing Interface (MPI) or SHMEM called from a parallel program.
The interconnect consists of a PCI card in each compute node and one or more dedicated switch chassis. These are connected with a copper cables. Within the switch chassis are a number of line cards that carry Elite switch ASICs. These are internally linked to form a fat tree topology. Like other interconnects such as Myrinet very large systems can be built by using multiple switch chassis arranged as spine (top-level) and leaf (node-level) switches. Such systems were called "federated networks".
It was announced in 1998 and used PCI 66-64 cards that had 'elan3' Custom ASIC on them. These gave an MPI bandwidth of around 350 MB/s unidirectional with 5 us latency.
QsNet II was the fourth and penultimate generation of Quadrics interconnect family products, and was launched in 2003. QsNetII interfaced to the host computer through the standard IO PCI-X bus. Later versions of the card had PCIe physical interfaces although this was bridged on the card to PCI-X with a performance penalty. A native PCIe version was never developed. Instead resource was focused on QsNetII's successor QsNetIII which although completed was never released commercially.
The architecture of the network interface has been developed to offload the entire task of interprocessor communication from the main processor, and to avoid the overhead of system calls for user process to user process messaging. QsNetII is designed for use within SMP systems — multiple, concurrent processes can utilise the network interface without any task switching overhead. A I/O processor offloads protocol handling from the main CPU. Local memory on the PCI card provides storage for buffers, translation tables and I/O adapter code. All the PCI bandwidth is available to data communication.
QsNetII's core design is based on two ASICs: Elan4 and Elite4. Elan4 is a communication processor that forms the interface between a high-performance multistage network and a processing node with one or more CPUs. Elite4 is a switching component that can switch eight bidirectional communications links, each of which carrying data in both directions simultaneously at 1.3 GB/s.
Quadrics QsNetII interconnect like its predecessor QsNet uses a 'fat tree' topology, QsNetII scales up to 4096 nodes, each node might have multiple CPUs so that systems of >10,000 CPUs can be constructed. Multiple, parallel QsNet networks can be employed in a system to maintain the compute to communications ratio where high CPU count SMP nodes are employed. The fat tree topology is resilient with large amounts of redundancy in the higher levels of the switch.
Performance depends on platform used and configuration of the system, QsNetII MPI latency on standard AMD Opteron starts at 1.22 μs; Bandwidth on Intel Xeon Intel 64 is 912 MB/s.
In 2004, Quadrics started releasing small to medium switch stand-alone switch configurations called QsNetII E-Series, these configurations range from the 8 to the 128-way systems.
In November 2005, Quadrics announced a new product based on 10 Gigabit Ethernet (10 GigE), called QsTenG. The first QsTenG switch was an 8U chassis with 12 slots for 10 GigE line cards, making 96 ports in total. Each line card had eight 10 GigE ports that connect using 10GBASE-CX4 connectors. Each line card also had four internal ports that connected the line cards together into a fat tree configuration. Since then, Quadrics brought out a second generation of 10 GigE switches, starting with a compact 1U switch with 24 ports, which comes in two variants, TG201-CA, 24 ports CX4, and TG201-XA, 24 ports in total, 12 XSP and 12 CX4. They were expected to bring out a range of larger switches in 2009, the chassis was planned to be the same as the QsNetIII, the switch to have been called TG215.
Late in 2007, the Quadrics management decided to cancel the QsTenG Ethernet developments and concentrate efforts on the QsNet product line. This caused a group employees to leave and help found Gnodal, to develop large scalable Ethernet systems.
Software included a cluster resource manager software package called QuadricsRms, and Quadrics Linux Software, core components of the QsNet software release for Linux under the GNU LGPL License
Myrinet, ANSI/VITA 26-1998, is a high-speed local area networking system designed by the company Myricom to be used as an interconnect between multiple machines to form computer clusters.
A supercomputer is a type of computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second (FLOPS) instead of million instructions per second (MIPS). Since 2022, supercomputers have existed which can perform over 1018 FLOPS, so called exascale supercomputers. For comparison, a desktop computer has performance in the range of hundreds of gigaFLOPS (1011) to tens of teraFLOPS (1013). Since November 2017, all of the world's fastest 500 supercomputers run on Linux-based operating systems. Additional research is being conducted in the United States, the European Union, Taiwan, Japan, and China to build faster, more powerful and technologically superior exascale supercomputers.
A Beowulf cluster is a computer cluster of what are normally identical, commodity-grade computers networked into a small local area network with libraries and programs installed which allow processing to be shared among them. The result is a high-performance parallel computing cluster from inexpensive personal computer hardware.
Meiko Scientific Ltd. was a British supercomputer company based in Bristol, founded by members of the design team working on the Inmos transputer microprocessor.
InfiniBand (IB) is a computer networking communications standard used in high-performance computing that features very high throughput and very low latency. It is used for data interconnect both among and within computers. InfiniBand is also used as either a direct or switched interconnect between servers and storage systems, as well as an interconnect between storage systems. It is designed to be scalable and uses a switched fabric network topology. Between 2014 and June 2016, it was the most commonly used interconnect in the TOP500 list of supercomputers.
TCP offload engine (TOE) is a technology used in some network interface cards (NIC) to offload processing of the entire TCP/IP stack to the network controller. It is primarily used with high-speed network interfaces, such as gigabit Ethernet and 10 Gigabit Ethernet, where processing overhead of the network stack becomes significant. TOEs are often used as a way to reduce the overhead associated with Internet Protocol (IP) storage protocols such as iSCSI and Network File System (NFS).
The Cray XD1 was an entry-level supercomputer range, made by Cray Inc.
Altix is a line of server computers and supercomputers produced by Silicon Graphics, based on Intel processors. It succeeded the MIPS/IRIX-based Origin 3000 servers.
The IBM BladeCenter was IBM's blade server architecture, until it was replaced by Flex System in 2012. The x86 division was later sold to Lenovo in 2014.
Roadrunner was a supercomputer built by IBM for the Los Alamos National Laboratory in New Mexico, USA. The US$100-million Roadrunner was designed for a peak performance of 1.7 petaflops. It achieved 1.026 petaflops on May 25, 2008, to become the world's first TOP500 LINPACK sustained 1.0 petaflops system.
Microsoft Message Passing Interface is an implementation of the MPI-2 specification by Microsoft for use in Windows HPC Server 2008 to interconnect and communicate between High performance computing nodes. It is mostly compatible with the MPICH2 reference implementation, with some exceptions for job launch and management. MS MPI includes bindings for C and FORTRAN languages. It supports using the Microsoft Visual Studio for debugging purposes.
Magerit is one of the most powerful supercomputers in Spain. It also reached the second best Spanish position in the TOP500 list of supercomputers. It is installed in CeSViMa, a research center of the Technical University of Madrid.
The SGI Origin 2000 is a family of mid-range and high-end server computers developed and manufactured by Silicon Graphics (SGI). They were introduced in 1996 to succeed the SGI Challenge and POWER Challenge. At the time of introduction, these ran the IRIX operating system, originally version 6.4 and later, 6.5. A variant of the Origin 2000 with graphics capability is known as the Onyx2. An entry-level variant based on the same architecture but with a different hardware implementation is known as the Origin 200. The Origin 2000 was succeeded by the Origin 3000 in July 2000, and was discontinued on June 30, 2002.
The Origin 3000 and the Onyx 3000 is a family of mid-range and high-end computers developed and manufactured by SGI. The Origin 3000 is a server, and the Onyx 3000 is a visualization system. Both systems were introduced in July 2000 to succeed the Origin 2000 and the Onyx2 respectively. These systems ran the IRIX 6.5 Advanced Server Environment operating system. Entry-level variants of these systems based on the same architecture but with a different hardware implementation are known as the Origin 300 and Onyx 300. The Origin 3000 was succeeded by the Altix 3000 in 2004 and the last model was discontinued on 29 December 2006, while the Onyx 3000 was succeeded by the Onyx4 and the Itanium-based Prism in 2004 and the last model was discontinued on 25 March 2005.
The Cray CX1 is a deskside workstation designed by Cray Inc., based on the x86-64 processor architecture. It was launched on September 16, 2008, and was discontinued in early 2012. It comprises a single chassis blade server design that supports a maximum of eight modular single-width blades, giving up to 96 processor cores. Computational load can be run independently on each blade and/or combined using clustering techniques.
Windows HPC Server 2008, released by Microsoft on 22 September 2008, is the successor product to Windows Compute Cluster Server 2003. Like WCCS, Windows HPC Server 2008 is designed for high-end applications that require high performance computing clusters. This version of the server software is claimed to efficiently scale to thousands of cores. It includes features unique to HPC workloads: a new high-speed NetworkDirect RDMA, highly efficient and scalable cluster management tools, a service-oriented architecture (SOA) job scheduler, an MPI library based on open-source MPICH2, and cluster interoperability through standards such as the High Performance Computing Basic Profile (HPCBP) specification produced by the Open Grid Forum (OGF).
QPACE is a massively parallel and scalable supercomputer designed for applications in lattice quantum chromodynamics.
The Slurm Workload Manager, formerly known as Simple Linux Utility for Resource Management (SLURM), or simply Slurm, is a free and open-source job scheduler for Linux and Unix-like kernels, used by many of the world's supercomputers and computer clusters.
SHMEM is a family of parallel programming libraries, providing one-sided, RDMA, parallel-processing interfaces for low-latency distributed-memory supercomputers. The SHMEM acronym was subsequently reverse engineered to mean "Symmetric Hierarchical MEMory”. Later it was expanded to distributed memory parallel computer clusters, and is used as parallel programming interface or as low-level interface to build partitioned global address space (PGAS) systems and languages. “Libsma”, the first SHMEM library, was created by Richard Smith at Cray Research in 1993 as a set of thin interfaces to access the CRAY T3D's inter-processor-communication hardware. SHMEM has been implemented by Cray Research, SGI, Cray Inc., Quadrics, HP, GSHMEM, IBM, QLogic, Mellanox, Universities of Houston and Florida; there is also open-source OpenSHMEM.
QPACE 2 is a massively parallel and scalable supercomputer. It was designed for applications in lattice quantum chromodynamics but is also suitable for a wider range of applications..