The International Technology Roadmap for Semiconductors (ITRS) is a set of documents produced by a group of semiconductor industry experts. These experts are representative of the sponsoring organisations which include the Semiconductor Industry Associations of the United States, Europe, Japan, South Korea and Taiwan.
The semiconductor industry is the aggregate collection of companies engaged in the design and fabrication of semiconductor devices. It formed around 1960, once the fabrication of semiconductors became a viable business. It has since grown to be a $412.2 billion industry in 2017.
The Semiconductor Industry Association (SIA) is a trade association and lobbying group founded in 1977 that represents the United States semiconductor industry. It is located in Washington, D.C.
Japan is an island country in East Asia. Located in the Pacific Ocean, it lies off the eastern coast of the Asian continent and stretches from the Sea of Okhotsk in the north to the East China Sea and the Philippine Sea in the south.
The documents produced carry this disclaimer: "The ITRS is devised and intended for technology assessment only and is without regard to any commercial considerations pertaining to individual products or equipment".
The documents represent best opinion on the directions of research and time-lines up to about 15 years into the future for the following areas of technology:
Microelectromechanical systems is the technology of microscopic devices, particularly those with moving parts. It merges at the nano-scale into nanoelectromechanical systems (NEMS) and nanotechnology. MEMS are also referred to as micromachines in Japan, or micro systems technology (MST) in Europe.
Photolithography, also termed optical lithography or UV lithography, is a process used in microfabrication to pattern parts of a thin film or the bulk of a substrate. It uses light to transfer a geometric pattern from a photomask to a light-sensitive chemical "photoresist", or simply "resist," on the substrate. A series of chemical treatments then either engraves the exposure pattern into the material or enables deposition of a new material in the desired pattern upon the material underneath the photo resist. For example, in complex integrated circuits, a modern CMOS wafer will go through the photolithographic cycle up to 50 times.
Metrology is the science of measurement. It establishes a common understanding of units, crucial in linking human activities. Modern metrology has its roots in the French Revolution's political motivation to standardise units in France, when a length standard taken from a natural source was proposed. This led to the creation of the decimal-based metric system in 1795, establishing a set of standards for other types of measurements. Several other countries adopted the metric system between 1795 and 1875; to ensure conformity between the countries, the Bureau International des Poids et Mesures (BIPM) was established by the Metre Convention. This has evolved into the International System of Units (SI) as a result of a resolution at the 11th Conference Generale des Poids et Mesures (CGPM) in 1960.
As of 2017, ITRS is no longer being updated. Its successor is the International Roadmap for Devices and Systems.
The International Roadmap for Devices and Systems, or IRDS, is a set of predictions about likely developments in electronic devices and systems. The IRDS was established in 2016 and is the successor to the International Technology Roadmap for Semiconductors. These predictions are intended to allow coordination of efforts across academia, manufacturers, equipment suppliers, and national research laboratories. The IEEE specifies the goals of the roadmap as:
Constructing an integrated circuit, or any semiconductor device, requires a series of operations—photolithography, etching, metal deposition, and so on. As the industry evolved, each of these operations were typically performed by specialized machines built by a variety of commercial companies. This specialization may potentially make it difficult for the industry to advance, since in many cases it does no good for one company to introduce a new product if the other needed steps are not available around the same time. A technology roadmap can help this by giving an idea when a certain capability will be needed. Then each supplier can target this date for their piece of the puzzle.
An integrated circuit or monolithic integrated circuit is a set of electronic circuits on one small flat piece of semiconductor material that is normally silicon. The integration of large numbers of tiny transistors into a small chip results in circuits that are orders of magnitude smaller, cheaper, and faster than those constructed of discrete electronic components. The IC's mass production capability, reliability and building-block approach to circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other digital home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.
With the progressive externalization of production tools to the suppliers of specialized equipment, the need arose for a clear roadmap to anticipate the evolution of the market and to plan and control the technological needs of IC production. For several years, the Semiconductor Industry Association (SIA) gave this responsibility of coordination to the United States, which led to the creation of an American style roadmap, the National Technology Roadmap for Semiconductors (NTRS).
In 1998, the SIA became closer to its European, Japanese, Korean, and Taiwanese counterparts by creating the first global roadmap: The International Technology Roadmap for Semiconductors (ITRS). This international group has (as of the 2003 edition) 936 companies which were affiliated with working groups within the ITRS.The organization was divided into Technical Working Groups (TWGs) which eventually grew in number to 17, each focusing on a key element of the technology and associated supply chain. Traditionally, the ITRS roadmap was updated in even years, and completely revised in odd years.
The last revision of the ITRS Roadmap was published in 2013. The methodology and the physics behind the scaling results for 2013 tables is described in transistor roadmap projection using predictive full-band atomistic modeling which covers double gate MOSFETs over the 15 years to 2028.
With the generally acknowledged sunsetting of Moore's law and, ITRS issuing in 2016 its final roadmap, a new initiative for a more generalized roadmapping was started through the IEEE's Rebooting Computing initiative, named the International Roadmap for Devices and Systems (IRDS).
In April 2014, the ITRS committee announced it would be reorganizing the ITRS roadmap to better suit the needs of the industry. The plan was to take all the elements included in the 17 technical working groups and map them into seven focus topics:
Chapters on each topic were published in 2015.
A bandgap voltage reference is a temperature independent voltage reference circuit widely used in integrated circuits. It produces a fixed (constant) voltage regardless of power supply variations, temperature changes and circuit loading from a device. It commonly has an output voltage around 1.25 V. This circuit concept was first published by David Hilbiber in 1964. Bob Widlar, Paul Brokaw and others followed up with other commercially successful versions.
Technology computer-aided design is a branch of electronic design automation that models semiconductor fabrication and semiconductor device operation. The modeling of the fabrication is termed Process TCAD, while the modeling of the device operation is termed Device TCAD. Included are the modelling of process steps, and modelling of the behavior of the electrical devices based on fundamental physics, such as the doping profiles of the devices. TCAD may also include the creation of compact models, which try to capture the electrical behavior of such devices but do not generally derive them from the underlying physics.
The term die shrink refers to a simple semiconductor scaling of semiconductor devices, mainly transistors. The act of shrinking a die is to create a somewhat identical circuit using a more advanced fabrication process, usually involving an advance of lithographic node. This reduces overall costs for a chip company, as the absence of major architectural changes to the processor lowers research and development costs, while at the same time allowing more processor dies to be manufactured on the same piece of silicon wafer, resulting in less cost per product sold.
In electronic engineering, a through-silicon via (TSV) or through-chip via is a vertical electrical connection (via) that passes completely through a silicon wafer or die. TSVs are high performance interconnect techniques used as an alternative to wire-bond and flip chips to create 3D packages and 3D integrated circuits. Compared to alternatives such as package-on-package, the interconnect and device density is substantially higher, and the length of the connections becomes shorter.
In microelectronics, a three-dimensional integrated circuit is an integrated circuit manufactured by stacking silicon wafers or dies and interconnecting them vertically using, for instance, through-silicon vias (TSVs) or Cu-Cu connections, so that they behave as a single device to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes. 3D IC is just one of a host of 3D integration schemes that exploit the z-direction to achieve electrical performance benefits.
The MASTAR is an analytical model of Metal-Oxide Semiconductor Field-Effect Transistors, developed using the voltage-doping transformation (VDT) technique. MASTAR offers good accuracy and continuity in current and its derivatives in all operation regimes of the MOSFET devices. The model has been successfully used in CAD/EDA simulation tools.
The nanomorphic cell is a conception of an atomic-level, integrated, self-sustaining microsystem with five main functions: internal energy supply, sensing, actuation, computation and communication. Atomic level integration provides the ultimate functionality per unit volume for microsystems. The nanomorphic cell abstraction allows one to analyze the fundamental limits of attainable performance for nanoscale systems in much the same way that the Turing Machine and the Carnot Engine support such limit studies for information processing and heat engines respectively.
In integrated circuits, optical interconnects refers to any system of transmitting signals from one part of an integrated circuit to another using light. Optical interconnects have been the topic of study due to the high latency and power consumption incurred by conventional metal interconnects in transmitting electrical signals over long distances, such as in interconnects classed as global interconnects. The International Technology Roadmap for Semiconductors (ITRS) has highlighted interconnect scaling as a problem for the semiconductor industry.
Adrian (Mihai) Ionescu is a full Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL).
He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France, LPCS-ENSERG, Grenoble, France and Stanford University, USA, in 1998 and 1999. He was a visiting professor with Tokyo Institute of Technology in 2012 and 2016.
The Symposia on VLSI Technology and Circuits are two closely connected international conferences on semiconductor technology and circuits, thereby offering an opportunity to interact and synergize on topics of joint interest, spanning the range from process technology to systems-on-chip. The Symposia take place once a year around the middle of June at locations alternating between Kyoto, Japan and Honolulu, USA. They bring together managers, engineers, and scientists from industry and academia around the world to discuss challenges in manufacturing and design of Very-large-scale integration (VLSI) circuits. The Symposium on VLSI Technology started in 1981 while the Symposium on VLSI Circuits was established in 1987. Beside regular presentations of technical papers, the Symposia comprise short courses, panel sessions, and invited talks conducted by experts in the field from both Industry and Academia.
Ian A. Young is an Intel manager. He was a manager of the design for an oscillator used in Intel microprocessors which led to the scaling of the clock rates from 30 MHz to 3 GHz, ushering in the GHz computing era.
The IEEE International Electron Devices Meeting (IEDM) is an annual micro- and nanoelectronics conference held each December that serves as a forum for reporting technological breakthroughs in the areas of semiconductor and related device technologies, design, manufacturing, physics, modeling and circuit-device interaction.
A nanoelectromechanical (NEM) relay is an electrically actuatedswitch that is built on the nanometer scale using semiconductor fabrication techniques. They are designed to operate in replacement, or in conjunction, with traditional semiconductor logic. While the mechanical nature of NEM relays makes them switch much slower than solid-state relays, they have many advantageous properties, such as zero current leakage and low power consumption, which make them potentially useful in next generation computing.
Beyond CMOS refers to the possible future digital logic technologies beyond the CMOS scaling limits which limits device density and speeds due to heating effects.
IEEE Rebooting Computing is a global initiative launched by IEEE that proposes to rethink the concept of computing through a holistic look at all aspects of computing, from the device itself to the user interface. As part of its work, IEEE Rebooting Computing provides access to various resources like conferences and educational events, feature and scholarly articles, reports, and videos.
Bijan Davari is an IBM Fellow and Vice President at IBM Thomas J Watson Research Center, Yorktown Hts, NY. His pioneering work in miniaturization of semiconductor devices changed the world of computing. His research led to the first generation of voltage-scaled deep-submicron CMOS with sufficient performance to totally replace bipolar technology in IBM mainframes and enable new high-performance UNIX servers. He is credited with leading IBM into the use of copper and silicon on insulator before its rivals. He is a member of the U.S. National Academy of Engineers and is known for his seminal contributions to the field of CMOS technology. He is an IEEE Fellow, recipient of the J J Ebers Award in 2005 and IEEE Andrew S. Grove Award in 2010. At the present time, he leads the Next Generation Systems Area of research.