ARM Cortex-A76

Last updated
ARM Cortex-A76
General information
Launched2018 [1]
Designed by ARM Holdings
Performance
Max. CPU clock rate to 3.0 GHz in phones and 3.3 GHz in tablets/laptops 
FSB speeds100  to 104 
Address width40-bit
Cache
L1 cache 128 KiB (64 KiB I-cache with parity, 64 KiB D-cache) per core
L2 cache128–512 KiB per core
L3 cache512 KiB–4 MiB(optional)
Architecture and classification
Microarchitecture ARM Cortex-A76
Instruction set ARMv8-A: A64, A32, and T32 (at the EL0 only)
Extensions
Physical specifications
Cores
  • 1–4 per cluster
Co-processor ARM Cortex-A55 (optional)
Products, models, variants
Product code name(s)
  • Enyo
Variant(s)
History
Predecessor(s) ARM Cortex-A75
ARM Cortex-A73
ARM Cortex-A72
Successor(s) ARM Cortex-A77

The ARM Cortex-A76 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings' Austin design centre. ARM states a 25% and 35% increase in integer and floating point performance, respectively, over a Cortex-A75 of the previous generation. [2]

Contents

Design

The Cortex-A76 serves as the successor of the ARM Cortex-A73 and ARM Cortex-A75, though based on a clean sheet design.

The Cortex-A76 frontend is a 4-wide decode out-of-order superscalar design. It can fetch 4 instructions per cycle. And[ clarification needed ] rename and dispatch 4 Mops, and 8 μops per cycle. The out-of-order window size is 128 entries. The backend is 8 execution ports[ clarification needed ] with a pipeline depth of 13 stages and the execution latencies of 11 stages. [2] [3]

The core supports unprivileged 32-bit applications, but privileged applications must utilize the 64-bit ARMv8-A ISA. [4] It also supports Load acquire (LDAPR) instructions (ARMv8.3-A), Dot Product instructions (ARMv8.4-A), PSTATE Speculative Store Bypass Safe (SSBS) bit and the speculation barriers (CSDB, SSBB, PSSBB) instructions (ARMv8.5-A). [5]

Memory bandwidth increased 90% relative to the A75. [6] [7] According to ARM, the A76 is expected to offer twice the performance of an A73 and is targeted beyond mobile workloads. The performance is targeted at "laptop class", including Windows 10 devices, [8] competitive with Intel's Kaby Lake. [9]

The Cortex-A76 support ARM's DynamIQ technology, expected to be used as high-performance cores when used in combination with Cortex-A55 power-efficient cores. [2]

Licensing

The Cortex-A76 is available as a SIP core to licensees, and its design makes it suitable for integration with other SIP cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC).

Usage

The Cortex-A76 was first used in the HiSilicon Kirin 980. [10]

ARM has also collaborated with Qualcomm for a semi-custom version of the Cortex-A76, used within their high-end Kryo 495 (Snapdragon 8cx)/Kryo 485 (Snapdragon 855 and 855 Plus), and also in their mid-range Kryo 460 (Snapdragon 675) and Kryo 470 (Snapdragon 730) CPUs. One of the modifications Qualcomm made was increasing reorder buffer to increase the out-of-order window size. [11]

It is also used in the Exynos 990 and Exynos Auto V9, [12] the MediaTek Helio G90/G90T/G95 and Dimensity 800 and Dimensity 820, and the HiSilicon Kirin 985 5G and Kirin 990 4G/990 5G/990E 5G. [13] [14] [15]

The Cortex-A76 can be found in Snapdragon 855 as Big-core.

The Cortex-A76 is used as Big-core in Intel Agilex D-series SoC FPGA devices. [16]

In 2020 Cortex-A76 was used in Rockchip RK3588 and RK3588s.

In September 2023, the Raspberry Pi 5 was introduced with a Broadcom BCM2712 quad-core Arm Cortex-A76 processor with a clock speed of 2.4 GHz. [17]

See also

Related Research Articles

<span class="mw-page-title-main">Exynos</span> Family of ARM based system-on-a-chip models

Exynos, formerly Hummingbird (Korean: 엑시노스), is a series of ARM-based system-on-chips developed by Samsung Electronics' System LSI division and manufactured by Samsung Foundry. It is a continuation of Samsung's earlier S3C, S5L and S5P line of SoCs.

The ARM Cortex-A is a group of 32-bit and 64-bit RISC ARM processor cores licensed by Arm Holdings. The cores are intended for application use. The group consists of 32-bit only cores: ARM Cortex-A5, ARM Cortex-A7, ARM Cortex-A8, ARM Cortex-A9, ARM Cortex-A12, ARM Cortex-A15, ARM Cortex-A17 MPCore, and ARM Cortex-A32, 32/64-bit mixed operation cores: ARM Cortex-A35, ARM Cortex-A53, ARM Cortex-A55, ARM Cortex-A57, ARM Cortex-A72, ARM Cortex-A73, ARM Cortex-A75, ARM Cortex-A76, ARM Cortex-A77, ARM Cortex-A78, ARM Cortex-A710, and ARM Cortex-A510 Refresh, and 64-bit only cores: ARM Cortex-A34, ARM Cortex-A65, ARM Cortex-A510 (2021), ARM Cortex-A715, ARM Cortex-A520, and ARM Cortex-A720.

<span class="mw-page-title-main">ARM Cortex-A53</span> Microarchitecture implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings

The ARM Cortex-A53 is one of the first two central processing units implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Cambridge design centre, along with the Cortex-A57. The Cortex-A53 is a 2-wide decode superscalar processor, capable of dual-issuing some instructions. It was announced October 30, 2012 and is marketed by ARM as either a stand-alone, more energy-efficient alternative to the more powerful Cortex-A57 microarchitecture, or to be used alongside a more powerful microarchitecture in a big.LITTLE configuration. It is available as an IP core to licensees, like other ARM intellectual property and processor designs.

This is a comparison of ARM instruction set architecture application processor cores designed by ARM Holdings and 3rd parties. It does not include ARM Cortex-R, ARM Cortex-M, or legacy ARM cores.

Qualcomm Kryo is a series of custom or semi-custom ARM-based CPUs included in the Snapdragon line of SoCs.

The ARM Cortex-A73 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Sophia design centre. The Cortex-A73 is a 2-wide decode out-of-order superscalar pipeline. The Cortex-A73 serves as the successor of the Cortex-A72, designed to offer 30% greater performance or 30% increased power efficiency.

The ARM Cortex-A55 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings' Cambridge design centre. The Cortex-A55 is a 2-wide decode in-order superscalar pipeline.

The ARM Cortex-A75 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings's Sophia design centre. The Cortex-A75 is a 3-wide decode out-of-order superscalar pipeline. The Cortex-A75 serves as the successor of the Cortex-A73, designed to improve performance by 20% over the A73 in mobile applications while maintaining the same efficiency.

The ARM Cortex-A77 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings' Austin design centre. ARM announced an increase of 23% and 35% in integer and floating point performance, respectively. Memory bandwidth increased 15% relative to the A76.

The ARM Cortex-A78 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Ltd.'s Austin centre.

The ARM Cortex-X1 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings' Austin design centre as part of ARM's Cortex-X Custom (CXC) program.

The ARM Cortex-A710 is the successor to the ARM Cortex-A78, being the First-Generation Armv9 “big” Cortex CPU. It is the companion to the ARM Cortex-A510 "LITTLE" efficiency core. It was designed by ARM Ltd.'s Austin centre. It is the fourth and last iteration of Arm’s Austin core family. It forms part of Arm's Total Compute Solutions 2021 (TCS21) along with Arm's Cortex-X2, Cortex-A510, Mali-G710 and CoreLink CI-700/NI-700.

The ARM Cortex-A510 is the successor to the ARM Cortex-A55 and the first ARMv9 high efficiency "LITTLE" CPU. It is the companion to the ARM Cortex-A710 "big" core. It is a clean-sheet 64-bit CPU designed by ARM Holdings' Cambridge design team.

The ARM Cortex-X2 is a central processing unit implementing the ARMv9-A 64-bit instruction set designed by ARM Holdings' Austin design centre as part of ARM's Cortex-X Custom (CXC) program. It forms part of Arm's Total Compute Solutions 2021 (TCS21) along with Arm's Cortex-A710, Cortex-A510, Mali-G710 and CoreLink CI-700/NI-700.

The ARM Neoverse is a group of 64-bit ARM processor cores licensed by Arm Holdings. The cores are intended for datacenter, edge computing, and high-performance computing use. The group consists of ARM Neoverse V-Series, ARM Neoverse N-Series, and ARM Neoverse E-Series.

The ARM Cortex-A715 is the second generation ARMv9 "big" Cortex CPU. Compared to its predecessor the Cortex-A710 the Cortex-A715 CPU is noted for having a 20% increase in power efficiency, and 5% improvement in performance. The Cortex-A715 shows comparable performance to the previous generation Cortex-X1 CPU. This generation of chips starting with the A715 drops native 32-bit support which is noted as a possible problem in 32-bit workloads. It forms part of Arm's Total Compute Solutions 2022 (TCS22) along with Arm's Cortex-X3, Cortex-A510, Arm Immortalis-G715 and CoreLink CI-700/NI-700.

The ARM Cortex-X3 is the third generation X-series high-performance CPU core from Arm. It forms part of Arm's Total Compute Solutions 2022 (TCS22) along with Arm's Cortex-A715, Cortex-A510, Immortalis-G715 and CoreLink CI-700/NI-700.

The ARM Cortex-X4 is a CPU core model from Arm unveiled in TCS23, it serves as the successor of The ARM Cortex-X3, X-series CPU cores generally focus on high performance, the CPU core can be paired with other cores in its family like ARM Cortex-A720 or/and ARM Cortex-A520 in a CPU cluster.

References

  1. ↑ Shrout, Ryan; Moorhead, Patrick (31 May 2018). "Ep 23 - 5/31/18 - The Future of Arm with Nandan Nayampally". The Tech Analysts Podcast. Retrieved 1 June 2018.
  2. 1 2 3 Frumusanu, Andrei (31 May 2018). "Arm Cortex-A76 CPU Unveiled". Anandtech. Retrieved 1 June 2018.
  3. ↑ "Arm Unveils Cortex-A77, Emphasizes Single-Thread Performance". WikiChip Fuse. 2019-05-26. Retrieved 2020-06-18.
  4. ↑ Williams, Chris (31 May 2018). "Arm emits Cortex-A76 – its first 64-bit-only CPU core (in kernel mode)". The Register. Retrieved 1 June 2018.
  5. ↑ "ARM documentation set for Cortex-A76". infocenter.arm.com. Retrieved 2019-06-15.
  6. ↑ Armasu, Lucian (31 May 2018). "Arm's Cortex-A76 Could Be The First True Challenger To x86 Chips On Laptops". Tom's Hardware. Retrieved 1 June 2018.
  7. ↑ Triggs, Robert (31 May 2018). "Arm Cortex-A76 CPU deep dive". Android Authority. Retrieved 1 June 2018.
  8. ↑ Hruska, Joel (31 May 2018). "ARM's New Cortex-A76 SoC Targets Windows Laptop Market". Extreme Tech. Retrieved 1 June 2018.
  9. ↑ Bright, Peter (1 June 2018). "ARM promises laptop-level performance in 2019". Ars Technica. Retrieved 1 June 2018.
  10. ↑ Frumusanu, Andrei. "HiSilicon Announces The Kirin 980: First A76, G76 on 7nm". www.anandtech.com. Retrieved 2020-11-13.
  11. ↑ Frumusanu, Andrei. "Arm's New Cortex-A77 CPU Micro-architecture: Evolving Performance". www.anandtech.com. Retrieved 2019-06-16.
  12. ↑ "Exynos 990 Mobile Processor: Specs, Features | Samsung Exynos". Samsung Semiconductor. Retrieved 2020-06-18.
  13. ↑ MediaTek (2020-06-18). "MediaTek Helio G90 Series". MediaTek. Retrieved 2020-06-18.
  14. ↑ MediaTek (2020-06-18). "MediaTek Dimensity 800". MediaTek. Retrieved 2020-06-18.
  15. ↑ MediaTek (2020-06-18). "MediaTek Dimensity 820". MediaTek. Retrieved 2020-06-18.
  16. ↑ Mark van der Zalm. "Intel Agilex D-Series FPGA White Paper". Intel. Retrieved 2022-10-20.
  17. ↑ Eben Upton. "Introducing: Raspberry Pi 5!". Raspberry Pi. Retrieved 2023-10-21.
This page is based on this Wikipedia article
Text is available under the CC BY-SA 4.0 license; additional terms may apply.
Images, videos and audio are available under their respective licenses.