The Tegra APX 2500 was announced on February 12, 2008. The Tegra 6xx product line was revealed on June 2, 2008,[1] and the APX 2600 was announced in February 2009. The APX chips were designed for smartphones, while the Tegra 600 and 650 chips were intended for smartbooks and mobile Internet devices (MID).[2]
The first product to use the Tegra was Microsoft's Zune HD media player in September 2009, followed by the Samsung M1.[3] Microsoft's Kin was the first cellular phone to use the Tegra;[4] however, the phone did not have an app store, so the Tegra's power did not provide much advantage. In September 2008, Nvidia and Opera Software announced that they would produce a version of the Opera 9.5 browser optimized for the Tegra on Windows Mobile and Windows CE.[5][6] At Mobile World Congress 2009, Nvidia introduced its port of Google's Android to the Tegra.
On January 7, 2010, Nvidia officially announced and demonstrated its next generation Tegra system-on-a-chip, the Nvidia Tegra 250, at Consumer Electronics Show 2010.[7] Nvidia primarily supports Android on Tegra 2, but booting other ARM-supporting operating systems is possible on devices where the bootloader is accessible. Tegra 2 support for the Ubuntu Linux distribution was also announced on the Nvidia developer forum.[8]
Nvidia announced the first quad-core SoC at the February 2011 Mobile World Congress event in Barcelona. Though the chip was codenamed Kal-El, it is now branded as Tegra 3. Early benchmark results show impressive gains over Tegra 2,[9][10] and the chip was used in many of the tablets released in the second half of 2011.
In January 2012, Nvidia announced that Audi had selected the Tegra 3 processor for its In-Vehicle Infotainment systems and digital instruments display.[11] The processor will be integrated into Audi's entire line of vehicles worldwide, beginning in 2013. The process is ISO 26262-certified.[12]
In summer of 2012 Tesla Motors began shipping the Model S all electric, high performance sedan, which contains two NVIDIA Tegra 3D Visual Computing Modules (VCM). One VCM powers the 17-inch touchscreen infotainment system, and one drives the 12.3-inch all digital instrument cluster."[13]
In March 2015, Nvidia announced the Tegra X1, the first SoC to have a graphics performance of 1 teraflop. At the announcement event, Nvidia showed off Epic Games'Unreal Engine 4 "Elemental" demo, running on a Tegra X1.
On October 20, 2016, Nvidia announced that the Nintendo Switch hybrid video game console will be powered by Tegra hardware.[14] On March 15, 2017, TechInsights revealed the Nintendo Switch is powered by a custom Tegra X1 (model T210), with lower clockspeeds.[15]
The second generation Tegra SoC has a dual-coreARM Cortex-A9 CPU, an ultra low power (ULP) GeForce GPU,[17] a 32-bit memory controller with either LPDDR2-600 or DDR2-667 memory, a 32KB/32KB L1 cache per core and a shared 1MB L2 cache.[18] Tegra 2's Cortex A9 implementation does not include ARM's SIMD extension, NEON. There is a version of the Tegra 2 SoC supporting 3D displays; this SoC uses a higher clocked CPU and GPU.
The Tegra 2 video decoder is largely unchanged from the original Tegra and has limited support for HD formats.[19] The lack of support for high-profile H.264 is particularly troublesome when using online video streaming services.
Common features:
CPU cache: L1: 32KB instruction + 32KB data, L2: 1MB
Tesla Motors Model S 2012~2017 and Model X 2015~2017 instrument cluster (IC)[26][27]
Tegra 3
The Ouya uses a Tegra 3 T33-P-A3.Nvidia Tegra 3 T30L
NVIDIA's Tegra 3 (codenamed "Kal-El")[28] is functionally a SoC with a quad-core ARM Cortex-A9 MPCore CPU, but includes a fifth "companion" core in what Nvidia refers to as a "variable SMP architecture".[29] While all cores are Cortex-A9s, the companion core is manufactured with a low-power silicon process. This core operates transparently to applications and is used to reduce power consumption when processing load is minimal. The main quad-core portion of the CPU powers off in these situations.
Tegra 3 is the first Tegra release to support ARM's SIMD extension, NEON.
The GPU in Tegra 3 is an evolution of the Tegra 2 GPU, with 4 additional pixel shader units and higher clock frequency. It can also output video up to 2560×1600 resolution and supports 1080pMPEG-4 AVC/h.264 40Mbit/s High-Profile, VC1-AP, and simpler forms of MPEG-4 such as DivX and Xvid.[30]
The Tegra4 (codenamed "Wayne") was announced on January 6, 2013, and is a SoC with a quad-core CPU, but includes a fifth low-power Cortex A15 companion core which is invisible to the OS and performs background tasks to save power. This power-saving configuration is referred to as "variable SMP architecture" and operates like the similar configuration in Tegra3.[46]
The GeForce GPU in Tegra4 is again an evolution of its predecessors. However, numerous feature additions and efficiency improvements were implemented. The number of processing resources was dramatically increased, and clock rate increased as well. In 3D tests, the Tegra4 GPU is typically several times faster than that of Tegra3.[47] Additionally, the Tegra4 video processor has full support for hardware decoding and encoding of WebM video (up to 1080p 60Mbit/s @ 60fps).[48]
Along with Tegra4, Nvidia also introduced i500, an optional software modem based on Nvidia's acquisition of Icera, which can be reprogrammed to support new network standards. It supports category 3 (100Mbit/s) LTE but will later be updated to Category 4 (150Mbit/s).
Common features:
CPU cache: L1: 32KB instruction + 32KB data, L2: 2MB
The Tegra4i (codenamed "Grey") was announced on February 19, 2013. With hardware support for the same audio and video formats,[48] but using Cortex-A9 cores instead of Cortex-A15, the Tegra4i is a low-power variant of the Tegra4 and is designed for phones and tablets. Unlike its Tegra4 counterpart, the Tegra4i also integrates the Icerai500 LTE/HSPA+baseband processor onto the same die.
Nvidia's Tegra K1 (codenamed "Logan") features ARM Cortex-A15 cores in a 4+1 configuration similar to Tegra4, or Nvidia's 64-bitProject Denver dual-core processor as well as a Kepler graphics processing unit with support for Direct3D 12, OpenGL ES 3.1, CUDA 6.5, OpenGL 4.4/OpenGL 4.5, and Vulkan.[73][74] Nvidia claims that it outperforms both the Xbox 360 and the PS3, whilst consuming significantly less power.[75]
In December 2015, the web page of wccftech.com published an article stating that Tesla is going to use a Tegra K1 based design derived from the template of the Nvidia Visual Computing Module (VCM) for driving the infotainment systems and providing visual driving aid in the respective vehicle models of that time.[95] This news has, as of now, found no similar successor or other clear confirmation later on in any other place on such a combination of a multimedia with an auto pilot system for these vehicle models.
Released in 2015, Nvidia's Tegra X1 (codenamed "Erista") features two CPU clusters, one with four ARM Cortex-A57 cores and the other with four ARM Cortex-A53 cores, as well as a Maxwell-based graphics processing unit.[96][97] It supports Adaptive Scalable Texture Compression.[76] Only one cluster of cores can be active at once, with the cluster switch being handled by software on the BPMP-L. Devices utilizing the Tegra X1 have only been seen to utilize the cluster with the more powerful ARM Cortex-A57 cores. The other cluster with four ARM Cortex-A53 cores cannot be accessed without first powering down the Cortex-A57 cores (both clusters must be in the CC6 off state).[98] Nvidia has removed the ARM Cortex-A53 cores from later versions of technical documentation, implying that they have been removed from the die.[99][100] The Tegra X1 was found to be vulnerable to a Fault Injection (FI) voltage glitching attack, which allowed for arbitrary code execution and homebrew software on the devices it was implemented in.[101]
A revision (codenamed "Mariko") with greater power efficiency, known officially as Tegra X1+ was released in 2019,[102] fixing the Fusée Gelée exploit. It's also known as T214 and T210B01.
Nvidia's Tegra X2[113][114] (codenamed "Parker") features Nvidia's own custom general-purpose ARMv8-compatible core Denver 2 as well as code-named Pascal graphics processing core with GPGPU support.[115] The chips are made using FinFET process technology using TSMC's 16nm FinFET+ manufacturing process.[116][117][118]
The Xavier Tegra SoC, named after the comic book character Professor X, was announced on 28 September 2016, and by March 2019, it had been released.[131] It contains 7 billion transistors and 8 custom ARMv8 cores, a Volta GPU with 512 CUDA cores, an open sourced TPU (Tensor Processing Unit) called DLA (Deep Learning Accelerator).[132][133] It is able to encode and decode 8K Ultra HD (7680×4320). Users can configure operating modes at 10W, 15W, and 30W TDP as needed and the die size is 350mm2.[134][135][136] Nvidia confirmed the fabrication process to be 12 nm FinFET at CES 2018.[137]
On the Linux Kernel Mailing List, a Tegra194 based development board with type ID "P2972-0000" got reported: The board consists of the P2888 compute module and the P2822 baseboard.[153]
Orin
Nvidia announced the next-gen SoC codename Orin on March 27, 2018, at GPU Technology Conference 2018.[154] It contains 17 billion transistors and 12 ARM Hercules cores and is capable of 200 INT8 TOPs @ 65W.[155]
The Drive AGX Orin board system family was announced on December 18, 2019, at GTC China 2019. Nvidia has sent papers to the press documenting that the known (from Xavier series) clock and voltage scaling on the semiconductors and by pairing multiple such chips a wider range of application can be realized with the thus resulting board concepts.[156] In early 2021, Nvidia announced the Chinese vehicle company NIO will be using an Orin-based chip in their cars.[157]
GPU: Ampere-based, 2048[160]CUDA cores and 64 tensor cores1; "with up to 131 Sparse TOPs of INT8 Tensor compute, and up to 5.32 FP32 TFLOPs of CUDA compute."[161]
5 TOPS in the PVA v2.0 unit (Programmable Vision Accelerator for Feature Tracking)
1.85 GPix/s in the ISP unit (Image Signal Processor, with native full-range HDR and tile processing support)
Video processor for? GPix/s encoding and? GPix/s decode
4× 10Gbit/s Ethernet, 1× 1Gbit/s Ethernet
1 Orin uses the double-rate tensor cores in the A100, not the standard tensor cores in consumer Ampere GPUs.
Nvidia announced the latest member of the family, "Orin Nano" in September 2022 at the GPU Technology Conference 2022.[163] The Orin product line now features SoC and SoM(System-On-Module) based on the core Orin design and scaled for different uses from 60W all the way down to 5W. While less is known about the exact SoC's that are being manufactured, Nvidia has publicly shared detailed technical specifications about the entire Jetson Orin SoM product line. These module specifications illustrate how Orin scales providing insight into future devices that contain an Orin derived SoC.
built from 4x Nvidia Drive Orin, totals to 48 CPU cores and 8,192 CUDA cores; for use in vehicles ET7 in March 2022 and ET5 in September 2022
Grace
The Grace CPU is an NVIDIA-developed ARM Neoverse CPU platform, targeted at large-scale AI and HPC applications, available within several NVIDIA products. The NVIDIA OVX platform combines the Grace Superchip (two Grace dies on one board) with desktop NVIDIA GPUs in a server form-factor, while the NVIDIA HGX platform is available with either the Grace Superchip or the Grace Hopper Superchip.[174] The latter is an HPC platform in of itself, combining a Grace CPU with a Hopper-based GPU, announced by NVIDIA on March 22, 2022.[175] Kernel patchsets indicate that a single Grace CPU is also known as T241, placing it under the Tegra SoC branding, despite the chip itself not including a GPU (a referenced T241 patchset cites impact to "NVIDIA server platforms that use more than two T241 chips...interconnected," pointing to the Grace Superchip design).[176]
Nvidia announced the next-gen SoC codename Thor on September 20, 2022, at GPU Technology Conference 2022, replacing the cancelled Atlan.[182] A patchset adding support for Tegra264 to mainline Linux was submitted May 5, 2023, likely indicating initial support for Thor.[188]
FreeBSD supports a number of different Tegra models and generations, ranging from Tegra K1,[192] to Tegra 210.[193]
Linux
Nvidia distributes proprietary device drivers for Tegra through OEMs and as part of its "Linux for Tegra" (formerly "L4T") development kit, also Nvidia provides JetPack SDK with "Linux for Tegra" and other tools with it. The newer and more powerful devices of the Tegra family are now supported by Nvidia's own Vibrante Linux distribution. Vibrante comes with a larger set of Linux tools plus several Nvidia provided libraries for acceleration in the area of data processing and especially image processing for driving safety and automated driving up to the level of deep learning and neuronal networks that make e.g. heavy use of the CUDA capable accelerator blocks, and via OpenCV can make use of the NEON vector extensions of the ARM cores.
As of April 2012[update], due to different "business needs" from that of their GeForce line of graphics cards, Nvidia and one of their Embedded Partners, Avionic Design GmbH from Germany, are also working on submitting open-source drivers for Tegra upstream to the mainline Linux kernel.[194][195] Nvidia co-founder & CEO laid out the Tegra processor roadmap using Ubuntu Unity in GPU Technology Conference 2013.[196][unreliable source?]
By end of 2018 it is evident that Nvidia employees have contributed substantial code parts to make the T186 and T194 models run for HDMI display and audio with the upcoming official Linux kernel 4.21 in about Q1 2019. The affected software modules are the open source Nouveau and the closed source Nvidia graphics drivers along with the Nvidia proprietary CUDA interface.[197][unreliable source?]
As of May, 2022, NVIDIA has open-sourced their GPU kernel modules for both Jetson and desktop platforms, allowing all but proprietary userspace libraries to be open-source on Tegra platforms with official NVIDIA drivers starting with T234 (Orin).[198]
QNX
The Drive PX2 board was announced with QNX RTOS support at the April 2016 GPU Technology Conference.[199]
Similar platforms
SoCs and platforms with comparable specifications (e.g. audio/video input, output and processing capability, connectivity, programmability, entertainment/embedded/automotive capabilities & certifications, power consumption) are:
OMAP is a family of image/video processors that was developed by Texas Instruments. They are proprietary system on chips (SoCs) for portable and mobile multimedia applications. OMAP devices generally include a general-purpose ARM architecture processor core plus one or more specialized co-processors. Earlier OMAP variants commonly featured a variant of the Texas Instruments TMS320 series digital signal processor.
A free and open-source graphics device driver is a software stack which controls computer-graphics hardware and supports graphics-rendering application programming interfaces (APIs) and is released under a free and open-source software license. Graphics device drivers are written for specific hardware to work within a specific operating system kernel and to support a range of APIs used by applications to access the graphics hardware. They may also control output to the display if the display driver is part of the graphics hardware. Most free and open-source graphics device drivers are developed by the Mesa project. The driver is made up of a compiler, a rendering API, and software which manages access to the graphics hardware.
Adreno is a series of graphics processing unit (GPU) semiconductor intellectual property cores developed by Qualcomm and used in many of their SoCs.
Arm Holdings plc is a British semiconductor and software design company based in Cambridge, England, whose primary business is the design of central processing unit (CPU) cores that implement the ARM architecture family of instruction sets. It also designs other chips, provides software development tools under the DS-5, RealView and Keil brands, and provides systems and platforms, system-on-a-chip (SoC) infrastructure and software. As a "holding" company, it also holds shares of other companies. Since 2016, it has been majority owned by Japanese conglomerate SoftBank Group.
Rockchip is a Chinese fabless semiconductor company based in Fuzhou, Fujian province. It has offices in Shanghai, Beijing, Shenzhen, Hangzhou and Hong Kong. It designs system on a chip (SoC) products, using the ARM architecture licensed from ARM Holdings for the majority of its projects.
The ARM Cortex-A15 MPCore is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture. It is a multicore processor with out-of-order superscalar pipeline running at up to 2.5 GHz.
Project Denver is the codename of a central processing unit designed by Nvidia that implements the ARMv8-A 64/32-bit instruction sets using a combination of simple hardware decoder and software-based binary translation where "Denver's binary translation layer runs in software, at a lower level than the operating system, and stores commonly accessed, already optimized code sequences in a 128 MB cache stored in main memory". Denver is a very wide in-order superscalar pipeline. Its design makes it suitable for integration with other SIPs cores into one die constituting a system on a chip (SoC).
Apple silicon is a series of system on a chip (SoC) and system in a package (SiP) processors designed by Apple Inc., mainly using the ARM architecture. They are the basis of Mac, iPhone, iPad, Apple TV, Apple Watch, AirPods, AirTag, HomePod, and Apple Vision Pro devices.
The Samsung Exynos, formerly Hummingbird (Korean: 엑시노스), is a series of ARM-based system-on-chips developed by Samsung Electronics' System LSI division and manufactured by Samsung Foundry. It is a continuation of Samsung's earlier S3C, S5L and S5P line of SoCs.
The Mali and Immortalis series of graphics processing units (GPUs) and multimedia processors are semiconductor intellectual property cores produced by Arm Holdings for licensing in various ASIC designs by Arm partners.
The ARM Cortex-A57 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings. The Cortex-A57 is an out-of-order superscalar pipeline. It is available as SIP core to licensees, and its design makes it suitable for integration with other SIP cores into one die constituting a system on a chip (SoC).
NVLink is a wire-based serial multi-lane near-range communications link developed by Nvidia. Unlike PCI Express, a device can consist of multiple NVLinks, and devices use mesh networking to communicate instead of a central hub. The protocol was first announced in March 2014 and uses a proprietary high-speed signaling interconnect (NVHS).
This is a comparison of ARM instruction set architecture application processor cores designed by ARM Holdings and 3rd parties. It does not include ARM Cortex-R, ARM Cortex-M, or legacy ARM cores.
The Nvidia Shield TV is an Android TV-based digital media player produced by Nvidia as part of its Shield brand of Android devices. First released in May 2015, the Shield was initially marketed by Nvidia as a microconsole, emphasizing its ability to play downloaded games and stream games from a compatible PC on a local network, or via the GeForce Now subscription service. As with all other Android TV devices, it can also stream content from various sources using apps, and also supports 4K resolution video. It is produced in two models, with the second Shield TV Pro model distinguished primarily by increased internal storage.
Nvidia Drive is a computer platform by Nvidia, aimed at providing autonomous car and driver assistance functionality powered by deep learning. The platform was introduced at the Consumer Electronics Show (CES) in Las Vegas in January 2015. An enhanced version, the Drive PX 2 was introduced at CES a year later, in January 2016.
Nvidia Jetson is a series of embedded computing boards from Nvidia. The Jetson TK1, TX1 and TX2 models all carry a Tegra processor from Nvidia that integrates an ARM architecture central processing unit (CPU). Jetson is a low-power system and is designed for accelerating machine learning applications.
The ARM Cortex-A78 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Ltd.'s Austin centre.
The ARM Neoverse is a group of 64-bit ARM processor cores licensed by Arm Holdings. The cores are intended for datacenter, edge computing, and high-performance computing use. The group consists of ARM Neoverse V-Series, ARM Neoverse N-Series, and ARM Neoverse E-Series.
↑ "Toshiba Thrive Review". TabletPCReview. TechTarget, Inc. August 3, 2011. Archived from the original on November 6, 2013. Retrieved November 21, 2013.
↑ Bittner, Otto; Krachenfels, Thilo; Galauner, Andreas; Seifert, Jean-Pierre (August 16, 2021). "The Forgotten Threat of Voltage Glitching: A Case Study on Nvidia Tegra X2 SoCs". 2021 Workshop on Fault Detection and Tolerance in Cryptography (FDTC). pp.86–97. arXiv:2108.06131v2. doi:10.1109/FDTC53659.2021.00021. ISBN978-1-6654-3673-1. S2CID237048483.
↑ Ltd, Arm. "Cortex-A78AE – Arm". Arm | The Architecture for the Digital World. Archived from the original on October 5, 2020. Retrieved October 3, 2020.
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