Nvidia Drive

Last updated

Nvidia Drive is a computer platform by Nvidia, aimed at providing autonomous car and driver assistance functionality powered by deep learning. [1] [2] The platform was introduced at the Consumer Electronics Show (CES) in Las Vegas in January 2015. [3] An enhanced version, the Drive PX 2 was introduced at CES a year later, in January 2016. [4]

Contents

The closely platform related software release program at some point in time was branded NVIDIA DRIVE Hyperion along with a revision number helping to match with the generation of hardware it is created for - and also creating ready to order bundles under those term. In former times there were only the terms Nvidia Drive SDK for the developer package and sub-included Nvidia Drive OS for the system software (aka OS) that came with the evaluation platforms or could be downloaded for OS switching and updating later on.

Hardware and semiconductors

Maxwell based

The first of Nvidia's autonomous chips was announced at CES 2015, based on the Maxwell GPU microarchitecture. [5] The line-up consisted of two platforms:

Drive CX

The Drive CX was based on a single Tegra X1 SoC (System on a Chip) and was marketed as a digital cockpit computer, providing a rich dashboard, navigation and multimedia experience. Early Nvidia press releases reported that the Drive CX board will be capable of carrying either a Tegra K1 or a Tegra X1. [6]

Drive PX

Drive PX NVIDIA Drive PX, Computex Taipei 20150601.jpg
Drive PX

The first version of Drive PX is based on two Tegra X1 SoCs, and was an initial development platform targeted at (semi-)autonomous driving cars.

Pascal based

Drive PX platforms based on the Pascal GPU microarchitecture were first announced at CES 2016. [7] This time only a new version of Drive PX was announced, but in multiple configurations.

Drive PX 2

The Nvidia Drive PX 2 is based on one or two Tegra X2 SoCs where each SoC contains 2 Denver cores, 4 ARM A57 cores and a GPU from the Pascal generation. [8] There are two real world board configurations:

  • for AutoCruise: 1× Tegra X2 + 1 Pascal GPU
  • for AutoChauffeur: 2× Tegra X2 + 2 Pascal GPU's

There is further the proposal from Nvidia for fully autonomous driving by means of combining multiple items of the AutoChauffeur board variant and connecting these boards using e.g. UART, CAN, LIN, FlexRay, USB, 1 Gbit Ethernet or 10 Gbit Ethernet. For any derived custom PCB design the option of linking the Tegra X2 Processors via some PCIe bus bridge is further available, according to board block diagrams that can be found on the web.

All Tesla Motors vehicles manufactured from mid-October 2016 include a Drive PX 2, which will be used for neural net processing to enable Enhanced Autopilot and full self-driving functionality. [9] Other applications are Roborace. [10] Disassembling the Nvidia-based control unit from a recent Tesla car showed that a Tesla was using a modified single-chip Drive PX 2 AutoCruise, with a GP106 GPU added as a MXM Module. The chip markings gave strong hints for the Tegra X2 Parker as the CPU SoC. [11] [12]

Volta based

Systems based on the Volta GPU microarchitecture were first announced at CES 2017 [13]

Drive PX Xavier

The first Volta based Drive PX system was announced at CES 2017 as the Xavier AI Car Supercomputer. [13] It was re-presented at CES 2018 as Drive PX Xavier. [14] [15] Initial reports of the Xavier SoC suggested a single chip with similar processing power to the Drive PX 2 Autochauffeur system. [16] However, in 2017 the performance of the Xavier-based system was later revised upward, to 50% greater than Drive PX 2 Autochauffeur system. [13] Drive PX Xavier is supposed to deliver 30 INT8 TOPS of performance while consuming only 30 watts of power. [17] This spreads across two distinct units, the iGPU with 20 INT8 TOPS as published early and the somewhat later on announced, newly introduced DLA that provided an additional 10 INT8 TOPS.

Drive PX Pegasus

In October 2017 Nvidia and partner development companies announced the Drive PX Pegasus system, based upon two Xavier CPU/GPU devices and two post-Volta (Turing) generation GPUs. The companies stated the third generation Drive PX system would be capable of Level 5 autonomous driving, with a total of 320 INT8 TOPS of AI computational power and a 500 Watts TDP. [18] [19]

Ampere based

Drive AGX Orin

The Drive AGX Orin board family was announced on December 18, 2019, at GTC China 2019. [20] On May 14, 2020, Nvidia announced that Orin would be utilizing the new Ampere GPU microarchitecture and would begin sampling for manufacturers in 2021 and be available for production in 2022. [21] Follow up variants are expected to be further equipped with chip models and/or modules from the Tegra Orin SoC.

Ada Lovelace based

DRIVE Atlan (Cancelled)

Nvidia announced the SoC codenamed Atlan on April 12, 2021 at GTC 2021 [22] .

Nvidia announced the cancellation of Atlan on September 20, 2022, which was supposed to be equipped with a Grace-Next CPU, and an Ada Lovelace based GPU, and Nvidia announced that their next SoC was called Thor [23] .

Blackwell based

DRIVE Thor

Announced on September 20, 2022 [24] , Nvidia DRIVE Thor comes equipped with an Arm Neoverse V3AE CPU [25] , and a Blackwell based GPU, which was announced on March 18, 2024 [26] .

Software and bundling

With the label Hyperion [27] added to their reference platform [28] series Nvidia promotes their mass products so that others can easily test drive and then create their own automotive grade products on top. Especially the feature rich software part of the base system is meant to be a big help for these others to quickly go ahead into developing their application specific solutions. Third-party companies, such as DeepRoute.ai, have publicly indicated using these software platform as their base of choice. [29] The whole design is concentrating on UNIX/Posix compatible or derived runtime environments (Linux, [30] Android, [31] QNX - aka the Drive OS variants) with special support for the semiconductors mentioned before in form of internal (CUDA, Vulkan) and external support (special interfaces and drivers for camera, lidar, CAN and many more) of the respective reference boards. For clearness Nvidia bundles the core of the developer needed software as Drive SDK that is sub-divided into DRIVE OS, DriveWorks, DRIVE AV, and DRIVE IX components. [32]

Hyperion
Version		AnnouncedLatest
Chip Launch		Start of
Road Usage		Target Use CaseSemiconductorsReference Platforms / Developer KitsDrive OS VersionSensor Support
7.1 [33] 2020Level 2+ autonomous drivingXavier, Turing GPUDRIVE AGX Xavier Developer Kit,
DRIVE AGX Pegasus Developer Kit		vehicle external: 7x camera, 8x radar;
vehicle internal: 1x camera
8 [34] [30] 2020Xavier, Turing GPUDRIVE™ AGX Pegasus GV100,
DRIVE™ AGX Xavier		5.0.13.2 (linux)vehicle external: 12x camera, 9x radar, 1x lidar
8.1 [35] 2022estimated for 2024Orin, Xavier, Turing GPUNVIDIA DRIVE AGX Orin™,
DRIVE AGX Pegasus,
DRIVE Hyperion 8.1 Developer Kits [36] 		Orin: 6.0 (latest: 6.0.4)
Xavier/Pegasus:5.2.6 [32] 		vehicle external: 12x camera, 9x radar, 1x lidar
9 [37] [38] March 20222024estimated for 2026Atlan (Cancelled)vehicle external: 14x camera, 9x radar, 3x lidar, 20x ultrasonic;
vehicle internal: 3x camera, 1x radar

Note: As of now the above table is still 'fresh' and thus might be incomplete.

Reference board comparison

Nvidia provided
reference board		Drive CXDrive PXDrive PX 2

(AutoCruise)

Drive PX 2

(Tesla)

Drive PX 2

(AutoChauffeur)

Drive PX 2

(Tesla 2.5)

Drive PX Xavier [15] Drive PX Pegasus [39] Drive AGX Orin [20] Drive AGX Pegasus OA [40] Drive Atlan (Cancelled)Drive Thor
GPU Microarchitecture Maxwell (28 nm) Pascal (16 nm) Volta (12 nm) Ampere (8 nm [41] ) Ada Lovelace (TSMC 4N) Blackwell (TSMC 4NP [42] )
AnnouncedJanuary 2015September 2016 [43] October 2016 [44] January 2016August 2017 [45] January 2017October 2017December 2019April 2021 [46] September 2022 [47]
LaunchedN/AN/AN/AN/AN/AN/AN/A2022 [48] Cancelled [49] 2025 [47]
Chips1x Tegra X12x Tegra X11x Tegra X2 (Parker)

+ 1x Pascal GPU

2x Tegra X2 (Parker)

+ 2x Pascal GPU

2x Tegra X2 (Parker)

+ 1x Pascal GPU [50]

1x Tegra Xavier [51] 2x Tegra Xavier

+ 2x Turing GPU

2x Tegra Orin2x Tegra Orin

+ 2x Ampere GPU

?x Grace-Next CPU [46]

+ ?x Ada Lovelace GPU [52]

?x Arm Neoverse Poseidon AE CPU [53]

+ ?x Blackwell GPU [54]

CPU4x Cortex A57

4x Cortex A53

8x Cortex A57

8x Cortex A53

2x Denver

4x Cortex A57

4x Denver

8x Cortex A57

4x Denver

8x Cortex A57

8x Carmel ARM64 [51] 16x Carmel ARM64 12x Cortex A78AE24x Cortex A78AE?x Grace-Next [46] ?x Arm Neoverse Poseidon AE [55]
GPU2 SMM Maxwell

256 CUDA cores

4 SMM Maxwell

512 CUDA cores

1x Parker GPGPU

(1x 2 SM Pascal,
256 CUDA cores)

1x Parker GPGPU

(1x 2 SM Pascal,
256 CUDA cores
on a MXM slot [11] )

2x Parker GPGPU

(2x 2 SM Pascal,
512 CUDA cores)
+ 2x dedicated MXM modules [56]

1x Parker GPGPU

1x 2 SM Pascal,
256 CUDA cores [45] [50]

1x Volta iGPU

(512 CUDA cores) [51]

2x Volta iGPU

(512 CUDA cores)
2x Turing dGPUs
(? CUDA cores)

2x Ampere iGPU

(?CUDA cores)

2x Ampere iGPU

(? CUDA cores)
2x Ampere dGPU
(? CUDA cores)

?x Ada Lovelace [57] ?x Blackwell GPU [58]
Accelerator1x DLA

1x PVA [51]

2x DLA

2x PVA

2x DLA

2x PVA

2x DLA

2x PVA

??
Memory8GB LPDDR4 [59] 16GB LPDDR4 [59] 16GB LPDDR4 [51] 32GB LPDDR5??
Storage64GB eMMC [59] 128GB eMMC [59] ??
Performance4 FP32 TFLOPS

10-12 DL TOPS [60] [61]

4 FP32 TFLOPS

10-12 DL TOPS [60] [61]

16 FP16 TFLOPS

8 FP32 TFLOPS

20-24 DL TOPS [60] [61]

4 FP32 TFLOPS

10-12 DL TOPS [60] [61]

20 INT8 TOPS, 1.3 FP32 TFLOPS (GPU)
10 INT8 TOPS, 5 FP16 TFLOPS (DLA) [51] 		320 INT8 TOPS (total) [62] 400 INT8 TOPS (total)2000 INT8 TOPS (total)1000 INT8 TOPS [63] 2000 FP8 TOPS [47]
TDP20W [61] 40W

SoC portion: 10W [43]

40W

SoC portion: 10W [43]

80W [64] [65] [61] [66]

SoC portion: 20W [43]

60W [64] [65] [61]

SoC portion: 20W [43]

30W [51] 500W [62] 130W750W??

Note: dGPU and memory are stand-alone semiconductors; all other components, especially ARM cores, iGPU and DLA are integrated components of the listed main computing device(s)

Related Research Articles

<span class="mw-page-title-main">Nvidia</span> American multinational technology company

Nvidia Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, and incorporated in Delaware. It is a software and fabless company which designs and supplies graphics processing units (GPUs), application programming interfaces (APIs) for data science and high-performance computing as well as system on a chip units (SoCs) for the mobile computing and automotive market. Nvidia is also a dominant supplier of artificial intelligence (AI) hardware and software.

<span class="mw-page-title-main">Graphics processing unit</span> Specialized electronic circuit; graphics accelerator

A graphics processing unit (GPU) is a specialized electronic circuit initially designed to accelerate computer graphics and image processing. After their initial design, GPUs were found to be useful for non-graphic calculations involving embarrassingly parallel problems due to their parallel structure. Other non-graphical uses include the training of neural networks and cryptocurrency mining.

<span class="mw-page-title-main">CUDA</span> Parallel computing platform and programming model

Compute Unified Device Architecture (CUDA) is a parallel computing platform and application programming interface (API) that allows software to use certain types of graphics processing units (GPUs) for accelerated general-purpose processing, an approach called general-purpose computing on GPUs (GPGPU). CUDA API and its runtime: The CUDA API is an extension of the C programming language that adds the ability to specify thread-level parallelism in C and also to specify GPU device specific operations (like moving data between the CPU and the GPU). CUDA is a software layer that gives direct access to the GPU's virtual instruction set and parallel computational elements for the execution of compute kernels. In addition to drivers and runtime kernels, the CUDA platform includes compilers, libraries and developer tools to help programmers accelerate their applications.

<span class="mw-page-title-main">Tegra</span> System on a chip by Nvidia

Tegra is a system on a chip (SoC) series developed by Nvidia for mobile devices such as smartphones, personal digital assistants, and mobile Internet devices. The Tegra integrates an ARM architecture central processing unit (CPU), graphics processing unit (GPU), northbridge, southbridge, and memory controller onto one package. Early Tegra SoCs are designed as efficient multimedia processors. The Tegra-line evolved to emphasize performance for gaming and machine learning applications without sacrificing power efficiency, before taking a drastic shift in direction towards platforms that provide vehicular automation with the applied "Nvidia Drive" brand name on reference boards and its semiconductors; and with the "Nvidia Jetson" brand name for boards adequate for AI applications within e.g. robots or drones, and for various smart high level automation purposes.

Atlan may refer to:

Project Denver is the codename of a central processing unit designed by Nvidia that implements the ARMv8-A 64/32-bit instruction sets using a combination of simple hardware decoder and software-based binary translation where "Denver's binary translation layer runs in software, at a lower level than the operating system, and stores commonly accessed, already optimized code sequences in a 128 MB cache stored in main memory". Denver is a very wide in-order superscalar pipeline. Its design makes it suitable for integration with other SIPs cores into one die constituting a system on a chip (SoC).

<span class="mw-page-title-main">Nvidia Tesla</span> Nvidias line of general purpose GPUs

Nvidia Tesla is the former name for a line of products developed by Nvidia targeted at stream processing or general-purpose graphics processing units (GPGPU), named after pioneering electrical engineer Nikola Tesla. Its products began using GPUs from the G80 series, and have continued to accompany the release of new chips. They are programmable using the CUDA or OpenCL APIs.

<span class="mw-page-title-main">NVLink</span> High speed chip interconnect

NVLink is a wire-based serial multi-lane near-range communications link developed by Nvidia. Unlike PCI Express, a device can consist of multiple NVLinks, and devices use mesh networking to communicate instead of a central hub. The protocol was first announced in March 2014 and uses a proprietary high-speed signaling interconnect (NVHS).

<span class="mw-page-title-main">Volta (microarchitecture)</span> GPU microarchitecture by Nvidia

Volta is the codename, but not the trademark, for a GPU microarchitecture developed by Nvidia, succeeding Pascal. It was first announced on a roadmap in March 2013, although the first product was not announced until May 2017. The architecture is named after 18th–19th century Italian chemist and physicist Alessandro Volta. It was Nvidia's first chip to feature Tensor Cores, specially designed cores that have superior deep learning performance over regular CUDA cores. The architecture is produced with TSMC's 12 nm FinFET process. The Ampere microarchitecture is the successor to Volta.

<span class="mw-page-title-main">High Bandwidth Memory</span> Type of memory used on processors that require high transfer rate memory

High Bandwidth Memory (HBM) is a computer memory interface for 3D-stacked synchronous dynamic random-access memory (SDRAM) initially from Samsung, AMD and SK Hynix. It is used in conjunction with high-performance graphics accelerators, network devices, high-performance datacenter AI ASICs, as on-package cache in CPUs and on-package RAM in upcoming CPUs, and FPGAs and in some supercomputers. The first HBM memory chip was produced by SK Hynix in 2013, and the first devices to use HBM were the AMD Fiji GPUs in 2015.

<span class="mw-page-title-main">Nvidia Shield TV</span> Digital media player by Nvidia

The Nvidia Shield TV is an Android TV-based digital media player produced by Nvidia as part of its Shield brand of Android devices. First released in May 2015, the Shield was initially marketed by Nvidia as a microconsole, emphasizing its ability to play downloaded games and stream games from a compatible PC on a local network, or via the GeForce Now subscription service. As with all other Android TV devices, it can also stream content from various sources using apps, and also supports 4K resolution video. It is produced in two models, with the second Shield TV Pro model distinguished primarily by increased internal storage.

<span class="mw-page-title-main">Nvidia DGX</span> Line of Nvidia produced servers and workstations

Nvidia DGX is a line of Nvidia-produced servers and workstations which specialize in using GPGPU to accelerate deep learning applications. The typical design of a DGX system is based upon a rackmount chassis with motherboard that carries high performance x86 server CPUs. The main component of a DGX system is a set of 4 to 8 Nvidia Tesla GPU modules on an independent system board. DGX systems have large heatsinks and powerful fans to adequately cool thousands of watts of thermal output. The GPU modules are typically integrated into the system using a version of the SXM socket or by a PCIe x16 slot.

Nvidia Jetson is a series of embedded computing boards from Nvidia. The Jetson TK1, TX1 and TX2 models all carry a Tegra processor from Nvidia that integrates an ARM architecture central processing unit (CPU). Jetson is a low-power system and is designed for accelerating machine learning applications.

aiMotive is an autonomous vehicle technology company. The company aims to work with automotive manufacturers and Tier1s to enable automated technologies. aiMotive describes its approach as "vision-first", a system that primarily relies on cameras and artificial intelligence to detect its surroundings. The technology is designed to be implemented by automobile manufacturers to create autonomous vehicles, which can operate in all conditions and locations. In September 2017, PSA Group teamed up with AImotive.

DeepScale, Inc. was an American technology company headquartered in Mountain View, California, that developed perceptual system technologies for automated vehicles. On October 1, 2019, the company was acquired by Tesla, Inc.

<span class="mw-page-title-main">Ampere (microarchitecture)</span> GPU microarchitecture by Nvidia

Ampere is the codename for a graphics processing unit (GPU) microarchitecture developed by Nvidia as the successor to both the Volta and Turing architectures. It was officially announced on May 14, 2020 and is named after French mathematician and physicist André-Marie Ampère.

Nvidia GTC is a global artificial intelligence (AI) conference for developers that brings together developers, engineers, researchers, inventors, and IT professionals. Topics focus on AI, computer graphics, data science, machine learning and autonomous machines. Each conference begins with a keynote from Nvidia CEO and Founder Jensen Huang, followed by a variety of sessions and talks with experts from around the world.

Tesla Dojo is a supercomputer designed and built by Tesla for computer vision video processing and recognition. It will be used for training Tesla's machine learning models to improve its Full Self-Driving (FSD) advanced driver-assistance system. According to Tesla, it went into production in July 2023.

<span class="mw-page-title-main">XPeng G9</span> Motor vehicle

The XPeng G9 is a battery-powered mid-sized luxury SUV manufactured by Chinese electric car company XPeng. The G9 was unveiled in November 2021 during the Guangzhou Auto Show and is scheduled to be officially launched in China in the third quarter of 2022. The G9 is the first XPeng product to be conceived and designed from the outset for both domestic Chinese and international markets.

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