ARM Cortex-X925

ARM Cortex-X925

General information
Launched	2024
Designed by	ARM Ltd.
Performance
Address width	40-bit
Cache
L1 cache	128 KiB (64 KiB I-cache with parity, 64 KiB D-cache) per core
L2 cache	2048–3072 KiB per core
L3 cache	512 KiB – 32 MiB(optional)
Architecture and classification
Microarchitecture	ARM Cortex-X925
Instruction set	ARMv9.2-A
Physical specifications
Cores	1–14 per cluster
Products, models, variants
Product code name	Blackhawk
Variant	ARM Cortex-A725
History
Predecessor	ARM Cortex-X4
Successor	ARM C1-Ultra

The ARM Cortex-X925, codenamed "Blackhawk", is a high-performance CPU core designed by Arm and introduced in 2024. It is part of the second-generation ARMv9.2 architecture and is built on a 3 nm process node. The Cortex-X925 ^[1] is designed to excel in single-threaded instruction per clock (IPC) performance, making it ideal for high-performance mobile computing. ARM states that at ISO-frequency, the Cortex-X925 delivera around 17% higher IPC than the preceding Cortex-X4.

Key features

• 10-wide decode and dispatch width: This allows the core to process more instructions per cycle, increasing overall throughput. ^[2]
• Doubled instruction window size: This reduces stalls and improves the efficiency of the execution pipeline. ^[2]
• Increased L1 instruction cache (I$) bandwidth: The core features a 2x increase in L1 I$ bandwidth, ensuring quick instruction fetch and decode. ^[2]
• Enhanced branch prediction unit: Techniques such as folded-out unconditional direct branches reduce mispredicted branches, leading to fewer pipeline flushes and higher sustained IPC. ^[2]
• Support for ARMv9.2-A instruction set: The core supports A64 instruction set and AArch64 execution state at all exception levels. ^[3]
• Scalable Vector Extension (SVE) and SVE2: These extensions provide advanced SIMD and floating-point support. ^[3]
• Error protection: The core includes error protection on L1 instruction and data caches, L2 cache, and MMU Translation Cache (MMU TC) with parity or ECC. ^[3]

The Cortex-X925 is designed to be used in both homogeneous and heterogeneous DynamIQ™ clusters, providing flexibility in various system configurations. ^[3]

Released in 2024 as part of Arm's "total compute solution." It serves as the successor of ARM Cortex-X4. X-series CPU cores generally focus on high performance, and can be grouped with other ARM cores, such as ARM Cortex-A725 and/or ARM Cortex-A520 in a System-on-Chip (SoC).

Architecture comparison

uArch	Cortex-A78	Cortex-X1	Cortex-X2	Cortex-X3	Cortex-X4	Cortex-X925
Code name	Hercules	Hera	Matterhorn-ELP	Makalu-ELP	Hunter-ELP	Blackhawk
Architecture	ARMv8.2		ARMv9		ARMv9.2
Peak clock speed	~3.0 GHz			~3.25 GHz	~3.4 GHz	~3.8 GHz
Decode Width	4	5		6	10 [4] [5]
Dispatch	6/cycle	8/cycle			10/cycle
Max In-flight	2× 160	2× 224	2× 288	2× 320	2× 384	2× 768
L0 (Mops entries)	1536 [6]	3072 [6]		1536	None [4]
L1-I + L1-D	32+32 kiB [7]	64+64 kiB
L2 (per Core)	128–512 kiB	256–1024 kiB			512–2048 kiB	2048–3072 kiB
L3 (total)	0–8 MiB		0–16 MiB		0–32 MiB

Usage

• MediaTek • Dimensity 9400/9400+ ^{[8] [9]}
• Samsung • Exynos 2500 ^[10]

References

1. "Arm Launches Next-Gen Flagship Cortex-X925". 29 May 2024.
2. "Arm Unveils 2024 CPU Core Designs, Cortex X925, A725 and A520: Arm v9.2 Redefined for 3nm". Archived from the original on May 29, 2024.
3. "Documentation – Arm Developer".
4. "Arm Cortex-X4, A720, and A520: 2024 smartphone CPUs deep dive". Android Authority. 2023-05-29. Retrieved 2023-06-01.
5. "Deep dive into Arm's new Cortex-X925 and Immortalis-G925 for mobile". 29 May 2024.
6. Frumusanu, Andrei. "Arm's New Cortex-A78 and Cortex-X1 Microarchitectures: An Efficiency and Performance Divergence". www.anandtech.com. Archived from the original on May 26, 2020. Retrieved 2023-06-01.
7. Schor, David (2020-05-26). "Arm Cortex-X1: The First From The Cortex-X Custom Program". WikiChip Fuse. Retrieved 2023-05-30.
8. "MediaTek Dimensity 9400 | Flagship 5G Chipset | Smartphones".
9. "MediaTek Dimensity 9400+".
10. "Exynos 2500 | Mobile Processor".