DECpc AXP 150

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The DECpc AXP 150, code-named Jensen, is an entry-level workstation developed and manufactured by Digital Equipment Corporation. Introduced on 25 May 1993, the DECpc AXP 150 was the first Alpha-based system to support the Windows NT operating system and the basis for the DEC 2000 AXP entry-level servers. It was discontinued on 28 February 1994, succeeded by the entry-level Multia and the entry-level and mid-range models of the AlphaStation family. The charter for the development and production of the DEC 2000 AXP was held by Digital's Entry Level Solutions Business, based in Ayr, Scotland.

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DEC 2000 AXP

The DEC 2000 AXP family are entry-level servers based on the DECpc AXP 150. Differences were support for Digital's OpenVMS AXP and OSF/1 AXP (later renamed to Digital UNIX) operating systems and support for a VT-series terminal or equivalent. The DEC 2000 AXP family succeeded by the AlphaServer 1000. There are two models in the DEC 2000 AXP family: the Model 300 and Model 500.

Model 300

The DEC 2000 Model 300 AXP, code-named Jensen, is identical to the DECpc AXP 150 but was intended to be used as a server. Some options available for the DECpc AXP 150 are not available for the Model 300. It was introduced on 12 October 1993, and was discontinued on 28 February 1994.

Model 500

The DEC 2000 Model 500 AXP, code-named Culzean , was marketed as a server running either Windows NT Advanced Server, DEC OSF/1 AXP or OpenVMS. Introduced on 15 November 1993, the Model 500 was similar to the Model 300, but housed in a larger pedestal-type enclosure capable with space for up to 12 3.5 in hard disks and incorporating an Intelligent Front Panel (IFP) for system monitoring and control. The Model 500 also supported either two 415 W power supplies or one power supply plus a battery Standby Power Supply (SPS). It was discontinued on 30 December 1994.

Description

The DECpc AXP 150 systems used a 150 MHz DECchip 21064 microprocessor with an external 512 KB [1] B-cache (L2 cache), which is implemented with 17 nanosecond SRAMs located on the motherboard.

The 128-bit memory subsystem supports 16 to 128 MB of memory. Standard 36-bit, 70 nanosecond SIMMs with longword parity protection are used to populate eight SIMM slots, which are organised in two banks of four slots each. The DEC 2000 AXP supports two memory options, a 16 MB (4 × 4 MB SIMMs) and a 64 MB (4 × 16 MB SIMMs) memory kit.

The DECpc AXP 150 has six EISA slots for expansion. Pre-installed EISA cards typically comprised a Compaq QVision VGA adapter, Adaptec AHA-1742 SCSI host adapter, and a DEC DE422 Ethernet adapter. The DECpc AXP 150 running Windows NT was intended to be used as a workstation and therefore can only use a VGA monitor.

Unlike other similar Alpha systems from Digital at the time, such as the DEC 3000 AXP, the DECpc AXP 150 used the EISA bus for expansion instead of the TURBOchannel interconnect. The decision to use the EISA bus was due to cost requirements. The EISA bus was an industry standard bus, and there were more vendors offering EISA options, in addition to EISA chipsets. In contrast, the TURBOchannel bus, while offering higher performance, would have required more expensive ASICs to implement like the DEC 3000 AXP, and would have reduced the number of third-party options available.

Because the DECchip 21064's signalling is incompatible with the EISA chipset and the system peripherals, the DECchip signals are interfaced to two buses, an address and command bus and a 32-bit data bus that masquerades as the 80486 interfaces. These two buses are referred to as "pseudo-486". The EISA bus itself was implemented by a subset of the Intel 82350DT chipset. The 82358 EBC (EISA Bus Controller) chip and 82357 ISP (Integrated System Peripheral) chip implements the EISA bus and provides it with an interface to the system. Two 82352 EBB (EISA Bus Buffer) chips are also present, with one used to interface the EISA bus to a 32-bit pseudo-486 data bus, and the other used to interface the EISA bus to a pseudo-486 address and command bus.

This arrangement of buffering and converting buses and control signals resulted in an inefficient I/O subsystem and as a result, the EISA bus only achieved a peak bandwidth of 25 MB/s (compared to 33 MB/s in standard PCs).

A VLSI Technologies VL82C106 combination chip, connected to the pseudo-486 buses, contains the real time clock and 66 bytes of battery-backed RAM, in addition to two serial ports, a parallel port, and two PS/2 port interfaces. The real time clock and the battery-backed RAM draws power from an external 4.5 volt battery pack. The battery-backed RAM was primarily used to store system configuration information.

Notes

  1. ↑ When applied to computer memory (RAM or cache) the quantities KB, MB and GB are defined as:
    • 1 KB = 1024 B
    • 1 MB = 1024 KB
    • 1 GB = 1024 MB,
    consistent with the JEDEC memory standard.

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