Last updated
VAX 11-780 intero.jpg
Designer Digital Equipment Corporation
Introduced1977;43 years ago (1977)
Design CISC
Branching Condition code, indexing, counting
Endianness Little
Page size512 bytes
General purpose 16× 32-bit, also used for floating-point values

VAX is a line of computers developed by Digital Equipment Corporation (DEC) in the mid-1970s. The VAX-11/780, introduced on October 25, 1977, was the first of a range of popular and influential computers implementing the VAX instruction set architecture (ISA).


A 32-bit system with a complex instruction set computer (CISC) architecture based on DEC's earlier PDP-11, VAX ("virtual address extension") was designed to extend or replace DEC's various Programmed Data Processor (PDP) ISAs. The VAX architecture's primary features were virtual addressing (for example demand paged virtual memory) and its orthogonal instruction set.

VAX has been perceived as the quintessential CISC ISA, with its very large number of assembly-language-programmer-friendly addressing modes and machine instructions, highly orthogonal architecture, and instructions for complex operations such as queue insertion or deletion and polynomial evaluation. [1] It is historically one of the most studied and commented-on ISA's in computer history. [2]

VAX was succeeded by the DEC Alpha instruction set architecture.


VAX 8350 front view with cover removed DEC-VAX-8350-front-0a.jpg
VAX 8350 front view with cover removed

The name "VAX" originated as an acronym for virtual address extension, both because the VAX was seen as a 32-bit extension of the older 16-bit PDP-11 and because it was (after Prime Computer) an early adopter of virtual memory to manage this larger address space.

Early versions of the VAX processor implement a "compatibility mode" that emulates many of the PDP-11's instructions, giving it the 11 in VAX-11 to highlight this compatibility. Later versions offloaded the compatibility mode and some of the less used CISC instructions to emulation in the operating system software.

Instruction set

The VAX instruction set was designed to be powerful and orthogonal. [3] When it was introduced, many programs were written in assembly language, so having a "programmer-friendly" instruction set was important. [4] [5] In time, as more programs were written in higher-level language, the instruction set became less visible, and the only ones much concerned about it were compiler writers.

One unusual aspect of the VAX instruction set is the presence of register masks [6] at the start of each subprogram. [3] These are arbitrary bit patterns that specify, when control is passed to the subprogram, which registers are to be preserved. Since register masks are a form of data embedded within the executable code, they can make linear parsing of the machine code difficult. This can complicate optimization techniques that are applied on machine code. [7]

Operating systems

The "native" VAX operating system is Digital's VAX/VMS (renamed to OpenVMS in 1991 or early 1992 when it was ported to Alpha, modified to comply with POSIX standards, and "branded" as compliant with XPG4 by the X/Open consortium). [8]

The VAX architecture and OpenVMS operating system were "engineered concurrently" to take maximum advantage of each other, as was the initial implementation of the VAXcluster facility. Other VAX operating systems have included various releases of BSD UNIX up to 4.3BSD, Ultrix-32, VAXELN, and Xinu. More recently, NetBSD [9] and OpenBSD [10] have supported various VAX models and some work has been done on porting Linux to the VAX architecture. [11] OpenBSD discontinued support for the architecture in September 2016. [12]


K 1840, VAX-11/780 clone, 1988, Technical Collections Dresden Robotron K1840 2.jpg
K 1840, VAX-11/780 clone, 1988, Technical Collections Dresden

The first VAX model sold was the VAX-11/780, which was introduced on October 25, 1977 at the Digital Equipment Corporation's Annual Meeting of Shareholders. [13] Bill Strecker, C. Gordon Bell's doctoral student at Carnegie Mellon University, was responsible for the architecture. [14] Many different models with different prices, performance levels, and capacities were subsequently created. VAX superminicomputers were very popular in the early 1980s.

DEC VAX 11/780-5 computer. VAX780-5-Feb2015.JPG
DEC VAX 11/780-5 computer.

For a while the VAX-11/780 was used as a standard in CPU benchmarks. It was initially described as a one-MIPS machine, because its performance was equivalent to an IBM System/360 that ran at one MIPS, and the System/360 implementations had previously been de facto performance standards. The actual number of instructions executed in 1 second was about 500,000, which led to complaints of marketing exaggeration. The result was the definition of a "VAX MIPS," the speed of a VAX-11/780; a computer performing at 27 VAX MIPS would run the same program roughly 27 times faster than the VAX-11/780.

Within the Digital community the term VUP (VAX Unit of Performance) was the more common term, because MIPS do not compare well across different architectures. The related term cluster VUPs was informally used to describe the aggregate performance of a VAXcluster. (The performance of the VAX-11/780 still serves as the baseline metric in the BRL-CAD Benchmark, a performance analysis suite included in the BRL-CAD solid modeling software distribution.) The VAX-11/780 included a subordinate stand-alone LSI-11 computer that performed microcode load, booting, and diagnostic functions for the parent computer. This was dropped from subsequent VAX models. Enterprising VAX-11/780 users could therefore run three different Digital Equipment Corporation operating systems: VMS on the VAX processor (from the hard drives), and either RSX-11S or RT-11 on the LSI-11 (from the single density single drive floppy disk).

The VAX went through many different implementations. The original VAX 11/780 was implemented in TTL and filled a four-by-five-foot cabinet [15] with a single CPU. CPU implementations that consisted of multiple ECL gate array or macrocell array chips included the VAX 8600 and 8800 superminis and finally the VAX 9000 mainframe class machines. CPU implementations that consisted of multiple MOSFET custom chips included the 8100 and 8200 class machines. The VAX 11-730 and 725 low-end machines were built using bit-slice components.

VAX 11/750 VAX-11-750.jpg
VAX 11/750

The MicroVAX I represented a major transition within the VAX family. At the time of its design, it was not yet possible to implement the full VAX architecture as a single VLSI chip (or even a few VLSI chips as was later done with the V-11 CPU of the VAX 8200/8300). Instead, the MicroVAX I was the first VAX implementation to move some of the more complex VAX instructions (such as the packed decimal and related opcodes) into emulation software. This partitioning substantially reduced the amount of microcode required and was referred to as the "MicroVAX" architecture. In the MicroVAX I, the ALU and registers were implemented as a single gate-array chip while the rest of the machine control was conventional logic.

A full VLSI (microprocessor) implementation of the MicroVAX architecture arrived with the MicroVAX II's 78032 (or DC333) CPU and 78132 (DC335) FPU. The 78032 was the first microprocessor with an on-board memory management unit [16] The MicroVAX II was based on a single, quad-sized processor board which carried the processor chips and ran the MicroVMS or Ultrix-32 operating systems. The machine featured 1 MB of on-board memory and a Q22-bus interface with DMA transfers. The MicroVAX II was succeeded by many further MicroVAX models with much improved performance and memory.

Further VLSI VAX processors followed in the form of the V-11, CVAX, CVAX SOC ("System On Chip", a single-chip CVAX), Rigel, Mariah and NVAX implementations. The VAX microprocessors extended the architecture to inexpensive workstations and later also supplanted the high-end VAX models. This wide range of platforms (mainframe to workstation) using one architecture was unique in the computer industry at that time. Sundry graphics were etched onto the CVAX microprocessor die. The phrase CVAX... when you care enough to steal the very best was etched in broken Russian as a play on a Hallmark Cards slogan, intended as a message to Soviet engineers who were known to be both purloining DEC computers for military applications and reverse engineering their chip design. [17] [18]

In DEC's product offerings, the VAX architecture was eventually superseded by RISC technology. In 1989 DEC introduced a range of workstations and servers that ran Ultrix, the DECstation and DECsystem respectively, based on processors that implemented the MIPS architecture. In 1992 DEC introduced their own RISC instruction set architecture, the Alpha AXP (later renamed Alpha), and their own Alpha-based microprocessor, the DECchip 21064, a high performance 64-bit design capable of running OpenVMS.

In August 2000, Compaq announced that the remaining VAX models would be discontinued by the end of the year. [19] By 2005 all manufacturing of VAX computers had ceased, but old systems remain in widespread use. [20]

The Stromasys CHARON-VAX and SIMH software-based VAX emulators remain available and VMS is now managed by VMS Software Incorporated, although they only offer OpenVMS for Alpha systems and HP Integrity Servers, with x86-64 support being developed, and do not offer it for VAX.

Processor architecture

MicroVAX 3600 (left) with printer (right) Microvax 3600 (2).jpg
MicroVAX 3600 (left) with printer (right)
DEC VAX registers
31. . .23. . .15141312111009080706050403020100(bit position)
General registers
R0Register 0
R1Register 1
R2Register 2
R3Register 3
R4Register 4
R5Register 5
R6Register 6
R7Register 7
R8Register 8
R9Register 9
R10Register 10
R11Register 11
R12 / APRegister 12 / Argument Pointer
R13 / FPRegister 13 / Frame Pointer
R14 / SPRegister 14 / Stack Pointer
R15 / PCRegister 15 / Program Counter
Status flags
N Z V C Condition Code Register
Designer Digital Equipment Corporation
Bits 32 bits
Design CISC
Encoding Variable (1 to 56 bytes)
Branching Condition code
Endianness Little
ExtensionsPDP-11 compatibility mode, VAXvector [21]
General purpose 16 [22]
Floating point uses the GPRs

Virtual memory map

The VAX virtual memory is divided into four sections. Each is one gigabyte (in the context of addressing, 230 bytes) in size:

SectionAddress Range
P00x00000000 - 0x3fffffff
P10x40000000 - 0x7fffffff
S00x80000000 - 0xbfffffff
S10xc0000000 - 0xffffffff

For VMS, P0 was used for user process space, P1 for process stack, S0 for the operating system, and S1 was reserved.

Privilege modes

The VAX has four hardware implemented privilege modes:

No.ModeVMS UsageNotes
0KernelOS KernelHighest Privilege Level
1ExecutiveFile System
2SupervisorShell (DCL)
3UserNormal ProgramsLowest Privilege Level

Processor status register

The Process Status Register had 32 bits:

31PDP-11 compatibility mode
30trace pending
29:28MBZ (must be zero)
27first part done (interrupted instruction)
26interrupt stack
25:24current privilege mode
23:22previous privilege mode
21MBZ (must be zero)
20:16IPL (interrupt priority level)
15:8MBZ (must be zero)
7decimal overflow trap enable
6floating-point underflow trap enable
5integer overflow trap enable

Addressing modes

The SPEC-1 VAX, a VAX 11/780 used for benchmarking, showing internals SPEC-1 VAX 05.jpg
The SPEC-1 VAX, a VAX 11/780 used for benchmarking, showing internals

The VAX supports many addressing modes: literal, register, postincrement, predecrement, register deferred, postincrement deferred, predecrement deferred, displacement (byte, word, long), displacement (byte, word, long) deferred; also indexed, which may be combined with many of these. An "immediate" mode is synonymous with program counter (PC) postincrement, and many addressing modes could use the program counter (which is also R15) instead of other registers. This provided for easy generation of position-independent code through "PC-relative" addressing. The VAX also has some "load effective address" instructions, which do not access memory but compute the address that should be used.

VAX-based systems

The first VAX-based system was the VAX-11/780, a member of the VAX-11 family. The high-end VAX 8600 replaced the VAX-11/780 in October 1984 and was joined by the entry-level MicroVAX minicomputers and the VAXstation workstations in the mid-1980s. The MicroVAX was superseded by the VAX 4000, the VAX 8000 was superseded by the VAX 6000 in the late 1980s and the mainframe-class VAX 9000 was introduced. In the early 1990s, the fault-tolerant VAXft was introduced, as were the Alpha compatible VAX 7000/10000. A variant of various VAX-based systems were sold as the VAXserver.

Canceled systems

Canceled systems include the "BVAX", a high-end ECL-based VAX, and two other ECL-based VAX models: "Argonaut" and "Raven". [23] Raven was canceled in 1990. [24] A VAX known as "Gemini" was also canceled, which was a fall-back in case the LSI-based Scorpio failed. It never shipped.


A number of VAX clones, both authorized and unauthorized, were produced. Examples include:

Related Research Articles

DEC Alpha 64-bit RISC microprocessor

Alpha, originally known as Alpha AXP, is a 64-bit reduced instruction set computing (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC), designed to replace their 32-bit VAX complex instruction set computer (CISC) ISA. Alpha was implemented in microprocessors originally developed and fabricated by DEC. These microprocessors were most prominently used in a variety of DEC workstations and servers, which eventually formed the basis for almost all of their mid-to-upper-scale lineup. Several third-party vendors also produced Alpha systems, including PC form factor motherboards.

Minicomputer Mid-1960s–late-1980s class of smaller computers

A minicomputer, or colloquially mini, is a class of smaller computers that was developed in the mid-1960s and sold for much less than mainframe and mid-size computers from IBM and its direct competitors. In a 1970 survey, The New York Times suggested a consensus definition of a minicomputer as a machine costing less than US$25,000, with an input-output device such as a teleprinter and at least four thousand words of memory, that is capable of running programs in a higher level language, such as Fortran or BASIC.

PDP-11 Series of 16-bit minicomputers

The PDP-11 is a series of 16-bit minicomputers sold by Digital Equipment Corporation (DEC) from 1970 into the 1990s, one of a succession of products in the PDP series. In total, around 600,000 PDP-11s of all models were sold, making it one of DEC's most successful product lines. The PDP-11 is considered by some experts to be the most popular minicomputer ever.

Reduced instruction set computer Computer whose instruction set architecture allows it to have fewer cycles per instruction than a complex instruction set computer

A reduced instruction set computer, or RISC, is a computer instruction set that allows a computer's microprocessor to have fewer cycles per instruction (CPI) than a complex instruction set computer (CISC).

Ultrix is the brand name of Digital Equipment Corporation's (DEC) discontinued native Unix operating systems for the PDP-11, VAX, MicroVAX and DECstations.

PRISM was a 32-bit RISC instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). It was the final outcome of a number of DEC research projects from the 1982–85 time-frame, and was at the point of delivering silicon in 1988 when the management canceled the project. The next year work on the Alpha started, based heavily on the Prism design.

Berkeley RISC is one of two seminal research projects into RISC-based microprocessor design taking place under ARPA's VLSI project. RISC was led by David Patterson at the University of California, Berkeley between 1980 and 1984.

VAXstation family of workstation computers

The VAXstation was a family of workstation computers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA). VAX stood for Virtual Address EXtension.

NVAX microprocessor

The NVAX is a microprocessor developed and fabricated by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). The NVAX was a high-end single-chip VAX microprocessor. A variant of the NVAX, the NVAX+, differed in the bus interface and external cache supported, but was otherwise identical in regards to microarchitecture. The NVAX is clocked at frequencies of 83.3 MHz, 71 MHz and 62.5 MHz, while the NVAX+ is clocked at a frequency of 90.9 MHz.


The CVAX is a microprocessor chip set developed and fabricated by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). The chip set consisted of the CVAX 78034 CPU, CFPA floating-point accelerator, CVAX clock chip, and the associated support chips, the CVAX System Support Chip (CSSC), CVAX Memory Controller (CMCTL), and CVAX Q-Bus Interface Chip (CQBIC).


The VAX-11 is a discontinued family of minicomputers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA), succeeding the PDP-11. The VAX-11/780 is the first VAX computer.

MicroVAX family of low-cost minicomputers

The MicroVAX was a family of low-cost minicomputers developed and manufactured by Digital Equipment Corporation (DEC). The first model, the MicroVAX I, was introduced in 1983. They used processors that implemented the VAX instruction set architecture (ISA) and were succeeded by the VAX 4000.


The V-11, code-named "Scorpio", is a miniprocessor chip set implementation of the VAX instruction set architecture (ISA) developed and fabricated by Digital Equipment Corporation (DEC).

VAX 6000 family of minicomputers

The VAX 6000 was a family of minicomputers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA). Originally, the VAX 6000 was intended to be a mid-range VAX product line complementing the VAX 8000, but with the introduction of the VAX 6000 Model 400 series, the older VAX 8000 was discontinued in favor of the VAX 6000, which offered slightly higher performance for half the cost.

The VAX 7000 and VAX 10000 were a series of high-end multiprocessor minicomputers developed and manufactured by Digital Equipment Corporation (DEC), introduced in July 1992. These systems used microprocessors implementing the VAX instruction set architecture (ISA). These computers ran Digital's OpenVMS operating system.

The VAXft was a family of fault-tolerant minicomputers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA). "VAXft" stood for "Virtual Address Extension, fault tolerant". These systems ran the OpenVMS operating system, and were first supported by VMS 5.4. Two layered software products, VAXft System Services and VMS Volume Shadowing, were required to support the fault-tolerant features of the VAXft and for the redundancy of data stored on hard disk drives.

MicroVAX 78032 microprocessor

The MicroVAX 78032 is a microprocessor developed and fabricated by Digital Equipment Corporation (DEC) that implemented a subset of the VAX instruction set architecture (ISA). The 78032 was used exclusively in DEC's VAX-based systems, starting with the MicroVAX II in 1985. When clocked at a frequency of 5 MHz, the 78032's integer performance is comparable to the VAX-11/780 superminicomputer, which was introduced on 25 October 1977. The microprocessor could be paired with the MicroVAX 78132 floating point accelerator for improved floating point performance. The 78032 represented a number of firsts for DEC. It was DEC's first single-chip microprocessor implementation of the VAX ISA and DEC's first self-fabricated microprocessor. The MicroVAX 78032 is also notable as it was the first semiconductor device to be registered for protection under the Semiconductor Chip Protection Act of 1984.

Rigel (microprocessor)

Rigel was a microprocessor chip set developed and fabricated by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). It was introduced on 11 July 1989 with the introduction of the VAX 6000 Model 400, the first system to feature the chip set. Rigel was also used in the VAX 4000 Model 300 and VAXstation 3100 Model 76. Production Rigel CPUs were rated at 35 to 43 MHz.

The R2000 is a 32-bit microprocessor chip set developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in January 1986, it was the first commercial implementation of the MIPS architecture and the first commercial RISC processor available to all companies. The R2000 competed with Digital Equipment Corporation (DEC) VAX minicomputers and with Motorola 68000 and Intel Corporation 80386 microprocessors. R2000 users included Ardent Computer, DEC, Silicon Graphics, Northern Telecom and MIPS's own Unix workstations.

Since 1985, numerous processors implementing some version of the MIPS architecture have been designed and widely used.


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