# Multiplexer

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In electronics, a multiplexer (or mux) is a device that combines several analog or digital input signals and forwards them into a single output line. [1] A multiplexer of ${\displaystyle 2^{n}}$ inputs has ${\displaystyle n}$ select lines, which are used to select which input line to send to the output. [2] Multiplexers are mainly used to increase the amount of data that can be sent over the network within a certain amount of time and bandwidth. [1] A multiplexer is also called a data selector. Multiplexers can also be used to implement Boolean functions of multiple variables.

Electronics comprises the physics, engineering, technology and applications that deal with the emission, flow and control of electrons in vacuum and matter. The identification of the electron in 1897, along with the invention of the vacuum tube, which could amplify and rectify small electrical signals, inaugurated the field of electronics and the electron age.

An analog signal is any continuous signal for which the time-varying feature (variable) of the signal is a representation of some other time varying quantity, i.e., analogous to another time varying signal. For example, in an analog audio signal, the instantaneous voltage of the signal varies continuously with the pressure of the sound waves. It differs from a digital signal, in which the continuous quantity is a representation of a sequence of discrete values which can only take on one of a finite number of values. The term analog signal usually refers to electrical signals; however, mechanical, pneumatic, hydraulic, human speech, and other systems may also convey or be considered analog signals.

Bandwidth is the difference between the upper and lower frequencies in a continuous band of frequencies. It is typically measured in hertz, and depending on context, may specifically refer to passband bandwidth or baseband bandwidth. Passband bandwidth is the difference between the upper and lower cutoff frequencies of, for example, a band-pass filter, a communication channel, or a signal spectrum. Baseband bandwidth applies to a low-pass filter or baseband signal; the bandwidth is equal to its upper cutoff frequency.

## Contents

An electronic multiplexer makes it possible for several signals to share one device or resource, for example, one A/D converter or one communication line, instead of having one device per input signal.

Conversely, a demultiplexer (or demux) is a device taking a single input signal and selecting one of many data-output-lines, which is connected to the single input. A multiplexer is often used with a complementary demultiplexer on the receiving end. [1]

An electronic multiplexer can be considered as a multiple-input, single-output switch, and a demultiplexer as a single-input, multiple-output switch. [3] The schematic symbol for a multiplexer is an isosceles trapezoid with the longer parallel side containing the input pins and the short parallel side containing the output pin. [4] The schematic on the right shows a 2-to-1 multiplexer on the left and an equivalent switch on the right. The ${\displaystyle sel}$ wire connects the desired input to the output.

In Euclidean geometry, an isosceles trapezoid is a convex quadrilateral with a line of symmetry bisecting one pair of opposite sides. It is a special case of a trapezoid. Alternatively, it can be defined as a trapezoid in which both legs and both base angles are of the same measure. Note that a non-rectangular parallelogram is not an isosceles trapezoid because of the second condition, or because it has no line of symmetry. In any isosceles trapezoid two opposite sides are parallel, and the two other sides are of equal length. The diagonals are also of equal length. The base angles of an isosceles trapezoid are equal in measure.

## Cost saving

One use for multiplexers is economizing connections over a single channel, by connecting the multiplexer's single output to the demultiplexer's single input. The image to the right demonstrates this benefit. In this case, the cost of implementing separate channels for each data source is higher than the cost and inconvenience of providing the multiplexing/demultiplexing functions.

At the receiving end of the data link a complementary demultiplexer is usually required to break the single data stream back down into the original streams. In some cases, the far end system may have functionality greater than a simple demultiplexer; and while the demultiplexing still occurs technically, it may never be implemented discretely. This would be typical when: a multiplexer serves a number of IP network users; and then feeds directly into a router, which immediately reads the content of the entire link into its routing processor; and then does the demultiplexing in memory from where it will be converted directly into IP sections.

In telecommunication a data link is the means of connecting one location to another for the purpose of transmitting and receiving digital information. It can also refer to a set of electronics assemblies, consisting of a transmitter and a receiver and the interconnecting data telecommunication circuit. These are governed by a link protocol enabling digital data to be transferred from a data source to a data sink.

The Internet Protocol (IP) is the principal communications protocol in the Internet protocol suite for relaying datagrams across network boundaries. Its routing function enables internetworking, and essentially establishes the Internet.

A router is a networking device that forwards data packets between computer networks. Routers perform the traffic directing functions on the Internet. Data sent through the internet, such as a web page or email, is in the form of data packets. A packet is typically forwarded from one router to another router through the networks that constitute an internetwork until it reaches its destination node.

Often, a multiplexer and demultiplexer are combined together into a single piece of equipment, which is conveniently referred to as a "multiplexer". Both circuit elements are needed at both ends of a transmission link because most communications systems transmit in both directions.

A duplex communication system is a point-to-point system composed of two or more connected parties or devices that can communicate with one another in both directions. Duplex systems are employed in many communications networks, either to allow for simultaneous communication in both directions between two connected parties or to provide a reverse path for the monitoring and remote adjustment of equipment in the field. There are two types of duplex communication systems: full-duplex (FDX) and half-duplex (HDX).

In analog circuit design, a multiplexer is a special type of analog switch that connects one signal selected from several inputs to a single output.

## Digital multiplexers

In digital circuit design, the selector wires are of digital value. In the case of a 2-to-1 multiplexer, a logic value of 0 would connect ${\displaystyle \scriptstyle I_{0}}$ to the output while a logic value of 1 would connect ${\displaystyle \scriptstyle I_{1}}$ to the output. In larger multiplexers, the number of selector pins is equal to ${\displaystyle \scriptstyle \left\lceil \log _{2}(n)\right\rceil }$ where ${\displaystyle \scriptstyle n}$ is the number of inputs.

For example, 9 to 16 inputs would require no fewer than 4 selector pins and 17 to 32 inputs would require no fewer than 5 selector pins. The binary value expressed on these selector pins determines the selected input pin.

A 2-to-1 multiplexer has a boolean equation where ${\displaystyle \scriptstyle A}$ and ${\displaystyle \scriptstyle B}$ are the two inputs, ${\displaystyle \scriptstyle S}$ is the selector input, and ${\displaystyle \scriptstyle Z}$ is the output:

${\displaystyle Z=(A\cdot {\overline {S}})+(B\cdot S)}$

Which can be expressed as a truth table:

${\displaystyle \scriptstyle S}$${\displaystyle \scriptstyle A}$${\displaystyle \scriptstyle B}$${\displaystyle \scriptstyle Z}$
0000
0010
0101
0111
1000
1011
1100
1111

Or, in simpler notation:

${\displaystyle \scriptstyle S}$${\displaystyle \scriptstyle Z}$
0A
1B

These tables show that when ${\displaystyle \scriptstyle S=0}$ then ${\displaystyle \scriptstyle Z=A}$ but when ${\displaystyle \scriptstyle S=1}$ then ${\displaystyle \scriptstyle Z=B}$. A straightforward realization of this 2-to-1 multiplexer would need 2 AND gates, an OR gate, and a NOT gate. While this is mathematically correct, a direct physical implementation would be prone to race conditions that require additional gates to suppress. [5]

Larger multiplexers are also common and, as stated above, require ${\displaystyle \scriptstyle \left\lceil \log _{2}(n)\right\rceil }$ selector pins for ${\displaystyle n}$ inputs. Other common sizes are 4-to-1, 8-to-1, and 16-to-1. Since digital logic uses binary values, powers of 2 are used (4, 8, 16) to maximally control a number of inputs for the given number of selector inputs.

The boolean equation for a 4-to-1 multiplexer is:

${\displaystyle Z=(A\cdot {\overline {S_{0}}}\cdot {\overline {S_{1}}})+(B\cdot S_{0}\cdot {\overline {S_{1}}})+(C\cdot {\overline {S_{0}}}\cdot S_{1})+(D\cdot S_{0}\cdot S_{1})}$

The following 4-to-1 multiplexer is constructed from 3-state buffers and AND gates (the AND gates are acting as the decoder):

The subscripts on the ${\displaystyle \scriptstyle I_{n}}$ inputs indicate the decimal value of the binary control inputs at which that input is let through.

### Chaining multiplexers

Larger Multiplexers can be constructed by using smaller multiplexers by chaining them together. For example, an 8-to-1 multiplexer can be made with two 4-to-1 and one 2-to-1 multiplexers. The two 4-to-1 multiplexer outputs are fed into the 2-to-1 with the selector pins on the 4-to-1's put in parallel giving a total number of selector inputs to 3, which is equivalent to an 8-to-1.

### List of ICs which provide multiplexing

The 7400 series has several ICs that contain multiplexer(s):

IC No.FunctionOutput State
74157Quad 2:1 mux.Output same as input given
74158Quad 2:1 mux.Output is inverted input
74153Dual 4:1 mux.Output same as input
74352Dual 4:1 mux.Output is inverted input
74151A8:1 mux.Both outputs available (i.e., complementary outputs)
741518:1 mux.Output is inverted input
7415016:1 mux.Output is inverted input

## Digital demultiplexers

Demultiplexers take one data input and a number of selection inputs, and they have several outputs. They forward the data input to one of the outputs depending on the values of the selection inputs. Demultiplexers are sometimes convenient for designing general purpose logic, because if the demultiplexer's input is always true, the demultiplexer acts as a decoder. This means that any function of the selection bits can be constructed by logically OR-ing the correct set of outputs.

If X is the input and S is the selector, and A and B are the outputs:

${\displaystyle A=(X\cdot {\overline {S}})}$

${\displaystyle B=(X\cdot S)}$

### List of ICs which provide demultiplexing

The 7400 series has several ICs that contain demultiplexer(s):

IC No. (7400)IC No. (4000)FunctionOutput State
74139Dual 1:4 demux.Output is inverted input
74156Dual 1:4 demux.Output is open collector
741381:8 demux.Output is inverted input
742381:8 demux.
741541:16 demux.Output is inverted input
74159CD4514/151:16 demux.Output is open collector and same as input

## Multiplexers as PLDs

Multiplexers can also be used as programmable logic devices, specifically to implement Boolean functions. Any Boolean function of n variables and one result can be implemented with a multiplexer with n selector inputs. The variables are connected to the selector inputs, and the function result, 0 or 1, for each possible combination of selector inputs is connected to the corresponding data input. This is especially useful in situations when cost is a factor, for modularity, and for ease of modification. If one of the variables (for example, D) is also available inverted, a multiplexer with n-1 selector inputs is sufficient; the data inputs are connected to 0, 1, D, or ~D, according to the desired output for each combination of the selector inputs. [6]

## Related Research Articles

In digital circuit theory, combinational logic is a type of digital logic which is implemented by Boolean circuits, where the output is a pure function of the present input only. This is in contrast to sequential logic, in which the output depends not only on the present input but also on the history of the input. In other words, sequential logic has memory while combinational logic does not.

In digital logic, an inverter or NOT gate is a logic gate which implements logical negation. The truth table is shown on the right.

Exclusive or or exclusive disjunction is a logical operation that outputs true only when inputs differ.

In digital electronics, a binary decoder is a combinational logic circuit that converts binary information from the n coded inputs to a maximum of 2n unique outputs. They are used in a wide variety of applications, including data demultiplexing, seven segment displays, and memory address decoding.

In signal processing, a finite impulse response (FIR) filter is a filter whose impulse response is of finite duration, because it settles to zero in finite time. This is in contrast to infinite impulse response (IIR) filters, which may have internal feedback and may continue to respond indefinitely.

In logic, a truth function is a function that accepts truth values as input and produces a truth value as output, i.e., the input and output are all truth values. The typical example is in propositional logic, wherein a compound statement is constructed by one or two statements connected by a logical connective; if the truth value of the compound statement is determined by the truth value(s) of the constituent statement(s), the compound statement is called a truth function, and the logical connective is said to be truth functional.

In Boolean algebra, any Boolean function can be put into the canonical disjunctive normal form (CDNF) or minterm canonical form and its dual canonical conjunctive normal form (CCNF) or maxterm canonical form. Other canonical forms include the complete sum of prime implicants or Blake canonical form, and the algebraic normal form.

In digital signal processing, downsampling and decimation are terms associated with the process of resampling in a multi-rate digital signal processing system. Both terms are used by various authors to describe the entire process, which includes lowpass filtering, or just the part of the process that does not include filtering.  When downsampling (decimation) is performed on a sequence of samples of a signal or other continuous function, it produces an approximation of the sequence that would have been obtained by sampling the signal at a lower rate. The decimation factor is usually an integer or a rational fraction greater than one. This factor multiplies the sampling interval or, equivalently, divides the sampling rate. For example, if compact disc audio at 44,100 samples/second is decimated by a factor of 5/4, the resulting sample rate is 35,280. A system component that performs decimation is called a decimator.

The AND gate is a basic digital logic gate that implements logical conjunction - it behaves according to the truth table to the right. A HIGH output (1) results only if all the inputs to the AND gate are HIGH (1). If none or not all inputs to the AND gate are HIGH, a LOW output results. The function can be extended to any number of inputs.

In digital electronics, a NAND gate (NOT-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. A NAND gate is made using transistors and junction diodes. By De Morgan's theorem, a two-input NAND gate's logic may be expressed as AB=A+B, making a NAND gate equivalent to inverters followed by an OR gate.

A carry-skip adder is an adder implementation that improves on the delay of a ripple-carry adder with little effort compared to other adders. The improvement of the worst-case delay is achieved by using several carry-skip adders to form a block-carry-skip adder.

XOR gate is a digital logic gate that gives a true output when the number of true inputs is odd. An XOR gate implements an exclusive or; that is, a true output results if one, and only one, of the inputs to the gate is true. If both inputs are false (0/LOW) or both are true, a false output results. XOR represents the inequality function, i.e., the output is true if the inputs are not alike otherwise the output is false. A way to remember XOR is "one or the other but not both".

Because the NAND function has functional completeness all logic systems can be converted into NAND gates – the mathematical proof for this was published by Henry M. Sheffer in 1913 in the Transactions of the American Mathematical Society. This is also true for NOR gates. In principle, any combinatorial logic function can be realized with enough NAND gates.

The XNOR gate is a digital logic gate whose function is the logical complement of the exclusive OR (XOR) gate. The two-input version implements logical equality, behaving according to the truth table to the right, and hence the gate is sometimes called an "equivalence gate". A high output (1) results if both of the inputs to the gate are the same. If one but not both inputs are high (1), a low output (0) results. The algebraic notation used to represent the XNOR operation is .

In logic, a functionally complete set of logical connectives or Boolean operators is one which can be used to express all possible truth tables by combining members of the set into a Boolean expression. A well-known complete set of connectives is { AND, NOT }, consisting of binary conjunction and negation. Each of the singleton sets { NAND } and { NOR } is functionally complete.

In computational complexity theory and circuit complexity, a Boolean circuit is a mathematical model for digital logic circuits. A formal language can be decided by a family of Boolean circuits, one circuit for each possible input length. Boolean circuits are also used as a formal model for combinational logic in digital electronics.

In electronics, a subtractor can be designed using the same approach as that of an adder. The binary subtraction process is summarized below. As with an adder, in the general case of calculations on multi-bit numbers, three bits are involved in performing the subtraction for each bit of the difference: the minuend, subtrahend, and a borrow in from the previous bit order position. The outputs are the difference bit and borrow bit . The subtractor is best understood by considering that the subtrahend and both borrow bits have negative weights, whereas the X and D bits are positive. The operation performed by the subtractor is to rewrite as the sum .

In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems.

The Tseytin transformation, alternatively written Tseitin transformation takes as input an arbitrary combinatorial logic circuit and produces a boolean formula in conjunctive normal form (CNF), which can be solved by a CNF-SAT solver. The length of the formula is linear in the size of the circuit. Input vectors that make the circuit output "true" are in 1-to-1 correspondence with assignments that satisfy the formula. This reduces the problem of circuit satisfiability on any circuit to the satisfiability problem on 3-CNF formulas.

The memory cell is the fundamental building block of computer memory. The memory cell is an electronic circuit that stores one bit of binary information and it must be set to store a logic 1 and reset to store a logic 0. Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.

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