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The PowerPC 7xx is a family of third generation 32-bit PowerPC microprocessors designed and manufactured by IBM and Motorola (spun off as Freescale Semiconductor bought by NXP Semiconductors). This family is called the PowerPC G3 by Apple Computer (later Apple Inc.), which introduced it on November 10, 1997. A number of microprocessors from different vendors have been used under the "PowerPC G3" name. Such designations were applied to Mac computers such as the PowerBook G3, the multicolored iMacs, iBooks and several desktops, including both the Beige and Blue and White Power Macintosh G3s. The low power requirements and small size made the processors ideal for laptops and the name lived out its last days at Apple in the iBook.
The 7xx family is also widely used in embedded devices like printers, routers, storage devices, spacecraft, [1] and video game consoles. The 7xx family had its shortcomings, namely lack of SMP support and SIMD capabilities and a relatively weak FPU. Motorola's 74xx range of processors picked up where the 7xx left off.
PowerPC 7xx processors have largely been manufactured in the range of 250nm to 100nm lithography.
The PowerPC 740 and 750 (codename Arthur) [2] were introduced in late 1997 as an evolutionary replacement for the PowerPC 603e. Enhancements included a faster 60x system bus (66 MHz), larger L1 caches (32 KB instruction and 32 KB data), a second integer unit, an enhanced floating point unit, and higher core frequency. The 750 had support for an optional 256, 512 or 1024 KB external unified L2 cache. The cache controller and cache tags are on-die. The cache was accessed via a dedicated 64-bit bus.
The 740 and 750 added dynamic branch prediction and a 64-entry branch target instruction cache (BTIC). Dynamic branch prediction uses the recorded outcome of a branch stored in a 512-entry by 2-bit branch history table (BHT) to predict its outcome. The BTIC caches the first two instructions at a branch target.
The 740/750 models had 6.35 million transistors and were initially manufactured by IBM and Motorola in an aluminium based fabrication process. The die measured 67 mm2 at 0.26 μm and it reached speeds of up to 366 MHz while consuming 7.3 W.
In 1999, IBM fabricated versions in a 0.20 μm process with copper interconnects, which increased the frequency up to 500 MHz and decreased power consumption to 6 W and the die size to 40 mm2.
The 740 slightly outperformed the Pentium II while consuming far less power and with a smaller die. The off-die L2 cache of the 750 increased performance by approximately 30% in most situations. The design was so successful that it quickly surpassed the PowerPC 604e in integer performance, causing a planned 604 successor to be scrapped.
The PowerPC 740 is completely pin compatible with the older 603, allowing upgrades to the PowerBook 1400, 2400, and even a prototype PowerBook 500/G3. The 750 with its L2 cache bus required more pins and thus a different package, a 360-pin ball grid array (BGA).
The PowerPC 750 was used in many computers from Apple, including the original iMac.
The RAD750 is a radiation-hardened processor, based on the PowerPC 750. It is intended for use in high radiation environments such as experienced on board satellites and other spacecraft. The RAD750 was released for purchase in 2001. The Mars Science Laboratory (Curiosity), Mars Reconnaissance Orbiter, Mars 2020 (Perseverance) and James Webb Space Telescope spacecraft have a RAD750 on board. [3] [4]
The processor has 10.4 million transistors, is manufactured by BAE Systems using either 250 or 150 nm process and has a die area of 130 mm2. It operates at 110 to 200 MHz. The CPU itself can withstand 200,000 to 1,000,000 Rads and temperature ranges between −55 and 125 °C. The RAD750 packaging and logic functions has a price tag in excess of US$200,000 [ citation needed ]: the high price is mainly due to radiation hardening revisions to the PowerPC 750 architecture and manufacturing, stringent quality control requirements, and extended testing of each processor chip manufactured.
Motorola revised the 740/750 design in 1998 and shrunk die size to 51 mm2 thanks to a newer aluminium based fabrication at 0.22 μm. The speeds increased to up to 600 MHz. The 755 was used in some iBook models. After this model, Motorola chose not to keep developing the 750 processors in favour of their PowerPC 7400 processor and other cores.
IBM continued to develop the PowerPC 750 line and introduced the PowerPC 750CX (code-named Sidewinder) in 2000. It has a 256 KiB on-die L2 cache; this increased performance while reducing power consumption and complexity. At 400 MHz, it drew under 4 W. The 750CX had 20 million transistors including its L2 cache. It had a die size of 43 mm2 through a 0.18 μm copper process. The 750CX was only used in one iMac and iBook revision.
750CXe (codename Anaconda), introduced in 2001, is a minor revision of 750CX to increase its clock speed to 700 MHz and memory bus from 100 MHz to 133 MHz. The 750CXe also features improved floating-point performance over the 750CX. [5] Several iBook models and the last G3-based iMac have this processor.
A cost reduced version of 750CXe, called 750CXr, has lower frequencies.
Gekko is the IBM's custom central processor for the Nintendo GameCube game console. Based on a PowerPC 750CXe, it adds about 50 new instructions and a modified FPU capable of some SIMD functionality. It has 256 KiB of on die L2 cache, operates at 486 MHz with a 162 MHz memory bus, is fabricated by IBM on a 180 nm process. The die size is 43 mm2.
The 750FX (code-named Sahara) came in 2002 and increased frequency up to 900 MHz, the bus speed to 166 MHz and the on-die L2 cache to 512 KiB. It also featured a number of improvements to the memory subsystem: an enhanced and faster (200 MHz) 60x bus controller, a wider L2 cache bus, and the ability to lock parts of the L2 cache. [5] It is manufactured using a 0.13 μm copper based fabrication with Low-K dielectric and Silicon on insulator technology. 750FX has 39 million transistors, a die size of 35 mm2 and consumes less than 4 W at 800 MHz at typical loads. It was the last G3 type processor used by Apple (employed on the iBook G3).
A low powered version of 750FX is available called 750FL.
750FX powers NASA's Orion Multi-Purpose Crew Vehicle. [6] Orion is using Honeywell International Inc. flight computer originally built for Boeing's 787 jet airliner.
750GX (codenamed Gobi), revealed in 2004, was a 7xx processor from IBM. It has an on-die 1 MB L2 cache, a top frequency of 1.1 GHz, and support for bus speeds up to 200 MHz among other enhancements compared to 750FX. It is manufactured using a 0.13 μm process with copper interconnects, low-K dielectric, and silicon on insulator technology. The 750GX has 44 million transistors, a die size of 52 mm2 and consumes less than 9 W at 1 GHz at typical loads.
A low-power version of the 750GX is available, called the 750GL.
750VX (codenamed "Mojave") is a rumored, not confirmed and canceled version of the 7xx line. It would be the most powerful and featured version to date with up to 4MB of off die L3 cache, a 400Mhz DDR front side bus and the same implementation of AltiVec used in the PowerPC 970. It was expected to clock as high as 1.8 GHz (starting at 1.5 GHz) and reported to have additional pipeline stages, and advanced power management features. [7] It was reported to be finished and ready for production in December 2003, but said timing was too late for it to get significant orders seeing Apple's iBook line had switched to G4s in October the same year, and thus it quickly fell off the roadmap. It was never released or heard from since.
There were follow up chips planned, such the 750VXe, which would have surpassed 2 GHz.
The 750CL is an evolved 750CXe, with speeds ranging from 400 MHz to 1 GHz with a system bus up to 240 MHz, L2 cache prefetch features and graphics related instructions have been added to improve performance. As the added graphics-related functions match closely the ones found in the Gekko processor it is very likely that the 750CL is a shrink of the same processor for general purpose use. The 750CL is manufactured using a 90 nm copper based fabrication with Low-K dielectric and Silicon on insulator technology and features 20 million transistors on a 16 mm2 die. It draws up to 2.7 W at 600 MHz, 9.8 W at 1 GHz. [8] [9]
The CPU in Wii is virtually identical to the 750CL but it runs at 729 MHz, a frequency not supported by stock 750CL. It measures only 4.2 x 4.5 mm (18.9 mm2). This is smaller than half the size of the "Gekko" microprocessor (43 mm2) incorporated in the GameCube at its first release. [10]
The CPU in Wii U is believed to be an evolution of the Broadway architecture. The largely unconfirmed characteristics are a triple core CPU which runs at 1.24 GHz and a 45 nm process.
IBM has ceased to publish a roadmap to the 750 family, in favor of marketing themselves as a custom processor vendor. Given IBM's resources, the 750 core will be produced with new features as long as there is a willing buyer. In particular, IBM has no public plans to produce an ordinary 750-based microprocessor in a process smaller than 90 nm, effectively phasing it out as a commodity chip competitive in such markets as networking equipment. However IBM did make the Espresso processor for Nintendo, which is a 750 based design with improvements such as multiprocessor support (the part is a triple core), new 45 nm fabrication process and eDRAM instead of regular L2 cache; it's unknown if further changes were made to the design.
In 2015 Rochester Electronics started providing legacy support for the devices.
Freescale has discontinued all 750 designs in favor of designs based on the PowerPC e500 core (PowerQUICC III).
This list is a complete list of known 750 based designs. The pictures are illustrations and not to scale.
Name | Codename | Manufacturer | Image | Fab Process | Transistors | Die size | Cores | CPU Clock | Front Side Bus | L2 cache | Consumption | Package | Multipliers | Introduced |
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PPC740 MPC740 | Arthur | IBM Motorola | 0.25 μm Al | 6.35 Million | 67 mm2 | 1 | 233 - 366 MHz | 66 MHz | No L2 cache | 5.6W @ 233 MHz 7.3W @ 300 MHz | 255 pin CBGA | 3-8 | 1997 | |
PPC750 MPC750 | Arthur | IBM Motorola | 0.25 μm Al | 6.35 Million | 67 mm2 | 1 | 233 - 366 MHz | 66 MHz | 256 - 1024 kB off-die half speed | 5.6W @ 233 MHz 7.3W @ 300 MHz | 360 pin CBGA | 3-8 | 1997 | |
MPC745 | Conan | Motorola Freescale | 0.22 μm Al | 6.75 Million | 51 mm2 | 1 | 300 - 350 MHz | 66 MHz | No L2 cache | 3.1W @ 300 MHz 5.4W @ 400 MHz [11] | 255 pin PBGA | 2, 3-8, 10 | 1998 | |
MPC755 | Doyle | Motorola Freescale | 0.22 μm Al | 6.75 Million | 51 mm2 | 1 | 300 - 400 MHz | 66 MHz | 256 - 1024 kB off-die half speed | 3.1W @ 300 MHz 5.4W @ 400 MHz [11] | 360 pin PBGA 360 pin CBGA | 2, 3-8, 10 | 1998 | |
PPC740L | Lonestar | IBM | 0.20 μm Cu | 6.35 Million | 40 mm2 | 1 | 300 - 533 MHz | 100 MHz | No L2 cache | 4.1W @ 333 MHz 6.0W @ 500 MHz | 255 pin CBGA | 3-8 10 (dd3.x) | 1999 | |
PPC750L | Lonestar | IBM | 0.20 μm Cu | 6.35 Million | 40 mm2 | 1 | 300 - 533 MHz [12] | 100 MHz | 256 - 1024 kB off-die half speed | 4.1W @ 333 MHz 6.0W @ 500 MHz [13] | 360 pin CBGA | 3-8 10 (dd3.x) | 1999 | |
PPC750CX PPC750CXe PPC750CXr PPCDBK | Sidewinder Anaconda Gekko | IBM | 0.18 μm Cu | 20 Million (including L2 cache) | 42.7 mm2 | 1 | 350 - 600 MHz 366 - 700 MHz 300 - 533 MHz 486 MHz | 100 MHz 133 MHz 133 MHz 162 MHz | 256 kB | 4.2W @ 400 MHz [14] 6 W @ 600 MHz [15] 7.8 W @ 533 MHz [16] 4.9W @ 486 MHz | 256 pin PBGA | 2000 2001 2003 2000 | ||
RAD750 | BAE Systems | 0.25 μm - 0.15 μm | 10.4 Million | 130 mm2 | 1 | 110 - 200 MHz | 66 MHz [17] | 0 - 1024 kB off-die | 5 W @ 133 MHz [18] | 360 pin CBGA Radiation hardened | 2001 | |||
PPC750FX PPC750FL | Sahara | IBM | 0.13 μm SOI | 38 Million (including L2 cache) | 34.3 mm2 | 1 | 600 - 900 MHz 600 - 733 MHz | 166 MHz | 512 kB | 5.4 W @ 800 MHz [19] 5.1 W @ 733 MHz [20] | 292 pin CBGA | 3.5-9.5 10-20 | 2002 2007 | |
PPC750GX PPC750GL | Gobi | IBM | 0.13 μm SOI | 74 Million (including L2 cache) | 52.5 mm2 | 1 | 733 - 1000 MHz 800 - 933 MHz | 200 MHz | 1024 kB | 8.3W @ 1 GHz [21] 6.5W @ 933 MHz [22] | 292 pin CBGA | 2-3.5 4-9.5 10-20 | 2003 2005 | |
PPC750CL Broadway | IBM | 90 nm 90 nm, 65 nm SOI | 20 Million (including L2 cache) | 15.9 mm2 | 1 | 400 - 1000 MHz 729 MHz | 240 MHz 243 MHz | 256 kB | 10.5 W (max) @ 1 GHz [23] 3.9 W @ 729 MHz [24] | 278 pin PBGA | 2006 | |||
Espresso | IBM | 45 nm SOI | 60 Million (?) | 27.7mm2 | 3 | 1243 MHz 1243 MHz 1243 MHz | ? | 512 kB 2048 kB 512 kB | ? | PBGA MCM | 2012 |
PowerPC is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple–IBM–Motorola alliance, known as AIM. PowerPC, as an evolving instruction set, has been named Power ISA since 2006, while the old name lives on as a trademark for some implementations of Power Architecture–based processors.
The IBM RS64 is a family of microprocessors introduced in the mid 1990s, and used in IBM's RS/6000 and AS/400 servers.
The PowerPC 970, PowerPC 970FX, and PowerPC 970MP are 64-bit PowerPC CPUs from IBM introduced in 2002. Apple branded the 970 as PowerPC G5 for its Power Mac G5.
PowerPC G4 is a designation formerly used by Apple to describe a fourth generation of 32-bit PowerPC microprocessors. Apple has applied this name to various processor models from Freescale, a former part of Motorola. Motorola and Freescale's proper name of this family of processors is PowerPC 74xx.
The POWER5 is a microprocessor developed and fabricated by IBM. It is an improved version of the POWER4. The principal improvements are support for simultaneous multithreading (SMT) and an on-die memory controller. The POWER5 is a dual-core microprocessor, with each core supporting one physical thread and two logical threads, for a total of two physical threads and four logical threads.
SPARC64 is a microprocessor developed by HAL Computer Systems and fabricated by Fujitsu. It implements the SPARC V9 instruction set architecture (ISA), the first microprocessor to do so. SPARC64 was HAL's first microprocessor and was the first in the SPARC64 brand. It operates at 101 and 118 MHz. The SPARC64 was used exclusively by Fujitsu in their systems; the first systems, the Fujitsu HALstation Model 330 and Model 350 workstations, were formally announced in September 1995 and were introduced in October 1995, two years late. It was succeeded by the SPARC64 II in 1996.
The POWER4 is a microprocessor developed by International Business Machines (IBM) that implemented the 64-bit PowerPC and PowerPC AS instruction set architectures. Released in 2001, the POWER4 succeeded the POWER3 and RS64 microprocessors, enabling RS/6000 and eServer iSeries models of AS/400 computer servers to run on the same processor, as a step toward converging the two lines. The POWER4 was a multicore microprocessor, with two cores on a single die, the first non-embedded microprocessor to do so. POWER4 Chip was first commercially available multiprocessor chip. The original POWER4 had a clock speed of 1.1 and 1.3 GHz, while an enhanced version, the POWER4+, reached a clock speed of 1.9 GHz. The PowerPC 970 is a derivative of the POWER4.
The RAD750 is a radiation-hardened single-board computer manufactured by BAE Systems Electronics, Intelligence & Support. The successor of the RAD6000, the RAD750 is for use in high-radiation environments experienced on board satellites and spacecraft. The RAD750 was released in 2001, with the first units launched into space in 2005.
The megahertz myth, or in more recent cases the gigahertz myth, refers to the misconception of only using clock rate to compare the performance of different microprocessors. While clock rates are a valid way of comparing the performance of different speeds of the same model and type of processor, other factors such as an amount of execution units, pipeline depth, cache hierarchy, branch prediction, and instruction sets can greatly affect the performance when considering different processors. For example, one processor may take two clock cycles to add two numbers and another clock cycle to multiply by a third number, whereas another processor may do the same calculation in two clock cycles. Comparisons between different types of processors are difficult because performance varies depending on the type of task. A benchmark is a more thorough way of measuring and comparing computer performance.
The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture (ISA), including all of the optional instructions of the ISA such as instructions present in the POWER2 version of the POWER ISA but not in the PowerPC ISA. It was introduced on 5 October 1998, debuting in the RS/6000 43P Model 260, a high-end graphics workstation. The POWER3 was originally supposed to be called the PowerPC 630 but was renamed, probably to differentiate the server-oriented POWER processors it replaced from the more consumer-oriented 32-bit PowerPCs. The POWER3 was the successor of the P2SC derivative of the POWER2 and completed IBM's long-delayed transition from POWER to PowerPC, which was originally scheduled to conclude in 1995. The POWER3 was used in IBM RS/6000 servers and workstations at 200 MHz. It competed with the Digital Equipment Corporation (DEC) Alpha 21264 and the Hewlett-Packard (HP) PA-8500.
The R5000 is a 64-bit, bi-endian, superscalar, in-order execution 2-issue design microprocessor that implements the MIPS IV instruction set architecture (ISA) developed by Quantum Effect Design (QED) in 1996. The project was funded by MIPS Technologies, Inc (MTI), also the licensor. MTI then licensed the design to Integrated Device Technology (IDT), NEC, NKK, and Toshiba. The R5000 succeeded the QED R4600 and R4700 as their flagship high-end embedded microprocessor. IDT marketed its version of the R5000 as the 79RV5000, NEC as VR5000, NKK as the NR5000, and Toshiba as the TX5000. The R5000 was sold to PMC-Sierra when the company acquired QED. Derivatives of the R5000 are still in production today for embedded systems.
The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620.
Gekko is a superscalar out-of-order 32-bit PowerPC microprocessor custom-made by IBM in 2000 for Nintendo to use as the CPU in their sixth generation game console, the GameCube, and later the Triforce Arcade Board.
The Alpha 21364, code-named "Marvel", also known as EV7 is a microprocessor developed by Digital Equipment Corporation (DEC), later Compaq Computer Corporation, that implemented the Alpha instruction set architecture (ISA).
The SPARC64 V (Zeus) is a SPARC V9 microprocessor designed by Fujitsu. The SPARC64 V was the basis for a series of successive processors designed for servers, and later, supercomputers.
The UltraSPARC III, code-named "Cheetah", is a microprocessor that implements the SPARC V9 instruction set architecture (ISA) developed by Sun Microsystems and fabricated by Texas Instruments. It was introduced in 2001 and operates at 600 to 900 MHz. It was succeeded by the UltraSPARC IV in 2004. Gary Lauterbach was the chief architect.
The UltraSPARC II, code-named "Blackbird", is a microprocessor implementation of the SPARC V9 instruction set architecture (ISA) developed by Sun Microsystems. Marc Tremblay was the chief architect. Introduced in 1997, it was further development of the UltraSPARC operating at higher clock frequencies of 250 MHz, eventually reaching 650 MHz.
Espresso is the codename of the 32-bit central processing unit (CPU) used in Nintendo's Wii U video game console. It was designed by IBM, and was produced using a 45 nm silicon-on-insulator process. The Espresso chip resides together with a GPU from AMD on an MCM manufactured by Renesas. It was revealed at E3 2011 in June 2011 and released in November 2012.