Feature levels in Direct3D define strict sets of features required by certain versions of the Direct3D API and runtime, as well as additional optional feature levels available within the same API version.
Feature levels encapsulate hardware-specific capabilities that exist on top of common mandatory requirements and features in a particular version of the API. The levels are grouped in strict supersets of each other, so each higher level includes all features required on every lower level.
Some feature levels include previously optional hardware features which are promoted to a mandatory status with new revisions of the API to better expose newer hardware. More advanced features such as new shader models and rendering stages are only exposed on up-level hardware, [1] [2] however the hardware is not required to support all of these feature levels [3] and the Direct3D runtime will make the necessary translations.
Feature levels allow developers to unify the rendering pipeline and use a single version of the API on both newer and older hardware, taking advantage of performance and usability improvements in the newer runtime. [4]
Separate capabilities exist to indicate support for specific texture operations and resource formats; these are usually specified per each texture format using a combination of capability flags, but some of these optional features are promoted to mandatory on upper feature levels. [5]
Direct3D 10 introduced a fixed set of mandatory requirements for the graphics hardware. Before Direct3D 10, new versions of the API introduced support for new hardware capabilities, however these capabilities were optional and had to be queried with "capability bits" or "caps".
Direct3D 10.1 was the first to use a concept of "feature levels" [1] [3] [6] to support both Direct3D 10.0 and 10.1 hardware. [3] [7] [8]
In Direct3D 11, the concept of feature levels has been further expanded to run on most downlevel hardware including Direct3D 9 cards with WDDM drivers.
There are seven feature levels provided by D3D_FEATURE_LEVEL
structure; levels 9_1, 9_2 and 9_3 (collectively known as Direct3D 10 Level 9) re-encapsulate various features of popular Direct3D 9 cards conforming to Shader Model 2.0, while levels 10_0, 10_1, 11_0 and 11_1 refer to respective versions of the Direct3D API. [1] "10 Level 9" feature levels contain a subset of the Direct3D 10/11 API [9] and require shaders to be written in HLSL conforming to Shader Model 4.0 4_0_LEVEL_9_x
compiler profiles, and not in the actual "shader assembly" language [10] of Shader Model 1.1/2.0; SM 3.0 (vs_3_0
/ps_3_0
) has been omitted deliberately in Direct3D 10 Level 9. [3]
Since Direct3D 11.1 for Windows 8, some mandatory features introduced for level 11_1 are available as optional on levels 10_0, 10_1 and 11_0 - these features can be checked individually via CheckFeatureSupport
function [11] however feature level 11_1 and optional features are not available in Direct3D 11.1 for Windows 7 platform update [12] because it does not support WDDM 1.2. [13]
Direct3D 11.2 for Windows 8.1 adds optional mappable buffers and optional tiled resources for levels 11_0 and 11_1; these features require WDDM 1.3 drivers. [14]
Direct3D 11.3 for Windows 10 requires WDDM 2.0 drivers; it adds more optional features and levels 12_0 and 12_1 from Direct3D 12.
Required features | Optional features | GPUs supporting as a maximum feature level | |||||
---|---|---|---|---|---|---|---|
Feature level | Direct3D runtime | Driver model | Features | Direct3D runtime | Driver model | Features | |
9_1 | 11.0 | WDDM 1.0 | Shader Model 2.0 (vs_2_0 /ps_2_0 ), 2K textures, volume textures, event queries, BC1-3 (a.k.a. DXTn), a few other specific capabilities. | — | Nvidia GeForce FX; Intel GMA 950/3100 (945G/965G/G31/G33 chipset); Tegra 3, Tegra 4 | ||
9_2 | Occlusion queries, floating-point formats (no blending), extended caps, all 9_1 features. | ATI Radeon 9800/9700/9600/9500 | |||||
9_3 | vs_2_a /ps_2_x with instancing and additional shader caps, 4K textures, multiple render targets (4 MRTs), floating-point blending (limited), all 9_2 features. | ATI Radeon X800/X700, X1900/X1800/X1600/X1300; Nvidia GeForce 6, 7 series; Adreno 220/300 series; Mali-T 6xx/720/820/830, [15] Mali-G51; Matrox M-series; Vivante GC2000 series onwards [16] | |||||
10_0 | 10.0 | Shader Model 4.0, geometry shader, stream out, alpha-to-coverage, 8K textures, MSAA textures, 2-sided stencil, general render target views, texture arrays, BC4/BC5, full floating-point format support, all 9_3 features. | ATI Radeon HD2000 series; Nvidia GeForce 8/9/GTX 200 series; Intel GMA X3500-X4500 (G35/G41/G43/G45 chipset) | ||||
10_1 | 10.1 | Shader Model 4.1, cubemap arrays, extended MSAA, all 10_0 features. | ATI Radeon HD 3000/4000 series; Nvidia GT 205-240/GT 300 series; Intel HD Graphics (Arrandale/Clarkdale CPUs), Intel HD Graphics 3000/2000 (Sandy Bridge) | ||||
11_0 | 11.0 | WDDM 1.1 | Shader Model 5.0, hull & domain shaders, DirectCompute (CS 5.0), 16K textures, BC6H/BC7, extended pixel formats, all 10_1 features. | 11.1 | WDDM 1.2 [11] | 10_x: DirectCompute (CS 4.0/CS 4.1), extended pixel formats, logical blend operations. 11_0: UAV only rendering with force sample count, constant buffer offsetting and partial updates, double precision (64-bit) floating point operations, minimum floating point precision (10 or 16 bit). | AMD Radeon HD 5000/6000/7300-7600/8300-8400, R5 210-235 series (Terascale 2), HD 6900 (Terascale 3); Nvidia GeForce GTX 400/500 series (Fermi); |
11.2 | WDDM 1.3 | 11_x: Tiled resources (two tiers), min/max filtering | Nvidia GeForce GTX 600/700/Titan series (Kepler), GTX 745/750 series (Maxwell, 1st gen) | ||||
11_1 | 11.1 | WDDM 1.2 | Logical blend operations, target-independent rasterization, UAVs at every pipeline stage with increased slot count, UAV only rendering with force sample count, constant buffer offsetting and partial updates, all 11_0 features. | 11.3 | WDDM 2.0 | 11_x/12_x: Conservative rasterization (three tiers), [17] tiled resources (four tiers), stencil reference value from Pixel Shader, rasterizer ordered views, typed UAV loads for additional formats, UMA/hUMA support [18] | Mali-T 760/860/880, Mali-G71/72; Adreno 400 series; AMD HD 7700-7900/8500-8900, Rx 240/250/265/270/280, Rx 330/340/350/370, R5/R7 400 series (GCN1); |
12_0 | 11.3 | WDDM 2.0 | Tiled Resources Tier 2 (Texture2D), Typed UAV Loads (additional formats). | AMD HD 7790/8770, Rx 260/290, Rx 360/390, R7 455 series, Xbox One (GCN2), R9 285/380, Fury/Nano series (GCN3), RX 460-480, RX 500 series (GCN4) | |||
12_1 | Conservative Rasterization Tier 1, Rasterizer Ordered Views. | Adreno 500/600 series; Nvidia GeForce 900/Titan series (Maxwell, 2nd gen); [19] [20] [21] [22] [23] GeForce 10 series (Pascal), GeForce 20 series (Turing); | |||||
Feature level | Direct3D runtime | Driver model | Features | Direct3D runtime | Driver model | Features | GPUs supporting as a maximum feature level |
Required features | Optional features |
Direct3D 12 requires graphics hardware conforming to feature levels 11_0 and 11_1 which support virtual memory address translations. [25] [26]
There are two new feature levels, 12_0 and 12_1, which include some features that are optional on levels 11_0 and 11_1. [27] Due to the restructuring of the API, some previously optional features are realigned as baseline on levels 11_0 and 11_1.
Direct3D 12 from Windows 10 Anniversary update (version 1607) includes Shader Model 6.0, [28] which requires WDDM 2.1 drivers, and new DXIL compiler based on LLVM. [29] Windows 10 Creators Update versions 1703 and 1709 include Shader Model 6.1 and WDDM 2.2/2.3.
Level | Driver model | Required features | Optional features | GPUs supporting as a maximum feature level |
---|---|---|---|---|
11_0 | WDDM 2.0 | All mandatory 11_0 features from Direct3D 11, Shader Model 5.1, Resource binding Tier 1. UAVs at every pipeline stage, UAV only rendering with force sample count, constant buffer offsetting and partial updates. | Resource binding (three tiers), tiled resources (four tiers), conservative rasterization (three tiers), stencil reference value from Pixel Shader, rasterizer ordered views, typed UAV loads for additional formats, UMA/hUMA support, view instancing. Logical blend operations, double precision (64-bit) floating point operations, minimum floating point precision (10 or 16 bit). Shader Model 6.0-6.7 Metacommands, variable shading rate, raytracing, mesh shaders, sampler feedback. Other optional features defined by D3D_FEATURE structures. [30] | Nvidia GeForce GTX 400/500 series (Fermi), GeForce GTX 600/700/Titan series (Kepler), GTX 745/750 series (Maxwell, 1st gen) |
11_1 | Logical blend operations, target-independent rasterization, increased UAV slot count. | Mali-G71/72; AMD HD 7700-7900/8500-8900, Rx 240/250/265/270/280, Rx 330/340/350/370, R5/R7 400 series (GCN1); | ||
12_0 | WDDM 2.0 | Resource Binding Tier 2, Tiled Resources Tier 2 (Texture2D), Typed UAV Loads (additional formats) | AMD HD 7790/8770, Rx 260/290, Rx 360/390, R7 455 series, Xbox One (GCN2), R9 285/380, Fury/Nano series (GCN3), RX 460-480, RX 500 series (GCN4) | |
WDDM 2.1 | Shader Model 6.0, DXIL | |||
12_1 | Nvidia GeForce 900/Titan series (Maxwell, 2nd gen), GeForce 10 series (Pascal), GeForce 16 series (Turing) AMD RX Vega series (GCN5), Radeon RX 5000 series (RDNA); | |||
WDDM 2.0 | Conservative Rasterization Tier 1, Rasterizer Ordered Views. | |||
12_2 | WDDM 2.9 | DirectX 12 Ultimate: Shader Model 6.5, Raytracing Tier 1.1, Mesh Shaders, Variable-Rate Shading, Sampler Feedback, Resource Binding Tier 3, Tiled Resources Tier 3 (Texture3D), Conservative Rasterization Tier 3, 40-bit virtual address space. [31] [32] | Nvidia GeForce 20 series (Turing), GeForce 30 series (Ampere), GeForce 40 series (Lovelace); AMD Radeon RX 6000 series (RDNA2), Radeon RX 7000 series (RDNA3); | |
CORE_1_0 | MCDM [33] | Compute-only device: Resource Binding Tier 1 (with restrictions), Shader Model 6.0, DXIL, Compute Shaders only [33] | Shader Model 6.0-6.7, metacommands. | Intel NPU (Meteor Lake, [34] [35] Arrow Lake) |
Direct3D 12 introduces a revamped resource binding model, allowing explicit control of memory. Abstract resource "view" objects [36] which allowed random read/write access are now represented by resource descriptors, which are allocated using memory heaps and tables. [37] This model is supported on majority of existing desktop GPU architectures and requires WDDM 2.0 drivers. Supported hardware is divided into three Resource Binding tiers, which define maximum numbers of descriptors that can be used for CBV (constant buffer view), SRV (shader resource view) and UAV (unordered access view); CBVs and SRVs per pipeline stage; UAVs for all pipeline stages; samplers per stage; and the number of SRV descriptor tables. Tier 3 hardware such as AMD GCN and, Intel Skylake has no limitations, allowing fully bindless resources only limited by the size of the descriptor heap, while Tier 1 (Nvidia Fermi, Intel Haswell/Broadwell) and Tier 2 (Nvidia Kepler) hardware impose some limits on the number of descriptors ("views") that can be used simultaneously. Additionally, buffers and textures can mixed together in the same resource heap only on hardware supporting Resource Heap Tier 2, while Tier 1 hardware requires separate memory heaps for buffers, textures, and render-target and depth stencil surfaces. Resource binding tier 1 and resource heap tier 1 are required for all supporting hardware.
Resource limits | Tier 1 | Tier 2 | Tier 3 |
---|---|---|---|
Descriptors in CBV/SRV/UAV heap | 1M | >1M | |
CBVs per shader stage | 14 | full heap | |
SRVs per shader stage | 128 | full heap | |
UAVs across all stages | 8 | 64 | full heap |
64† | |||
Samplers per shader stage | 16 | full heap | |
Feature level required | 11_0 | 11_1 | |
Unpopulated root signature entries | No | SRV heaps only | all heaps |
† 64 slots on feature level 11_1 and CORE_1_0 hardware |
Some of the optional features such as tiled resources and conservative rasterization have "tiers" which define the set of supported capabilities.
Capability | Tier 1 | Tier 2 | Tier 3 | Tier 4 |
---|---|---|---|---|
Tiled Buffer | Yes | |||
Tiled Texture2D | Yes | |||
Sample with LOD clamp | No | Yes | ||
Sample with Feedback | No | Yes | ||
NULL tile read | undefined | zero | ||
NULL tile write | undefined | discarded | ||
Tiled Texture3D | No | Yes | ||
Texture tile data-inheritance [38] | No | Yes |
Capability | Tier 1 | Tier 2 | Tier 3 |
---|---|---|---|
Required uncertainty region | 1/2 px | 1/256 px | |
Post-snap degenerate triangles | No | Not culled | |
Inner input coverage | No | Yes |
Most features are optional for all feature levels, but some of these features are promoted to required on higher feature levels.
Feature | Microsoft | AMD Radeon | Nvidia GeForce | Intel Graphics Technology / Intel Arc | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Name | Tiers | WARP12 | GCN 1 | GCN 2 / GCN 3 / GCN 4 | GCN 5 / RDNA | RDNA 2 / RDNA 3 | Fermi | Kepler | Maxwell (1st gen) | Maxwell (2nd gen) | Pascal | Volta | Turing 16 series | Turing 20 series / Ampere / Lovelace | Gen7.5 (Haswell) | Gen8 (Broadwell) | Gen9 / Gen9.5 (SKL / KBL / CFL / CML) | Gen11 (Ice Lake) | Alchemist / Xe-LP / Gen12 (TGL / RKL / ADL / RPL) | Alchemist / Xe-HPG / Gen12.7 (Intel Arc) |
Maximum feature level | 12_1 | 11_1 | 12_0 | 12_1 | 12_2 | 11_0 | 12_1 | 12_2 | 11_1 | 12_1 | 12_2 | |||||||||
Resource binding [39] | 3 | Tier 3 | Tier 3 | Tier 1 | Tier 2 | Tier 3 | Tier 1 | Tier 3 | ||||||||||||
Tiled resources [40] [41] | 4 | Tier 3 | Tier 1 | Tier 2 | Tier 3 | Tier 1 | Tier 3 | No | Tier 1 | Tier 3 | ||||||||||
Typed UAV loads for additional formats [42] | Yes | Yes | No | Yes | No | Yes | ||||||||||||||
Conservative rasterization [43] | 3 | Tier 3 | No | Tier 3 | No | Tier 1 | Tier 2 | Tier 3 | No | Tier 3 | ||||||||||
Rasterizer-ordered views [44] | Yes | No | Yes | No | Yes | Yes | ||||||||||||||
Stencil reference value from Pixel Shader [45] | Yes | Yes | No | No | Yes | |||||||||||||||
UAV slots for all stages [46] | full heap | full heap | 8 | 64 | full heap | 64 | full heap | |||||||||||||
Logical blend operations [47] [48] | Yes | Yes | Yes | Yes | ||||||||||||||||
Double precision (64-bit) floating point operations [49] [50] | Yes | Yes | Yes | Yes | No | |||||||||||||||
Minimum floating point precision [48] [51] | 10 or 16 bit | 32 bit | 16 bit | 32 bit | 16 bit | 32 bit | 16 bit | |||||||||||||
Resource heap [52] | 2 | Tier 2 | Tier 2 | Tier 1 | Tier 2 | Tier 2 | Tier 1 | |||||||||||||
Per-resource virtual addressing [53] | 32 bit | 40 bit | 44 bit | 47 bit | 40 bit | 31 bit | 38 bit | 44 bit | ||||||||||||
Per-process virtual addressing [53] | 47 bit | 40 bit | 44 bit | 48 bit | 40 bit | 31 bit | 48 bit | |||||||||||||
View instancing [54] [55] | 3 | Tier 1 | Tier 1 | Tier 1 | Tier 2 | Tier 3 | Tier 1 | Tier 2 | ||||||||||||
Raytracing [56] | 2 | Tier 1.1 | No | Tier 1.1 | No | Tier 1 | Tier 1.1 | No | Tier 1.1 | |||||||||||
Variable-rate shading [57] | 2 | Tier 1 | No | Tier 2 | No | Tier 2 | No | Tier 1 | Tier 2 | |||||||||||
Mesh shaders [58] | 1 | Tier 1 | No | Tier 1 | No | Tier 1 | No | Tier 1 | ||||||||||||
Sampler feedback [59] | 2 | Tier 1 | No | Tier 1 | No | Tier 0.9 | No | Tier 0.9 |
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