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Developer | IBM Boca Raton |
---|---|
Manufacturer | IBM |
Type | minicomputer |
Release date | 1965 |
Introductory price | ~$1,000 per month rental, equivalent to about $9,700in 2023 |
Discontinued | early 1980s [1] |
Units shipped | 10,000 est. [1] |
Operating system | Disk Monitor 2 (DM2) |
CPU | 16-bit, word addressed, 15-bit address space |
Memory | magnetic core |
Storage | IBM 2310 disk drive |
Removable storage | IBM 2515 single disk cartridge |
Display | IBM 1627 Calcomp Plotter, IBM 2250, optional |
Input | punched card, paper tape, console |
Connectivity | IBM Synchronous Communication Adaptor (SCA) |
Dimensions | desk-size: width 58.5 in, depth 29 in, height 44.125 in [2] |
Mass | 660 lb [2] |
Marketing target | small engineering companies, schools |
Backward compatibility | via Fortran |
Predecessor | IBM 1620, IBM 650 |
Successor | IBM Series/1 IBM System/7 |
Related | IBM 1800 process control system |
Website | ibm1130 |
The IBM 1130 Computing System, introduced in 1965, [3] was IBM's least expensive computer at that time. A binary 16-bit machine, it was marketed to price-sensitive, computing-intensive technical markets, like education and engineering, succeeding the decimal IBM 1620 in that market segment. Typical installations included a 1 megabyte disk drive that stored the operating system, compilers and object programs, with program source generated and maintained on punched cards. Fortran was the most common programming language used, but several others, including APL, were available.
The 1130 was also used as an intelligent front-end for attaching an IBM 2250 Graphics Display Unit, or as remote job entry (RJE) workstation, connected to a System/360 mainframe.
The total production run of the 1130 has been estimated at 10,000. [4] The 1130 holds a place in computing history because it (and its non-IBM clones) gave many people their first direct interaction with a computer. Its price-performance ratio was good and it notably included inexpensive, removable disk storage, with reliable, easy-to-use software that could be in several high-level languages. The low price (from around $32,000 or $41,000 with disk drive) [3] and well-balanced feature set enabled interactive "open shop" program development.
The IBM 1130 uses the same electronics packaging, called Solid Logic Technology (SLT), used in System/360. It has a 16-bit binary architecture, as do later minicomputers like the PDP-11 and Data General Nova.
The address space is 15 bits, limiting the 1130 to 32,768 16-bit words (65,536 bytes) of memory. The 1130 uses magnetic-core memory, which the processor addresses on word boundaries, using direct, indirect, and indexed addressing modes.
IBM implemented five models of the 1131 Central Processing Unit, the primary processing component of the IBM 1130. The Model 1 through Model 5 describe the core memory cycle time, as well as the model's ability to have disk storage. A letter A through D appended to the model number indicates the amount of core memory installed.
IBM 1131 Central Processing Unit weighs about 760/1050 lb (345/477 kg). [5]
Memory cycle time | |||||
---|---|---|---|---|---|
Core memory | 3.6 μs, no internal disk | 3.6 μs, plus disks | 2.2 μs, plus disks | 5.9 μs (3.6 μs: see below), single disk | 2.2 μs, no internal disk |
4096 words | Model 1A | Model 2A | ——— | Model 4A | ——— |
8192 words | Model 1B | Model 2B | Model 3B | Model 4B | Model 5B |
16,384 words | Model 1C | Model 2C | Model 3C | ——— | Model 5C |
32,768 words | Model 1D | Model 2D | Model 3D | ——— | Model 5D |
The Model 4 was a lower-priced product with a 5.9 μs cycle time. Some purchasers of performance upgrades observed that the field adjustment to achieve the improvement was surprisingly trivial.
The IBM 1132 printer relies on the 1130 processor rather than internal logic to determine when to fire the print wheels as they rotated. Printers for the Model 4 run more slowly, but the slower processor still can not keep up with it. The hardware manual discloses that when the Model 4 was servicing the two highest-level interrupts (the level 0 card-reader column interrupt or the level 1 printer interrupt), it ran at the faster 3.6 μs cycle time. Some users of the Model 4 would write a phony printer driver that did not dismiss the printer interrupt, in order to benefit from the higher processor speed. However, lower-level interrupts are disabled during this interval, even the end-of-card interrupt (level 4) from the 1442 card reader.
The IBM 1800, announced November, 1964, [6] is a predecessor of the IBM 1130 for process control applications. It uses hardware rather than core memory for the three index registers and features two extra instructions (CMP and DCM) plus extra interrupt and I/O capabilities. It is a successor to the IBM 1710, as the IBM 1130 is a successor to the IBM 1620.
The IBM 1500 is a multi-user educational system based around either an IBM 1130 or an IBM 1800. It can connect to up to 32 student work stations, each with a variety of audio-visual capabilities.
Other than these, IBM produced no compatible successor systems to the 1130. The IBM System/7 is a process control and real-time system, and the IBM Series/1 is a general-purpose 16-bit minicomputer, both having different architectures from the 1130, and from each other.
To maximize speed and conserve space, the operating system and compilers are written entirely in assembly language and employ techniques that are rare today, including intermixing code and data as well as self-modifying code.
Much user programming is done in Fortran. The 1130 Fortran compiler can run on a machine with only 4,096 words of core—though the compiled program might not fit on such a machine. In this multi-pass compiler, each "phase" processes the entire source program and takes it another step toward machine code. For example, the first phase reads the source statements into memory, discards comment lines, removes spaces except in text literals, concatenates continuation lines and identifies labels. The compiler is available in a disk-resident version as well as on 8-channel punched paper tape or punched cards.
The most widely used operating system for the 1130 is the Disk Monitor System Version 2 (DM2) introduced in 1967. DM2 is a single-task batch-oriented system. It requires a system with at least 4 KB of core memory and one integrated 2310 disk drive for system residence. The Supervisor is tiny by modern standards, containing assorted system details such as first-level interrupt routines, called Interrupt Level Subroutines, plus the disk driver and routines to load the interpreter of job control commands and the card reader driver. Device drivers for other I/O devices required by a job are incorporated as part of the loading of that job, which might also include the replacement of the basic disk driver by a more advanced driver. During the execution of a job, only a resident monitor, called the Skeleton Supervisor, resides in memory. This Supervisor requires just 1020 bytes, so a task's first available memory starts with address /01FE (hexadecimal) or word 510. When the job ends or is aborted, the supervisor loads the Monitor Control Record Analyzer (MCRA) to read the job control for the next. While the job is running, the Supervisor is inactive. Aside from device drivers and interrupt processing all CPU time is entirely devoted to the job's activities. Other programs distributed as part of the operating system are a core dump utility, DUMP, and the Disk Utility Program, DUP.
A Card/Paper Tape Programming System was available to support systems without disk.
There is a hierarchy of device drivers: those with names ending in Z are for Fortran, such as DISKZ, while assembler programmers might use DISK0, and DISK1 was even faster at reading multiple disk sectors. But DISKZ starts its sector addressing with the first available unused sector, while the others start with sector zero of the disk, making it possible for a programmer unfamiliar with disk organization to inadvertently overwrite the bootstrap loader.
Other programming languages available on the 1130 include
There is even a French language ALGOL compiler, in which for example "Debut ...Fin;
" take the place of "Begin ... End;
". All its messages are in French, so "Bonne compilation" is the goal.
Eastern Michigan University developed a Fortran IV compiler for the 1130, known as Fortran-EMU, as an alternative to the Fortran IV (subset) compiler provided by IBM. It adds many Fortran Iv features not supported by the IBM compiler, including the LOGICAL data type, six-letter variable names, and enhanced diagnostics. The Fortran-EMU compiler was distributed as a deck of punched cards in a disk image file format with all the remaining system area deleted, to prevent copying other modules that would normally reside on the same disk, such as the assembler or compilers.
Oklahoma State University developed an ALGOL 68 compiler, written in ANSI Fortran 1966. [13] [14] [15]
A FOCAL interpreter was developed at the University of Michigan.
IBM also distributed a large library of programs, both IBM-supported (Type I and II) and unsupported (Type III and IV).
Since the 1130 was aimed primarily at the scientific market, scientific and engineering programs predominated:
The 1130 also occupied a niche as a data processing machine for smaller organizations:
There is also special-purpose software:
Batch operation of the 1130 is directed by control records in the primary input stream (card or paper tape reader). There are two types of control records, monitor control records and supervisor control records. [19]
Monitor control records are identified by //␢
followed by a "pseudo-operation code" in columns 4–7. "␢" represents a single blank.
Control record | Function |
---|---|
//␢* comments | Provides a comment to be printed in the job listing in columns 5 thru 80 |
//␢JOB | Identifies the start of a job |
//␢ASM | Invokes the Assembler |
//␢FOR | Invokes the FORTRAN compiler |
//␢PAUS | Stops the system until the console START key is pressed |
//␢TYP | Switches from the printer to the console for control record input and output |
//␢TEND | Cancels the effect of //␢TYP |
//␢DUP | Invokes the Disk Utility Program |
//␢XEQ | Reads and transfers control to a mainline program |
The JOB
record can have a "T" in column 8 to indicate that any files added to the User Area by this job should be deleted at the end. Columns 11 thru 15 can contain a cartridge label; the system verifies that the specified cartridge is mounted before proceeding.
The XEQ
record may contain the name of the program to be run in columns 8 thru 12. If this is omitted, the program currently in Working Storage will be executed. If column 14 contains "L", and the program is in Disk System Format (not core-image) a core map will be printed by the Core Load Builder. If this statement is followed by LOCAL
NOCAL
, or FILES
Supervisor Control Records, columns 16 and 17 contain the count of these records. Column 19 optionally indicated which disk driver routine is to be linked. "0", "1", or "N", request DISK1, DISK2, or DISKN, any other character, including blank, requests DISKZ, the FORTRAN disk routine.
Supervisor Control records begin with an "*" in column 1, immediately followed by the command pseudo-operation in column 2. They are LOCAL
, NOCAL
, and FILES
for the Core Load Builder. DUP control records have a similar format. These records control program linking, either for the // XEQ
statement or the DUP *STORECI
command.
Control record | Description |
---|---|
*LOCAL | Supplies a list of subprograms which will be loaded as overlays at run time, rather than included with the main program |
*NOCAL | Supplies a list of subprograms to be linked with the main program, even though they are never called. These are usually either debug routines which the operator can manually branch to from the console, or interrupt service routines |
*FILES | Equates File Identification Numbers from the FORTRAN DEFINE FILE statement or the Assembler FILE statement to named files on disk. |
The enduring memories of the IBM 1130 may have resulted from its need for continual human intervention. It was usually occupied running "jobs" specified by a deck of punched cards. The human operator would load jobs into the card reader and separate them back into jobs for return, perhaps along with printed output, to the submitter. The operator would also have to watch the 1130 for evidence of a malfunctioning or stalled job and intervene by pressing the INT REQ key on the keyboard to skip ahead to the start of the next job. [20]
Marking the start of a job was a punched card that started with // JOB
. Any card that started with //
was a command to the Supervisor and could not be used as user program or data. Other commands included // DUP
to execute the Disk Utility Program (to delete files or add the file in the temporary area to the file collection) and // XEQ
to execute a named program from disk. If a user program tried to read a command card, the standard card reader routine would signal end-of-input to the program and save that card's content for the Supervisor.
Unlike the IBM 360, where a booting device can be selected from the system console, an IBM 1130 can only be "booted" (IPL'd: Initial Program Load) from an external device: a card reader or a paper tape reader. [21] [22]
The bootstrap procedure reads one card from the card reader. The boot card contains binary code [23] to read the contents of sector zero of the disk drive, which in turn handles the "operation complete" interrupt from the disk drive and performs additional disk reads to prepare the 1130 for the first punched-card job. The whole process takes about a second to complete.
When the IBM 1130 is started, the Supervisor is still in memory and probably intact, as core memory retains its state without power. If the operator concludes that a user program has stalled, the Supervisor can sense a key press to abort the program and skip ahead to the next // card. The Supervisor is not protected against modification by a badly written job, a case that might require that the operator reboot the 1130. Nor was there protection against writing to disk. If the copy of the system software on disk is modified, it can be restored by reloading it from about 4000 binary-coded punched cards (approximately two boxes).
The IBM 2310 disk drive stores sectors of 320 words (640 bytes) plus a one-word sector address. A cylinder consists of two tracks on the top and bottom surfaces of the 2315, or of one platter on the 1316 disk pack used in the 2311. Each disk cylinder contains eight sectors. A sector is logically divided by the monitor into sixteen disk blocks of 20 words (40 bytes) each. The disk block is the unit of allocation for files.
The system distinguishes between system cartridges, which contain the monitor and utilities along with user data, and nonsystem cartridges, which contain user data only. All cartridges contain information on cylinder 0, including the defective cylinder table, cartridge id, and a bootstrap program (bootstrap code). On nonsystem cartridges, the bootstrap simply prints an error message and waits if an attempt is made to boot from this cartridge. On a system cartridge this is the cold-start program, followed by a communications area and the resident monitor in sectors one and two. Sectors three through five contain the System Location Equivalence Table (SLET)—a directory of all phases of all monitor programs. Other control information fills out the first track.
The system area is present on system cartridges. It contains the Disk Monitor program, and optionally the FORTRAN compiler, the Assembler, and a core image buffer used for linking relocatable programs. It also contains the user file directories— Fixed Location Equivalence Table (FLET), and Location Equivalence Table (LET),
Following the system area, the cartridge contains up to three logical subdivisions: the fixed area, the user area, and working storage. Both the fixed area and user area store non-temporary programs and data. The fixed area size is defined by DUP, and stores data, and programs in core image format only. It is not repacked when files are deleted. The user area stores data and programs in any format. The boundary between the user area and working storage "floats"— the user area expands as files are added and contracts as it is repacked to reclaim space from deleted files. If a file needs to be modified, the usual process is to use // DUP
commands to delete it, which moves any subsequent files back to close the gap, and then give that name to the temporary file as the new version of the file. Rarely modified files thus migrate towards the start of the disk as new files or new versions are appended, and frequently modified files are stored towards the end of the disk.
Working storage starts after the last file in the user area and occupies all the remaining space on the cartridge. It may contain one temporary file created by the system or the user, such as the output of a compiler or an application program. This file is subject to possible deletion at the end of the current job, unless saved to the fixed area or the user area.
All disk files are contiguous disk blocks, thus there is no fragmentation. A program can use and modify named files, but can not expand them beyond their created size. A program which creates more than one file must have all but one pre-allocated by a DUP.
With limited disk space, program source files are normally kept as decks of cards. Users having larger requirements may have a disk of their own containing the operating system, but only their files, and would have to replace the "pool" system disk with theirs and restart the system when their programs are to be run. A system with a second disk drive that can be devoted entirely to one user's code and data provides some relief.
A disk pack or cartridge is initialized for use on the 1130 by the Disk Pack Initialization Routine (DIPR). This routine scans the disk, and writes sector addresses on all cylinders, flags defective sectors, and writes a cartridge id on cylinder zero. DIPR is a Standalone program, which is loaded from cards or paper tape, and accepts the cartridge id from the system console. [19]
The Disk Utility Program (DUP) provides commands for transferring programs, subroutines and data. It is invoked by the job control // DUP
card, followed by one or more control cards: [24]
Command | Function |
---|---|
*STORE | Store a program in Disk System Format (relocatable object) |
*STORECI | Store a program in Core Image Format (fully linked and relocated) |
*STOREDATA | Store a data file to disk |
*STOREDATACI | Reload a dumped core image program |
*STOREMOD | Replace or create a disk file |
*DUMP | Dump data file from disk |
*DUMPDATA | Dump arbitrary sectors from disk |
*DUMPLET | Print the disk Location Equivalence Table (LET), and the Fixed Location Equivalence Table (FLET) if a fixed area exists |
*DELETE | Delete a program or data file |
Other commands, mainly for use by the system administrator, define or expand the Fixed Area, delete the FORTRAN compiler and/or Assembler from the system, and restore correct sector addresses to Working Storage if they have been modified.
The operands have to be placed into fixed columns.The source device code goes in columns 13 and 14, the destination device in columns 17 and 18. These device codes are:
Optionally, a program name may be coded in columns 21 thru 25, and a count field in 27 thru 30. The interpretation of these fields depends on the DUP function requested.
Programs can be converted to a faster-loading format with the STORECI command, which invokes Core Image Builder (DM2's counterpart to the 360's Linkage Editor). Alternatively, a program can go through this process each time it is to be run, and for infrequently used programs this is preferred in order to conserve disk space.
The following control card instructs DUP to take the current contents of working storage and move it to the user area naming it PROGM. DUP knows the size of the file in working storage. The size of the user area will be increased by the size of the file, and the size of working storage will be decreased correspondingly.
Disk memory is used to store the operating system, object code, and data, but source code is kept on punched cards.
The basic 1130 came with an IBM 2310 voice-coil actuated disk drive, called "Ramkit", from IBM's General Products Division in San Jose. [7] : 497 Their pizza-box-sized IBM 2315 single platter cartridges holds 512,000 words or 1,024,000 bytes (less than a 3.5" HD floppy's 1.44MB or even the 5.25" HD floppy's 1.2MB). Transfer rate is 35,000 words per second (70 KB/sec) using cycle stealing. [25]
The IBM 1053 console typewriter uses an IBM Selectric mechanism, which means one could change the typeface or character set by replacing a hollow, golf-ball sized type element. There is a special type element available for APL, a powerful array-oriented programming language using a special symbolic notation. A row of 16 toggle switches on the console typewriter can be individually tested from within programs, using the special Fortran statement IF (SENSE SWITCH i)
, for example.
Other available peripherals included:
To simplify the design of peripheral devices, these rely on the processor. The card reader has no memory buffers, but instead gives the CPU a level-zero (highest priority) interrupt after each individual column of the card has been read. If the CPU does not respond and store the twelve bits of data before another such interrupt indicates that the next column has been read, data will be lost. Similarly, the 1132 printer relies on software in the 1130. When a letter such as A
comes into position, the CPU has to analyze a buffered line of text and assemble an array of bits that will indicate to the 1132 which print positions should be printed with A
. If the CPU can not respond before the A
rotates out of position, print speed could be severely degraded.
Other peripherals accept text in a device-specific code convenient for its hardware. The CPU has to translate it to or from the EBCDIC code in which the CPU processes the text.
Instructions have short (one-word) and long (two-word) formats. Most computational, load, and store instructions reference one register (usually ACC) and a memory location. The memory location is identified, in the short format, by an 8-bit signed displacement from either the current address or one of the index registers; or in the long format, by a full 15-bit address, which can be indexed and specify indirection. Memory is addressed in units of words.
The 1130 supports only single-precision and double-precision binary data natively (16 and 32 bits) stored in big-endian format. Standard- and extended-precision floating-point (32 and 48 bits) and decimal data are supported through the use of subroutines.
Conditional transfers are based on (a) the current contents of the accumulator, or (b) the carry and overflow indicators set by a preceding operation. Transfers can be by skip (which assumed that the next instruction was short) or by branch. A skip occurs if any of the specified tests are true. A branch occurs if none of the specified tests were true.
Main Registers: IAR = Instruction Address Register ACC = Accumulator EXT = Extension Register XRx = Index Registers: x = 1,2,3 Implemented as memory words 1,2,3, not as hardware registers. Condition tests: Z Accumulator zero - Accumulator negative + Accumulator positive E Accumulator even C Carry indicator off O Overflow indicator off 1130 Instruction Set Mnemonics: LD = Load ACC STO = Store ACC LDD = Load Double (ACC & EXT) STD = Store Double (ACC & EXT) LDX = Load Index STX = Store Index LDS = Load Status STS = Store Status A = Add ACC AD = Add Double S = Subtract ACC SD = Subtract Double M = Multiply D = Divide AND = Boolean AND OR = Boolean OR XOR = Boolean Exclusive OR SLA = Shift Left ACC SLT = Shift Left ACC & EXT SLCA = Shift Left and Count ACC SLC = Shift Left and Count ACC & EXT SRA = Shift Right ACC SRT = Shift Right ACC & EXT RTE = Rotate Right ACC & EXT BSC = Branch or Skip on Condition (Modifier dependent) i.e. BP BNP BN BNN BZ BNZ BC BO BOD BOSC - Branch Out or Skip Conditionally (alternate for BSC with bit 9 set) Exits current interrupt level. BSI = Branch and Store IAR MDX = Modify Index and Skip (Increment IAR one if a sign change or becomes zero) WAIT = Halt NOP = No Operation (alternate for SLA 0) XIO = Execute I/O 1800 Additional Instruction Mnemonics: CMP = Compare ACC DCM = Double Compare ACC & EXT Equivalent Mnemonics The disk assembler introduced several mnemonics equivalent to existing instructions intended to make the programmer's intent clearer: SKP - Skip on condition, equivalent to a short BSC B - Branch unconditionally, equivalent to BSC with no conditions specified BP - Branch Accumulator Positive, equivalent to BSC specifying '+' condition BNP - Branch Accumulator not Positive BN - Branch Accumulator Negative BNN - Branch Accumulator not Negative BZ - Branch Accumulator Zero BNZ - Branch Accumulator not Zero BC - Branch on Carry BO - Branch on Overflow BOD - Branch Accumulator Odd MDM - Modify Memory, equivalent to unindexed long-format MDX XCH - Exchange Accumulator and Extension, equivalent to RTE 16 Short instruction format (one 16 bit word): 1 Bits 0...45678......5 OP---FTTDisp---- OP is Operation F is format 0 = Short TT is Tag Disp is Displacement Long instruction format (two 16 bit words): 1 1 Bits 0...456789.....50..............5 OP---FTTIMod----Address--------- OP is Operation F is format 1 = Long TT is Tag I is Indirect bit Mod is Modifier Effective Address Calculation (EA): F = 0 | F = 1, I = 0 | F = 1, I = 1 Direct Addressing| Direct Addressing| Indirect Addressing ------------------------------------------------------------------- TT = 00 | EA = Displ + IAR | EA = Add | EA = C/Add TT = 01 | EA = Displ + XR1 | EA = Add + XR1 | EA = C/Add + XR1 TT = 10 | EA = Displ + XR2 | EA = Add + XR2 | EA = C/Add + XR2 TT = 11 | EA = Displ + XR3 | EA = Add + XR3 | EA = C/Add + XR3 ------------------------------------------------------------------- Disp = Contents of displacement field Add = Contents of address field of instruction C = Contents of location specified by Add or Add + XR
15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | (bit position) |
Accumulator | ||||||||||||||||
ACC | Accumulator | |||||||||||||||
Q | Extension | |||||||||||||||
Index registers | ||||||||||||||||
IAR | Instruction address | |||||||||||||||
XR1 | Index 1 | |||||||||||||||
XR2 | Index 2 | |||||||||||||||
XR3 | Index 3 | |||||||||||||||
Flags | ||||||||||||||||
O | C |
The lowest addresses of core memory have uses dictated either by the hardware or by convention:
Address | Usage |
---|---|
/0000 | By convention, contains the instruction B *-1 , which would branch to itself indefinitely until an operator noticed that all the console IAR lights were dark and flushed the job, either by pressing Int Req or by rebooting. |
/0001 | XR1. The memory addresses of the index registers permit direct moves between them, such as with LDX I1 2 |
/0002 | XR2. |
/0003 | XR3. |
/0008 | The address of the handler for the Level 0 (highest priority) interrupt— 1442 card reader/punch "column ready" interrupt. |
/0009 | The address of the handler for the Level 1 interrupt— 1132 printer and Synchronous Communications Adapter. Handlers for this and lower interrupts have to test a Status Word to determine which device has interrupted. |
/000A=10 | The address of the handler for the Level 2 interrupt— disk storage, Storage Access Channel. |
/000B=11 | The address of the handler for the Level 3 interrupt— 1627 plotter, Storage Access Channel. |
/000C=12 | The address of the handler for the Level 4 interrupt— 1134 paper tape reader, 1055 paper tape punch, console, 1442 card read punch, 2501 card reader, 1403 printer, 1231 optical mark reader, Storage Access Channel device. |
/000D=13 | The address of the handler for the Level 5 (lowest priority) interrupt— console stop and interrupt switches, Storage Access Channel. |
/0020=32 | First word of the scan field for the 1132 printer (/0020–/0027). |
/0026=38 | Last full word of the scan field. |
/0027=39 | Half used: 120 columns = 120 bits = seven 16-bit words plus 8 bits. |
/0038=56 | EXIT to Supervisor/Return to Monitor (CALL EXIT) |
The 1130 has no hardware support for a stack. Most subprograms are called with the instruction BSI (Branch and Store IAR). This deposits the value of IAR (the return address) at the destination address and transfers control to destination+1. Subprograms return to wherever they were called on that occasion using an indirect branch through that first word of the subprogram. Placing the return address in-line was a common technique of computers at that time, such as the Hewlett-Packard HP 2100, [30] the DEC PDP-8, [31] and the Scientific Data Systems SDS 920. [32]
So a subprogram named SIMPL might be organized as follows (comments follow the instruction operand):
SIMPL: DC *-* This is the entry point, filled with a zero initially. (whatever the routine does) B I SIMPL Return by an Indirect branch, to the address found in location SIMPL. END SIMPL Instructs the assembler that the source for routine SIMPLE is complete.
The subprogram would be called as follows:
BSI L SIMPL Call SIMPL. L (Long) is needed if SIMPL is more than -128 or +127 words away.
The pseudo-opcode CALL would typically be used.
As shown, a subprogram's entry point is DC *-*
, an assembler pseudo operation that is used to Define a Constant (occupying one word of storage) with the value specified by the expression. The * stands for the current address of the assembly and so *-* results in zero. Writing this rather than 0 provides a visually distinctive note that a meaningful value (the return address) will be placed there at run time. The entry point need not be the first word of the subprogram. Indeed, the preceding word can be the start of a two-word direct branch instruction whose address field is at SIMPL. Then, returns can be effected by one-word branches there: B SIMPL-1
When SIMPL is called, the BSI instruction replaces *-*
with the current value of IAR, which is the address just past the BSI instruction. After SIMPL does whatever it is written to do, B I SIMPL
branches not to SIMPL, but indirect through it, thus continuing execution with the instruction following the BSI instruction that called SIMPL.
Without extra arrangements to protect the return address, recursion is impossible: If SIMPL calls itself, or called a subprogram that called it, its original return address is overwritten. Re-entrancy is problematic for the same reason: An interrupt service routine must refrain from calling any subprogram that might have been the code that was interrupted.
The caller of SIMPL might pass it parameters, which might be values or addresses of values. Parameters might be coded in-line (immediately following the BSI instruction) or might be placed in index registers XR1 and XR2. If parameters are placed in-line, SIMPL modifies its own return address so its final indirect branch returns beyond the parameters.
Integer functions of a single integer expect the parameter in the accumulator and return their result there. Floating-point functions employ the floating-point accumulator (a two word area set aside by the floating-point library, three words for extended precision), and so on.
The convention of coding 0 as the initial value at the entry point means that if a programming error leads to SIMPL returning before the first time it was ever called, execution would jump to memory location 0. As mentioned above, it is customary to have location 0 contain a branch to location 0. The 1130 would be stuck at location 0, and the IAR lights on the console would be entirely dark, making it clear the program had failed.
For subprograms that would be called many times (for example, subprograms for floating-point arithmetic), it is important to reduce the size of each call to one word. Such "library routines" use the LIBF protocol. It is more complex than the CALL protocol described in the previous section, but LIBF hides the complexity from the writer of the assembly-language program.
Library routines are addressed through index register XR3. (Fortran subprograms use index register XR1 for the addresses of parameters and the return address, but register XR2 is unused.) XR3 points to a sequence of three-word transfer vectors such that the first entry is -128 words from XR3's value. The programmer calls the library routine using the LIBF
pseudo-operation, which assembles not a direct BSI
to the routine but a one-word indexed branch instruction (BSI 3 disp
) whose displacement (-128, -125, and so on) identifies the start of the routine's transfer vector.
The transfer vector is prepared by the linkage loader when it puts together the program. A transfer vector entry to a library function named SIMPL takes this form:
DC *-* A word into which BSI stores the return address. B L SIMPL Branch to the start of the library function.
The way SIMPL knew where its return address was is that, if SIMPL were declared a LIBF routine, the linkage loader would modify the code of SIMPL, placing the address of SIMPL's transfer vector entry at SIMPL+2. LIBF routines, unlike CALL subprograms, do not start with a DC directive to hold the return address (it is in the transfer vector) but with actual code, as follows:
SIMPL STX 1 RCVR1+1 Save the caller's value of XR1 at a nearby location. LDX I1 *-* The linkage loader changes the address word to point to the transfer vector.
Placing the address of SIMPL's transfer vector at SIMPL+2 leaves room for a one-word instruction to save the chosen index register, here XR1. Then the indirect LDX instruction points XR1 not at the transfer vector, but through it to the return address, or to any parameters stored in-line after the BSI. SIMPL then does whatever it was written to do, gaining access to any in-line parameters through XR1 (in which case it must increment XR1 for the return address), and returns as follows:
STX 1 RETN+1 Store XR1 to prepare to use it as a return address. RCVR1 LDX L1 *-* SIMPL's first instruction modified this address. Now, * restore the original value of XR1. RETN B L *-* This instruction was modified two instructions ago; return.
Suppose a LIBF-style call to SIMPL were at address 100. Then the return address would be 101, because BSI 3 disp
is a one-word instruction. XR3 points into the group of transfer vectors. If the transfer vector for SIMPL started at address 2000, then the BSI would be assembled with a disp
so that XR3+disp = 2000. Executing the BSI stores 101 at location 2000 and jumps to location 2001. At 2001 is a two-word long jump to the entry point of SIMPL, which the linkage loader might have placed at address 300.
The long jump transfers control to SIMPL. After the instruction at 300 stores XR1, the instruction at 301 is LDX I1 2000
, the linkage loader having placed 2000 at location 302. This does not load 2000 into XR1; it is an indirect instruction, and loads the contents of 2000, which is 101, the return address for that call to SIMPL.
In the return sequence shown above, by the time control reaches RETN, the instruction there is B L 101
, which returns to the caller. (If there is one or more in-line parameters at 101, SIMPL would increment XR1 to point to 102 or beyond, and this would be the destination of the B
instruction.)
If SIMPL took parameters coded in-line following the BSI instruction, SIMPL gains access to them with indexed addressing off XR1. The first could be obtained by LD 1 0
, the second by LD 1 1
, and so on. If the second parameter is the address of the actual parameter, then LD I1 1
obtains its value. Before returning, SIMPL increments XR1 past the n parameters with an instruction such as MDX 1 n
so as to place the right value at RETN+1.
A LIBF routine that declined to restore the original value of XR1 could omit the above steps and return with a simple B 1 n
to skip n in-line parameters. However, such a routine can not be called by other LIBF routines because it disrupts the caller's use of XR1 for access to its own parameters and return address.
The complexity of LIBF saves memory for subprograms that are frequently called.: [33] : p.24 The LIBF linkage requires one word per invocation, plus three words for the transfer vector entry and extra code in the routine itself, whereas the CALL linkage requires two words per invocation because most CALLs will be to an address beyond the -128 to +127 word reach of the one-word opcode.
The register XR3 must point to the transfer vector entries for the library routines rather than a dispatch table of only their addresses, because this latter would require that LIBF routines be called with an indirect BSI instruction. These instructions are two words long, so such a design would negate the code size savings of LIBF. The eight-bit limit for the disp field of the one-word instruction code limits usage of LIBF routines to no more than 85 distinct entries.
The previous sections show that code and data are intermingled. It is common in 1130 programming to modify the address fields of instructions and, in fact, to modify entire instructions.
The Fortran compiler produces self-modifying code when generating code for any subprograms (subroutines or functions) that have parameters. The compiler builds a table of every location where the subprogram references one of its parameters, and compiles as the first instruction in the body of the subprogram a call to a subprogram called SUBIN that uses the table to modify the address field of every reference to a parameter to be the actual address of the parameter during the current invocation. SUBIN makes these patches every time the subprogram is called.
When a Fortran program calls a subprogram, the addresses of any parameters appear in-line following the call. For example, the Fortran statement CALL SIMPL(X) might compile into:
BSI L SIMPL DC X The address of X, on which SIMPL is to operate
Within the subprogram, parameters could be accessed by indirect indexed addressing as shown above in Variations, so, given that XR1 has been suitably prepared, an integer parameter could be loaded into the accumulator with an instruction like this:
LD I1 0 Load the value of the first parameter (offset 0) into the accumulator
The compiler instead used direct addressing. When SUBIN runs, it obtains the address of X and patches the instruction's address field to become:
LD L X Load the value of X into the accumulator
The advantages of SUBIN are as follows:
The disadvantages of SUBIN are the time it requires to run and the memory required for the table of references. The size of this table is the sum of 5, the number of parameters, and the number of references; if this sum exceeds 511, compilation will fail. For subprograms with many references to a parameter, the author of the subprogram might copy the parameter into a local variable.
Modifying entire instructions was a common technique at the time. For example, although the 1130 has an OR instruction, the syntax of Fortran provides no way to write it. An integer function IOR can be defined, enabling logical OR to be part of a Fortran expression such as:
M =3*IOR(I,J)+5
The Fortran compiler places the addresses of I and J in-line and expects the result in the accumulator. Using IOR(I,J) in a Fortran expression compiles the following four words:
BSI L IOR Two-word jump to the start of the IOR function. DC I A one-word in-line parameter: The address of I. DC J A one-word in-line parameter: The address of J.
In fact, the assembler IOR function does not compute I or J at all. Instead, it replaces the above four words with the following:
LD L I Load accumulator with I (two-word instruction) OR L J OR accumulator with J (two-word instruction)
After performing that transformation, it does not return past the end of the four-word block (which it had just modified). Instead, it branches to the exact address from which it had been called originally. The BSI instruction is no longer there; what is now there is the two instructions it has just written. They combine the two integers with the machine-language OR instruction and leave the result in the accumulator, as required.
The call to IOR and the transformation of the four-word block happens at most once per program run. If the Fortran line illustrated above is executed again, it runs faster than it did the first time. Similar functions could be devised for other useful operations.
A function that self-modifies, as IOR does, can not be used in a Fortran subprogram on any of the parameters to that subprogram (though it could be used to combine local variables) because it is incompatible with the SUBIN subprogram discussed above. IOR's transformation of its four-word calling sequence, shown above, moves the location of the address of variable I. On subsequent calls to the Fortran subprogram, the table of references to parameters would be in error and SUBIN would patch the wrong word, in this case placing the new address of I over the OR operation code.
1130 FORTRAN offers two floating point formats: a 32-bit "standard precision" format and a 40-bit "extended precision" format.
Standard precision format contains a 24-bit two's complement significand while extended precision utilizes a 32-bit two's complement significand. This format makes full use of the CPU's 32-bit integer operations. The extended format occupies three 16-bit words, with the high-order eight bits of the first word unused. The characteristic in both formats is an 8-bit field containing the power of two biased by 128. Floating-point arithmetic operations are performed by software. [34]
The *EXTENDED PRECISION
compiler option card tells the FORTRAN compiler to use 40 bits instead of 32 bits for all floating point data, there is no provision for mixing formats.
Data to be manipulated and the instructions that manipulate them have to reside together in core memory. The amount of installed memory (from 4,096 to 32,768 words) is a key limitation. Fortran provides several techniques to write large programs despite this limitation.
Fortran let any subprogram be designated as "LOCAL" (Load-on-Call). Each LOCAL subprogram is an overlay; it is part of the disk-resident executable program but is only loaded into core memory (if not already there) during the time it is called. So, for example, six LOCAL subprograms would require only as much core memory as the largest, rather than the total amount for all six. However, none of the six can invoke another, either directly or through intermediary subprograms.
An entire Fortran program can pass control to a subsequent phase, exiting to the Supervisor with an instruction to load the follow-on phase into core memory. A large program might be split into three parts, separately compiled, called PART1, PART2, and PART3. Execution is started by // XEQ PART1
and at a suitable point, PART1 would execute the Fortran statement CALL LINK(PART2)
and so forth. The name of the successor program in the CALL can not be variable, but program logic can govern whether control is transferred to another phase, and which CALL LINK
statement is executed. As mentioned above, the Fortran compiler itself was written this way, with each phase of compilation achieved by a separate program.
Programs, such as Fortran programs, reside at low core memory addresses (just above the Supervisor). Fortran allocates space at the highest addresses for any variables and arrays declared COMMON. If a follow-on phase of the program contains a corresponding COMMON declaration, then information in this common area can be shared among phases. Phases could omit the COMMON declaration without problem, provided those phases were not so large as to have their program code invade the common area. COMMON storage not only shares data between phases; lower-memory COMMON variables can be used to pass data among a main program and subprograms within a single phase, though the data could be lost on moving to the next phase.
The examples can be executed on the IBM 1130 emulator available at IBM 1130.org.
The following listing shows a card deck that compiles and runs an assembler program that lists a deck of cards to the line printer.
// JOB // ASM *LIST * LCARD.ASM - LIST A DECK OF CARDS TO LINE PRINTER * * PROGRAM * NEW PAGE ON PRINTER * A READ A CARD * CONVERT FORMAT * PRINT A LINE ON PRINTER * GOTO A * START LIBF PRNT1 GOTO NEW PAGE ON 1132 DC /3100 PRINTER CHANNEL 1-NEW PAGE * NEXTC LIBF CARD0 READ FROM 1442 CARD READER DC /1000 CONTROL TO READ DC CBUFF STORE 80 COLUMNS CINP LIBF CARD0 DC 0 B CINP LOOP UNTIL CARD IS READ * LIBF ZIPCO CONVERT CARD TO PRINTER DC /1100 UNPACKED IN, PACKED OUT DC CBUFF+1 INPUT BUFFER DC PBUFF+1 OUTPUT BUFFER DC 80 CHARACTER COUNT CALL HLEBC HOLLERITH TO EBCDIC * LIBF PRNT1 PRINT 80 CHARACTERS DC /2000 CONTROL CODE TO PRINT DC PBUFF PRINT BUFFER DC PERR PRINT ERROR POUT LIBF PRNT1 CHECK FOR PRINT COMPLETE DC 0 B POUT LOOP UNTIL COMPLETE * B NEXTC READ NEXT CARD * * DATA * CBUFF DC 80 80 COLUMNS PER CARD BSS 80 * PBUFF DC 40 40 WORDS 80 CHARACTERS BSS 40 * PERR DC 0 B I PERR THIS RETURNS TO THE * PRINTER ERROR HANDLER * WHICH WILL TERMINATE THE PROGRAM * END START PROGRAM ENTRY POINT // XEQ TEST DATA 1 HELLO WORLD TEST DATA 2
In this job, the assembler leaves the result of its assembly in the temporary area of the system disk, and the XEQ command executes the content of the temporary area. The odd-looking END START
has two meanings: end of assembler source, and the name of the entry point of the routine, which has the label START.
Assembler source starts with column 21 of the card, not column one. In systems without a disk drive, the assembler would punch code into the start of the card just read (the card reader was actually a reader-punch, with the punch station after the read station) and then read the next card. To handle forward branches and the like, the assembler's second pass literally involved a second pass of the cards through the reader/punch. If source changes were needed the programmer would duplicate the cards to obtain a deck with columns 1-20 blank ready for the next run through the assembler.
By convention, buffers are preceded by a word count. The DC
(Define Constant) assembles a count word and the following BSS
(Block Started by Symbol) reserves the required number of words for the buffer. The card buffer requires 80 words, one for each card column. Driver CARD0 reads each card column literally, using 12 of the 16 bits in the buffer word, with a bit set to on for each hole punched in the corresponding row for that column. The pattern of punches typically describes a text character using the Hollerith code. The console keyboard also gives input to the program in the Hollerith code, the only case of two devices using the same character encoding.
The printer routine, however, works with text in 8-bit EBCDIC with two characters per word, requiring a 40-word buffer. The program uses library routine ZIPCO to perform the conversion. Despite appearances, the statement CALL HLEBC
is not executed because HLEBC is not a subroutine but an IBM-supplied Hollerith-to-EBCDIC conversion table. The CALL statement provides the address of the table to ZIPCO and ensures that the linking loader includes the table in the program, thus it is the fifth parameter to ZIPCO, though one occupying two words of storage: the BSI operation code word for the CALL is unused and thus usually wasted, but the second word of the expansion of CALL HLEBC
is the address of the HLEBC table needed by ZIPCO. After the conversion, the program sends the converted output, now in buffer PBUFF, to the printer through driver PRNT1. Again, the program loops until the printer driver reports completion, then the program reads the next card.
This example contains no code to decide when to stop. A more complete program would check for cards that begin with //
, which denotes the start of the next job. To stop the card reader as soon as possible, a program could check for the Hollerith code of /
before even converting the card to EBCDIC.
The call to CARD0 to read a card initiates that operation and immediately returns to the caller, which could proceed with other activity. However, the example program makes no attempt to overlap input and output using buffers even though it has two separate work areas; it simply loops back to CIMP to test afresh. After CARD0 has sensed the card reader's operation-complete interrupt, it returns one word further on, thus skipping the jump back to CIMP and leaving the loop.
The example routines do not run the I/O devices at top speed. Notably, the card reader, only a few milliseconds after reporting completion on reading a card, will commence its stop sequence, after which a new read command will have to wait to initiate another read cycle. The IBM 1442 reader could read 400 cards/minute at full speed, but just a little hesitancy in the read commands would halve its throughput or worse. A Fortran program could not complete even the simplest input processing in time, and so could not read cards at full speed. One common Fortran DO
loop to read cards made the motor stop and start so frequently as to accelerate wear. With buffering, the card reader control could be overlapped with processing, and the reader could be run at full speed through large data decks, but memory for the more complex program and for buffers was often at a premium.
Even with assembler and double buffering, a program to list a deck of cards from the IBM 2501 reader (1,000 cards/minute) on the line printer could not keep up, as the translation from card hole patterns to EBCDIC for the printer as done by EBPRT was too slow; the more complex ZIPCO and HLEBC were needed instead, as in the example.
The following image shows a simple APL \ 1130 session. This session was performed via the 1130 simulator available from IBM 1130.org
The above session shows a signon, addition of the integers 1 to 100, generation of an addition table for the integers 1..5 and a sign off.
In the same year as the 1130's introduction, Digital Equipment Corporation introduced the smaller, cheaper, and better-selling 12-bit PDP-8, recognized as the first successful minicomputer.
... I pounded the doors at the local IBM sales office until a salesman took pity on me. After we chatted for a while, he handed me a Fortran [manual]. I'm sure he gave it to me thinking, "I'll never hear from this kid again." I returned the following week saying, "This is really cool. I've read the whole thing and have written a small program. Where can I find a computer?" The fellow, to my delight, found me programming time on an IBM 1130 on weekends and late-evening hours. That was my first programming experience, and I must thank that anonymous IBM salesman for launching my career. Thank you, IBM.
The system was an IBM 1130 computer, a machine the size of a desk with 8 KB of main memory, a 512 KB disk drive, a Teletype CX paper tape reader and BRPE paper tape punch, and a Photon 713 photomechanical typesetter. The assignment was my first experience with managing a machine-readable document database: I learned to roll the punched paper tape carefully so that it could be stored neatly in cylindrical waste paper baskets.
In the meantime, though I didn't know about it, the roots of generalized markup were being planted. Historically, electronic manuscripts contained control codes or macros that caused the document to be formatted in a particular way ("specific coding"). In contrast, generic coding, which began in the late 1960s, uses descriptive tags (for example, "heading", rather than "format-17").
Out of an estimated 10,000 systems produced, the following are known to exist as of 2024:
Speculation on why the product was given the number 1130 centered on the following possibilities:
Others have speculated that the existence of the IBM 1130 explains why no computer designated "11/30" ever appeared in the PDP-11 family of machines. [54]
The PDP-8 is a family of 12-bit minicomputers that was produced by Digital Equipment Corporation (DEC). It was the first commercially successful minicomputer, with over 50,000 units being sold over the model's lifetime. Its basic design follows the pioneering LINC but has a smaller instruction set, which is an expanded version of the PDP-5 instruction set. Similar machines from DEC are the PDP-12 which is a modernized version of the PDP-8 and LINC concepts, and the PDP-14 industrial controller system.
The IBM 704 is the model name of a large digital mainframe computer introduced by IBM in 1954. It was the first mass-produced computer with hardware for floating-point arithmetic. The IBM 704 Manual of operation states:
The type 704 Electronic Data-Processing Machine is a large-scale, high-speed electronic calculator controlled by an internally stored program of the single address type.
The IBM 1620 was announced by IBM on October 21, 1959, and marketed as an inexpensive scientific computer. After a total production of about two thousand machines, it was withdrawn on November 19, 1970. Modified versions of the 1620 were used as the CPU of the IBM 1710 and IBM 1720 Industrial Process Control Systems.
The IBM 1401 is a variable-wordlength decimal computer that was announced by IBM on October 5, 1959. The first member of the highly successful IBM 1400 series, it was aimed at replacing unit record equipment for processing data stored on punched cards and at providing peripheral services for larger computers. The 1401 is considered by IBM to be the Ford Model-T of the computer industry due to its mass appeal. Over 12,000 units were produced and many were leased or resold after they were replaced with newer technology. The 1401 was withdrawn on February 8, 1971.
The IBM 650 Magnetic Drum Data-Processing Machine is an early digital computer produced by IBM in the mid-1950s. It was the first mass-produced computer in the world. Almost 2,000 systems were produced, the last in 1962, and it was the first computer to make a meaningful profit. The first one was installed in late 1954 and it was the most popular computer of the 1950s.
The IBM 709 is a computer system that was initially announced by IBM in January 1957 and first installed during August 1958. The 709 was an improved version of its predecessor, the IBM 704, and was the third of the IBM 700/7000 series of scientific computers. The improvements included overlapped input/output, indirect addressing, and three "convert" instructions which provided support for decimal arithmetic, leading zero suppression, and several other operations. The 709 had 32,768 words of 36-bit magnetic core memory and could execute 42,000 add or subtract instructions per second. It could multiply two 36-bit integers at a rate of 5000 per second.
The IBM 700/7000 series is a series of large-scale (mainframe) computer systems that were made by IBM through the 1950s and early 1960s. The series includes several different, incompatible processor architectures. The 700s use vacuum-tube logic and were made obsolete by the introduction of the transistorized 7000s. The 7000s, in turn, were eventually replaced with System/360, which was announced in 1964. However the 360/65, the first 360 powerful enough to replace 7000s, did not become available until November 1965. Early problems with OS/360 and the high cost of converting software kept many 7000s in service for years afterward.
Disk Operating System/360, also DOS/360, or simply DOS, is the discontinued first member of a sequence of operating systems for IBM System/360, System/370 and later mainframes. It was announced by IBM on the last day of 1964, and it was first delivered in June 1966. In its time, DOS/360 was the most widely used operating system in the world.
Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how the machine language instructions in that architecture identify the operand(s) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere.
The IBM 305 RAMAC was the first commercial computer that used a moving-head hard disk drive for secondary storage. The system was publicly announced on September 14, 1956, with test units already installed at the U.S. Navy and at private corporations. RAMAC stood for "Random Access Method of Accounting and Control", as its design was motivated by the need for real-time accounting in business.
The IBM System/3 was an IBM midrange computer introduced in 1969, and marketed until 1985. It was produced by IBM Rochester in Minnesota as a low-end business computer aimed at smaller organizations that still used IBM 1400 series computers or unit record equipment. The first member of what IBM refers to as their "midrange" line, it also introduced the RPG II programming language. It is the first ancestor in the product line whose current version is the IBM i series and includes the highly successful AS/400.
The IBM 1400 series are second-generation (transistor) mid-range business decimal computers that IBM marketed in the early 1960s. The computers were offered to replace tabulating machines like the IBM 407. The 1400-series machines stored information in magnetic cores as variable-length character strings separated on the left by a special bit, called a "wordmark," and on the right by a "record mark." Arithmetic was performed digit-by-digit. Input and output support included punched card, magnetic tape, and high-speed line printers. Disk storage was also available.
The Burroughs B2500 through Burroughs B4900 was a series of mainframe computers developed and manufactured by Burroughs Corporation in Pasadena, California, United States, from 1966 to 1991. They were aimed at the business world with an instruction set optimized for the COBOL programming language. They were also known as Burroughs Medium Systems, by contrast with the Burroughs Large Systems and Burroughs Small Systems.
In computer science, a calling convention is an implementation-level (low-level) scheme for how subroutines or functions receive parameters from their caller and how they return a result. When some code calls a function, design choices have been taken for where and how parameters are passed to that function, and where and how results are returned from that function, with these transfers typically done via certain registers or within a stack frame on the call stack. There are design choices for how the tasks of preparing for a function call and restoring the environment after the function has completed are divided between the caller and the callee. Some calling convention specifies the way every function should get called. The correct calling convention should be used for every function call, to allow the correct and reliable execution of the whole program using these functions.
The Honeywell 200 was a character-oriented two-address commercial computer introduced by Honeywell in December 1963, the basis of later models in Honeywell 200 Series, including 1200, 1250, 2200, 3200, 4200 and others, and the character processor of the Honeywell 8200 (1968).
The CDC 3000 series are a family of mainframe computers from Control Data Corporation (CDC). The first member, the CDC 3600, was a 48-bit system introduced in 1963. The same basic design led to the cut-down CDC 3400 of 1964, and then the 24-bit CDC 3300, 3200 and 3100 introduced between 1964 and 1965. The 3000 series replaced the earlier CDC 1604 and CDC 924 systems.
In computer programming, a function, procedure, method, subroutine, routine, or subprogram is a callable unit of software logic that has a well-defined interface and behavior and can be invoked multiple times.
ICT 1900 was a family of mainframe computers released by International Computers and Tabulators (ICT) and later International Computers Limited (ICL) during the 1960s and 1970s. The 1900 series was notable for being one of the few non-American competitors to the IBM System/360, enjoying significant success in the European and British Commonwealth markets.
The IBM System/360 Model 20 is the smallest member of the IBM System/360 family announced in November 1964. The Model 20 supports only a subset of the System/360 instruction set, with binary numbers limited to 16 bits and no floating point. In later years it would have been classified as a 16-bit minicomputer rather than a mainframe, but the term "minicomputer" was not current, and in any case IBM wanted to emphasize the compatibility of the Model 20 rather than its differences from the rest of the System/360 line. It does, however, have the full System/360 decimal instruction set, that allows for addition, subtraction, product, and dividend of up to 31 decimal digits.
The 12-bit ND812, produced by Nuclear Data, Inc., was a commercial minicomputer developed for the scientific computing market. Nuclear Data introduced it in 1970 at a price under $10,000.
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