Front Panel Data Port

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The front panel data port (FPDP) is a bus that provides high speed data transfer between two or more VMEbus boards at up to 160 Mbit/s with low latency. The FPDP bus uses a 32-bit parallel synchronous bus wired with an 80-conductor ribbon cable. [1]

Bus (computing) communication system that transfers data between components inside a computer

In computer architecture, a bus is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components and software, including communication protocols.

VMEbus

VMEbus is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors, but uses its own signalling system, which Eurocard does not define. It was first developed in 1981 and continues to see widespread use today.

In computer architecture, 32-bit integers, memory addresses, or other data units are those that are 32 bits wide. Also, 32-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 32-bit microcomputers are computers in which 32-bit microprocessors are the norm.

Contents

The following interface functions are supported: [2]

In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.

Electrical termination electronic circuit

In electronics, electrical termination is the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This is intended to prevent signals from reflecting off the end of the transmission line. Reflections at the ends of unterminated transmission lines cause distortion which can produce ambiguous digital signal levels and mis-operation of digital systems. Reflections in analog signal systems cause such effects as video ghosting, or power loss in radio transmitter transmission lines.

Synchronization coordination of events to operate a system in unison

Synchronization is the coordination of events to operate a system in unison. The conductor of an orchestra keeps the orchestra synchronized or in time. Systems that operate with all parts in synchrony are said to be synchronous or in sync—and those that are not are asynchronous.

The connector, denoted by the FPDP specification, is a KEL P/N 8825E-080-175.

Interface signals

Data frames

The following types of data frames are supported:

Cable length

FPDP interfaces work with up to a cable length of 1 meter when used in multi-drop configuration. They work up to 2 meter when using STROBE signal during point-to-point configuration. They work up to 5 meter when used with PSTROBE differential signal during point-to-point configuration.

See also

Serial Front Panel Data Port(Serial FPDP or SFPDP) is a high speed low latency data streaming serial communication protocol. It currently supports three distinct speeds, 1.0625 Gbit/s, 2.125 Gbit/s, 2.5 Gbit/s. Serial FPDP can operate over long distances, up to 10 kilometres (6.2 mi), using optical fiber cables, or shorter distances over copper cables.

Optical fiber cable cable assembly containing one or more optical fibers that are used to carry light

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In telecommunications, asynchronous communication is transmission of data, generally without the use of an external clock signal, where data can be transmitted intermittently rather than in a steady stream. Any timing required to recover data from the communication symbols is encoded within the symbols.

In telecommunications, RS-232, Recommended Standard 232 refers to a standard originally introduced in 1960 for serial communication transmission of data. It formally defines signals connecting between a DTE such as a computer terminal, and a DCE, such as a modem. The standard defines the electrical characteristics and timing of signals, the meaning of signals, and the physical size and pinout of connectors. The current version of the standard is TIA-232-F Interface Between Data Terminal Equipment and Data Circuit-Terminating Equipment Employing Serial Binary Data Interchange, issued in 1997. The RS-232 standard had been commonly used in computer serial ports.

Synchronous optical networking

Synchronous optical networking (SONET) and synchronous digital hierarchy (SDH) are standardized protocols that transfer multiple digital bit streams synchronously over optical fiber using lasers or highly coherent light from light-emitting diodes (LEDs). At low transmission rates data can also be transferred via an electrical interface. The method was developed to replace the plesiochronous digital hierarchy (PDH) system for transporting large amounts of telephone calls and data traffic over the same fiber without the problems of synchronization.

A universal asynchronous receiver-transmitter is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. The electric signaling levels and methods are handled by a driver circuit external to the UART. A UART is usually an individual integrated circuit (IC) used for serial communications over a computer or peripheral device serial port. One or more UART peripherals are commonly integrated in microcontroller chips. A related device, the universal synchronous and asynchronous receiver-transmitter (USART) also supports synchronous operation.

Serial communication Type of data transfer

In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are sent as a whole, on a link with several parallel channels.

Asynchronous serial communication is a form of serial communication in which the communicating endpoints' interfaces are not continuously synchronized by a common clock signal. Instead of a common synchronization signal, the data stream contains synchronization information in form of start and stop signals, before and after each unit of transmission, respectively. The start signal prepares the receiver for arrival of data and the stop signal resets its state to enable triggering of a new sequence.

A Controller Area Network is a robust vehicle bus standard designed to allow microcontrollers and devices to communicate with each other in applications without a host computer. It is a message-based protocol, designed originally for multiplex electrical wiring within automobiles to save on copper, but is also used in many other contexts.

Source-Synchronous clocking refers to a technique used for timing symbols on a digital interface. Specifically, it refers to the technique of having the transmitting device send a clock signal along with the data signals. The timing of the unidirectional data signals is referenced to the clock sourced by the same device that generates those signals, and not to a global clock. Compared to other digital clocking topologies like system-synchronous clocks, where a global clock source is fed to all devices in the system, a source-synchronous clock topology can attain far higher speeds.

Synchronous and asynchronous transmissions are two different methods of transmission synchronization. Synchronous transmissions are synchronized by an external clock, while asynchronous transmissions are synchronized by special signals along the transmission medium.

Column Access Strobe (CAS) latency, or CL, is the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins.

A universal synchronous and asynchronous receiver-transmitter (USART) is a type of a serial interface device that can be programmed to communicate asynchronously or synchronously. See universal asynchronous receiver-transmitter (UART) for a discussion of the asynchronous capabilities of these devices.

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In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems.

References

  1. Standard VITA 17-199x, VMEbus International Trade Association (VITA), http://www.vita.com/
  2. http://www.mc.com/uploadedFiles/Echotek_Series-FPDP-PMC-ds.pdf