The STEbus (also called the IEEE-1000 bus[1]) is a non-proprietary, processor-independent, computer bus with 8 data lines and 20 address lines. It was popular for industrial control systems in the late 1980s and early 1990s before the ubiquitous IBM PC dominated this market. STE stands for STandard Eurocard.[2]
Although no longer competitive in its original market, it is valid choice for hobbyists wishing to make 'home brew' computer systems. The Z80 and probably the CMOS 65C02 are possible processors to use. The standardized bus allows hobbyists to interface to each other's designs.
In the early 1980s, there were many proprietary bus systems, each with its own strengths and weaknesses. Most had grown in an ad-hoc manner, typically around a particular microprocessor. The S-100 bus is based on Intel 8080 signals, the STD Bus around Z80 signals, the SS-50 bus around the Motorola 6800, and the G64 bus around 6809 signals. This made it harder to interface other processors. Upgrading to a more powerful processor would subtly change the timings, and timing restraints were not always tightly specified. Nor were electrical parameters and physical dimensions. They usually used edge-connectors for the bus, which were vulnerable to dirt and vibration.
The VMEbus had provided a high-quality solution for high-performance 16-bit processors, using reliable DIN 41612 connectors and well-specified Eurocard board sizes and rack systems. However, these were too costly where an application only needed a modest 8-bit processor.
In the mid 1980s, the STEbus standard addressed these issues by specifying what is rather like a VMEbus simplified for 8-bit processors. The bus signals are sufficiently generic so that they are easy for 8-bit processors to interface with. The board size was usually a single-height Eurocard (100mm x 160mm) but allowed for double-height boards (233 x 160mm) as well.[3] The latter positioned the bus connector so that it could neatly merge into VME-bus systems.
IEEE Working Group P1000 initially considered simply repinning the STD Bus, replacing its card edge connector with the DIN41612 connector. But they decided to create a completely new high-performance 8-bit bus. They decided to make a bus more like the VMEbus and Futurebus. The STEbus was designed to be manufacturer independent, processor independent, and have multimaster capability.[4]
Maturity
The STEbus was very successful in its day. It was given the official standard IEEE1000-1987.
The STEbus is designed for 8-bit microprocessors. Processors that normally use a wider data bus (16-bit, etc.) can use the STEbus if the processor can handle data in byte-wide chunks, giving the slave as long as it needs to respond.[1]
The STEbus supported processors from the popular Z80, the 6809, to the 68020. The only popular micro notably absent was the 6502, because it did not naturally support wait-states while writing. The CMOS 65C02 did not have this shortcoming, but this was rarer and more expensive than the NMOS 6502 and Z80. The 6809 used cycle stretching.
Peripheral boards included prototyping boards, disc controllers, video cards, serial I/O, analogue and digital I/O. The STEbus achieved its goal of providing a rack-mounting system robust enough for industrial use, with easily interchangeable boards and processor independence.[5]
Researchers describe STEbus systems as rugged, adaptable, and cost effective.[6]
Decline
The STEbus market began to decline as the IBM PC made progress into industrial control systems. Customers opted for PC-based products as the software base was larger and cheaper. More programmers were familiar with the PC and did not have to learn new systems.
Memory costs fell, so there was less reason to have bus-based memory expansion when one could have plenty on the processor board. So despite the disadvantages, manufacturers created industrial PC systems and eventually dropped other bus systems. As time went on, PC systems did away with the need for card cages and backplanes by moving to the PC/104 format where boards stack onto each other. While not as well-designed as the STEbus, PC/104 is good enough for many applications.[citation needed] The major manufacturers from its peak period now support STEbus mostly for goodwill with old customers who bought a lot of product from them.
As of 2013, some manufacturers still support STEbus, G64, Multibus II, and other legacy bussed systems.[7]
The IEEE have withdrawn the standard, not because of any faults but because it is no longer active enough to update.
Physical format
3U Eurocard - The most common size was the 100 x 160mm Eurocard.
6U Eurocard - Rare, sometimes used in VMEbus hybrid boards
VME/STE hybrid boards have the STEbus and VMEbus sharing the VME P2 connector, VME signals on row b. For this reason, STEbus boards may not use row b for any purpose.
Pinout
STEbus pinout Seen looking into backplane socket
num.
name
a b c
name
1
GND
o + o
GND
2
+5V
o + o
+5V
3
D0
o + o
D1
4
D2
o + o
D3
5
D4
o + o
D5
6
D6
o + o
D7
7
A0
o + o
GND
8
A2
o + o
A1
9
A4
o + o
A3
10
A6
o + o
A5
11
A8
o + o
A7
12
A10
o + o
A9
13
A12
o + o
A11
14
A14
o + o
A13
15
A16
o + o
A15
16
A18
o + o
A17
17
CM0
o + o
A19
18
CM2
o + o
CM1
19
ADRSTB*
o + o
GND
20
DATACK*
o + o
DATSTB*
21
TFRERR*
o + o
GND
22
ATNRQ0*
o + o
SYSRST*
23
ATNRQ2*
o + o
ATNRQ1*
24
ATNRQ4*
o + o
ATNRQ3*
25
ATNRQ6*
o + o
ATNRQ5*
26
GND
o + o
ATNRQ7*
27
BUSRQ0*
o + o
BUSRQ1*
28
BUSAK0*
o + o
BUSAK1*
29
SYSCLK
o + o
VSTBY
30
-12V
o + o
+12V
31
+5V
o + o
+5V
32
GND
o + o
GND
Active low signals indicated by asterisk.
GND: Ground reference voltage
+5V: Powers most logic.
+12V and -12V: Primarily useful for RS232 buffer power. The +12V has been used for programming voltage generators. Both can be used in analogue circuitry, but note that these are primarily power rails for digital circuitry and as such they often have digital noise. Some decoupling or local regulation is recommended for analogue circuitry.
VSTBY: Standby voltage. Optional. This line is reserved for carrying a battery backup voltage to boards that supply or consume it. A 3.6V NiCad battery is a common source. The STEbus spec is not rigid about where this should be sourced from.
In practice, this means that most boards requiring backup power tend to play safe and have a battery on board, often with a link to allow it to supply or accept power from VSTBY. Hence you can end up with more batteries in your system than you need, and you must then take care that no more than one battery is driving VSTBY.
D0...7: Data bus. This is only 8-bits wide, but most I/O or memory-mapped peripherals are byte-oriented.
A0...19: Address bus. This allows up to 1 MByte of memory to be addressed. Current technology is such that processor requiring large amounts of memory have this on the processor board, so this is not a great limitation. I/O space is limited to 4K, to simplify I/O address decoding to a practical level. A single 74LS688 on each slave board can decode A11...A4 to locate I/O slave boards at any I/O address with 16-byte alignment.[1][8] Typically 8 small jumpers or a single unit of 8 DIP switches or two binary-coded hexadecimal rotary switches are used to give each I/O slave board a unique address.[1]
CM0...2: Command Modifiers. These indicate the nature of the data transfer cycle.
Command modifiers
CM 2 1 0
Function
1 1 1
read
memory
1 1 0
write
1 0 1
read
I/O
1 0 0
write
0 1 1
Vector-fetch
0 1 0
reserved
0 0 1
0 0 0
A simple processor board can drive CM2 high for all bus access, drive CM1 from a memory/not_IO signal, and CM0 from a read/not_write signal. CM2 low state is used only during "attention request" phases (for interrupts and/or DMA cycles) for Explicit Response mode. When Implicit Response mode is used, the bus master polls the slave boards to find which one has triggered the Attention Request and reset the signal source. In that case, Vector-fetch is not used.
ATNRQ0...7*: Attention Requests. These are reserved for boards to signal for processor attention, a term which covers Interrupts and Direct Memory Access (DMA). The wise choice of signal does not commit these lines to being specific types, such as maskable interrupts, non-maskable interrupts, or DMA.
The number of Attention Requests reflects the intended role of the STEbus, in real-time control systems. Eight lines can be priority encoded into three bits, and is a reasonably practical number of lines to handle.
BUSRQ0...1* and BUSAK0...1*: Bus Requests and Bus Acknowledge. Optional. Used by multi-master systems.
The number of Attention Requests reflects that the STEbus aims to be simple. Single-master systems are the norm, but these signals allow systems to have secondary bus masters if needed.
DATSTB*: Data Strobe. This is the primary signal in data transfer cycles.
DATACK*: Data Acknowledge. A slave will assert this signal when to acknowledge the safe completion of a data transfer via the STEbus. This allows STEbus systems to use plug-in cards with a wide variety of speeds, an improvement on earlier bus systems that require everything to run at the speed of the slowest device.
TFRERR*: Transfer Error. A slave will assert this signal when acknowledging the erroneous completion of a data transfer via the STEbus.
ADRSTB*: Address Strobe. This signal indicates the address bus is valid. Originally, this had some practical use in DRAM boards which could start strobing the address lines into DRAM chips before the data bus was ready. The STEbus spec was later firmed up to say that slaves were not allowed to start transfers until DATSTB* was ready, so ADRSTB* has become quite redundant. Nowadays, STEbus masters can simply generate DATSTB* and ADRSTB* from the same logic signal. Slaves simply note when DATSTB* is valid (since the bus definition insists that the address will also be valid at the same time as the data). ADRSTB* also allows a bus master to retain ownership of the bus during indivisible read-modify-write cycles, by remaining active during two DATSTB* pulses. The sequence matches that of the 68008's bus. Other CPUs may require additional logic to create read-modify-write cycles.
SYSCLK: System Clock. Fixed at 16MHz. 50% duty cycle.
The backplane connects all the DIN connectors in parallel. So a STEbus expansion card sees the same signals no matter which slot of the backplane it is plugged into.[8]
Types of signals
Signal
Type
A[19..0]
Tri-state
D[7..0]
Tri-state
CM[2..0]
Tri-state
ADRSTB*
Tri-state
DATSTB*
Tri-state
DATACK*
Open collector / Open drain
BUSRQ[1..0]*
Open collector / Open drain
TFRERR*
Open collector / Open drain
ATNREQ[7..0]*
Open collector / Open drain
SYSRST*
Open collector / Open drain
SYSCLK
Totem-pole
BUSAK[1..0]*
Totem-pole
The SYSCLK must be driven by only one board in the system. As explained in the standard, this signal shall be generated by the System Controller.
The System Controller is also in charge of the Bus Arbitration in case there are multiple masters. When there is only one Master, the System Controller is not needed, and SYSCLK can be generated by the Master board
Technical notes
Signal inputs must be Schmitt trigger
Only one TTL load per bus line signal per board
Signal outputs must have a fanout of 20
Backplane can have up to 21 sockets
50mm maximum length of bus signal line PCB trace on any board
500 mm maximum length of bus signal line length
Active bus-termination recommended (270R pull-up to 2.8V)
7400 series chips are often used to build custom control boards, directly connected to the STEbus.[8]
Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest. Category
Related Research Articles
A backplane is a group of electrical connectors in parallel with each other, so that each pin of each connector is linked to the same relative pin of all the other connectors, forming a computer bus. It is used to connect several printed circuit boards together to make up a complete computer system. Backplanes commonly use a printed circuit board, but wire-wrapped backplanes have also been used in minicomputers and high-reliability applications.
In computer architecture, a bus is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components and software, including communication protocols.
Eurocard is an IEEE standard format for printed circuit board (PCB) cards that can be plugged together into a standard chassis which, in turn, can be mounted in a 19-inch rack. The chassis consists of a series of slotted card guides on the top and bottom, into which the cards are slid so they stand on end, like books on a shelf. At the spine of each card is one or more connectors which plug into mating connectors on a backplane that closes the rear of the chassis.
In computing, an expansion card is a printed circuit board that can be inserted into an electrical connector, or expansion slot on a computer's motherboard to add functionality to a computer system. Sometimes the design of the computer's case and motherboard involves placing most of these slots onto a separate, removable card. Typically such cards are referred to as a riser card in part because they project upward from the board and allow expansion cards to be placed above and parallel to the motherboard.
VMEbus is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors, but uses its own signalling system, which Eurocard does not define. It was first developed in 1981 and continues to see widespread use today.
The S-100 bus or Altair bus, IEEE 696-1983(withdrawn), is an early computer bus designed in 1974 as a part of the Altair 8800. The S-100 bus was the first industry standard expansion bus for the microcomputer industry. S-100 computers, consisting of processor and peripheral cards, were produced by a number of manufacturers. The S-100 bus formed the basis for homebrew computers whose builders implemented drivers for CP/M and MP/M. These S-100 microcomputers ran the gamut from hobbyist toy to small business workstation and were common in early home computers until the advent of the IBM PC.
Futurebus, or IEEE 896, is a computer bus standard, intended to replace all local bus connections in a computer, including the CPU, memory, plug-in cards and even, to some extent, LAN links between machines. The effort started in 1979 and didn't complete until 1987, and then immediately went into a redesign that lasted until 1994. By this point, implementation of a chip-set based on the standard lacked industry leadership. It has seen little real-world use, although custom implementations continue to be designed and used throughout industry.
A PCI Mezzanine Card or PMC is a printed circuit board assembly manufactured to the IEEE P1386.1 standard. This standard combines the electrical characteristics of the PCI bus with the mechanical dimensions of the Common Mezzanine Card or CMC format.
Electronic test equipment is used to create signals and capture responses from electronic devices under test (DUTs). In this way, the proper operation of the DUT can be proven or faults in the device can be traced. Use of electronic test equipment is essential to any serious work on electronics systems.
The Serial Peripheral Interface (SPI) is a synchronous serial communication interface specification used for short-distance communication, primarily in embedded systems. The interface was developed by Motorola in the mid-1980s and has become a de facto standard. Typical applications include Secure Digital cards and liquid crystal displays.
CompactPCI is a computer bus interconnect for industrial computers, combining a Eurocard-type connector and PCI signaling and protocols. Boards are standardized to 3U or 6U sizes, and are typically interconnected via a passive backplane. The connector pin assignments are standardized by the PICMG US and PICMG Europe organizations. The connectors and the electrical rules allow for eight boards in a PCI segment. Multiple bus segments are allowed with bridges.
Multibus is a computer bus standard used in industrial systems. It was developed by Intel Corporation and was adopted as the IEEE 796 bus.
Released as the expansion bus of the Commodore Amiga 3000 in 1990, the Zorro III computer bus was used to attach peripheral devices to an Amiga motherboard. Designed by Commodore International lead engineer Dave Haynie, the 32-bit Zorro III replaced the 16-bit Zorro II bus used in the Amiga 2000. As with the Zorro II bus, Zorro III allowed for true Plug and Play autodetection wherein devices were dynamically allocated the resources they needed on boot.
The Sun-2 series of UNIX workstations and servers was launched by Sun Microsystems in November 1983. As the name suggests, the Sun-2 represented the second generation of Sun systems, superseding the original Sun-1 series. The Sun-2 series used a 10 MHz Motorola 68010 microprocessor with a proprietary Sun-2 Memory Management Unit (MMU), which enabled it to be the first Sun architecture to run a full virtual memory UNIX implementation, SunOS 1.0, based on 4.1BSD. Early Sun-2 models were based on the Intel Multibus architecture, with later models using VMEbus, which continued to be used in the successor Sun-3 and Sun-4 families.
Computer-Aided Measurement And Control (CAMAC) is a standard bus and modular-crate electronics standard for data acquisition and control used in particle detectors for nuclear and particle physics and in industry. The bus allows data exchange between plug-in modules and a crate controller, which then interfaces to a PC or to a VME-CAMAC interface.
VPX, also known as VITA 46, refers to a set of standards for connecting components of a computer, commonly used by defense contractors. Some are ANSI standards such as ANSI/VITA 46.0–2019. VPX provides VMEbus-based systems with support for switched fabrics over a new high speed connector. Defined by the VMEbus International Trade Association (VITA) working group starting in 2003, it was first demonstrated in 2004, and became an ANSI standard in 2007.
DIN 41612 was a DIN standard for electrical connectors that are widely used in rack based electrical systems. Standardisation of the connectors is a pre-requisite for open systems, where users expect components from different suppliers to operate together. The most widely known use of DIN 41612 connectors is in the VMEbus and NuBus systems. The standard has withdrawn in favor of international standards IEC 60603-2 and EN 60603-2.
FASTBUS is a computer bus standard, originally intended to replace Computer Automated Measurement and Control (CAMAC) in high-speed, large-scale data acquisition. It is also a modular crate electronics standard commonly used in data acquisition systems in particle detectors.
The Europe Card Bus is a computer bus developed in 1977 by the company Kontron, mainly for the 8-bit Zilog Z80, Intel 8080 and Intel 8085 microprocessor families.
Modular crate electronics are a general type of electronics and support infrastructure commonly used for trigger electronics and data acquisition in particle detectors. These types of electronics are common in such detectors because all the electronic pathways are made by discrete physical cables connecting together logic blocks on the fronts of modules. This allows circuits to be designed, built, tested, and deployed very quickly as an experiment is being put together. Then the modules can all be removed and used again when the experiment is done.
This page is based on this Wikipedia article Text is available under the CC BY-SA 4.0 license; additional terms may apply. Images, videos and audio are available under their respective licenses.
