SystemVerilog DPI (Direct Programming Interface) is an interface which can be used to interface SystemVerilog with foreign languages. These foreign languages can be C, C++, SystemC as well as others. DPIs consist of two layers: a SystemVerilog layer and a foreign language layer. Both the layers are isolated from each other.
Direct Programming Interface (DPI) allows direct inter language function calls between the SystemVerilog and Foreign language. The functions implemented in Foreign language can be called from SystemVerilog and such functions are called Import functions. Similarly, functions implemented in SystemVerilog can be called from Foreign language (C/C++ or System C); such functions are called Export functions. DPIs allow transfer of data between two domains through function arguments and return.
1) Function Import:- A function implemented in Foreign language can be used in SystemVerilog by importing it. A Foreign language function used in SystemVerilog is called Imported function.
A function whose results solely depends on the value of its input arguments with no side effects is called Pure function.
An Imported task or function which calls "Exported" tasks or functions or accesses SystemVerilog data objects other than its actual arguments is called Context task or function.
1) A Context Imported task or function can access (read or write) any SystemVerilog data object by calling (PLI/VPI) or by calling Export task or function. Therefore, a call to Context task or function is a barrier for SystemVerilog compiler optimization.
import"DPI-C" function int calc_parity (input int a);
export"DPI-C"my_cfunction=functionmyfunction;
SystemVerilog code can call Unix functions directly by importing them, with no need for a wrapper.
#include<stdio.h>#include<stdlib.h>externintadd(){inta=10,b=20;a=a+b;printf("Addition Successful and Result = %d\n",a);returna;}
moduletb_dpi;import"DPI-C"functionintadd();import"DPI-C"functionintsleep(inputintsecs);intj;initialbegin$display("Entering in SystemVerilog Initial Block");#20j=add();$display("Value of J = %d",j);$display("Sleeping for 3 seconds with Unix function");sleep(3);$display("Exiting from SystemVerilog Initial Block");#5$finish;endendmodule
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