| Paradigms | Multi-paradigm: procedural, imperative, structured, object-oriented |
|---|---|
| Family | Wirth Oberon |
| Designed by | Niklaus Wirth |
| Developer | ETH Zurich |
| First appeared | June 1995 |
| Typing discipline | Static, strong |
| Scope | Lexical (static) |
| Implementation language | Oberon |
| Influenced by | |
| ALGOL, Pascal, Modula | |
Lola is designed to be a simple hardware description language for describing synchronous, digital circuits. Niklaus Wirth developed the language to teach digital design on field-programmable gate arrays (FPGAs) to computer science students while a professor at ETH Zurich.
The purpose of Lola is to statically describe the structure and function of hardware components and of the connections between them. A Lola text is composed of declarations and statements. It describes digital electronics hardware on the logic gate level in the form of signal assignments. Signals are combined using operators and assigned to other signals. Signals and the respective assignments can be grouped together into data types. An instance of a type is a hardware component. Types can be composed of instances of other types, thereby supporting a hierarchical design style and they can be generic, e.g., parametrizable with the word width of a circuit.
All of the concepts mentioned above are demonstrated in the following example of a circuit for adding binary data. First, a fundamental building block (TYPE Cell) is defined, then this Cell is used to declare a cascade of word-width 8, and finally the Cells are connected to each other. The MODULE Adder defined in this example can serve as a building block on a higher level of the design hierarchy.
MODULE Adder; TYPE Cell; (* Composite Type *) IN x,y,ci:BIT; (* input signals *) OUT z,co:BIT; (* output signals *) BEGIN z:=x-y-ci; co:=x*y+x*ci+y*ci; END Cell; CONST N:=8; IN X,Y:[N]BIT; ci:BIT; (* input signals *) OUT Z:[N]BIT; co:BIT; (* output signals *) VAR S:[N]Cell; (* composite type instances *) BEGIN S.0(X.0, Y.0, ci); (* inputs in cell 0 *) FOR i:=1..N-1 DO S.i(X.i,Y.i,S[i-1].co); (* inputs in cell i *) END; FOR i:=0..N-1 DO Z.i:=S.i.z; END; co:=S.7.co; END Adder.
Wirth describes Lola from a user's perspective in his book Digital Circuit Design. A complementary view on the details of the Lola compiler's implementation can be found in Wirth's technical report Lola System Notes. An overview of the whole system of tools for digital design is the technical report Tools for Digital Circuit Design using FPGAs (containing a copy of the report on the language Lola Lola: An Object-Oriented Logic Description Language).
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