Native name | 君正集成电路股份有限公司 |
---|---|
Ingenic Semiconductor | |
Industry | Fabless semiconductors, Semiconductors, Integrated circuit design |
Founded | 2005 |
Founder | Liu Qiang (刘强) |
Headquarters | Beijing, China |
Key people | Liu Qiang (Chairman) |
Products | CPUs (XBurst), SoCs (JZxxx) |
Website | www |
Ingenic Semiconductor is a Chinese fabless semiconductor company based in Beijing, China founded in 2005. They purchased licenses for the MIPS architecture instruction sets in 2009 and design CPU-microarchitectures based on them. They also design system on a chip products including their CPUs and licensed semiconductor intellectual property blocks from third parties, such as Vivante Corporation, commission the fabrication of integrated circuits at semiconductor fabrication plants and sell them.
Early XBurst CPU microarchitectures were based upon the MIPS32 revision 1 and newer models are based on the MIPS32 revision 2 instruction set. It implements an 8-stage pipeline XBurst CPU technology consists of 2 parts:
XBurst2 development was, in summer 2013, expected to be completed by the first half of 2014. [4] However, XBurst2 was eventually introduced in 2020 in the X2000, [5] with the microarchitecture offering a dual-issue/dual-threaded CPU design based on MIPS32 Release 5. [6]
SoCs incorporating the XBurst microarchitecture: [7]
Model | Launch | Fab (nm) | XBurst version | MIPS architecture version | Core clock (MHz) | L1 Dcache [kB] | L1 Icache [kB] | L2 cache [kB] | FPU | GPU | VPU | Datasheet | Package | Notes |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Jz4730 | 2006 [8] | 180 | XBurst1 | MIPS32 rev1 | 336 | 16 | 16 | N/A | N/A | N/A | N/A | Jz4730 | BGA256 | |
Jz4740 | 2007 [8] [9] | 180 | XBurst1 | MIPS32 rev1 + SIMD | 360 | Jz4740 | BGA193 | adds RMVB, MPEG-1/2/4 decoding capability up to D-1 resolution thanks to SIMD instruction set | ||||||
Jz4720 | 2007 [8] [9] | 180 | XBurst1 | 240 | Jz4720 | COB186 | ||||||||
Jz4725B | 2009 [10] [11] | 160 | XBurst1 | 360 | Jz4725 | QFP128 | ||||||||
Jz4750 | 2009 [10] [11] | 180 | XBurst1 | MIPS32 rev1 + SIMD2 | 360 | 480p | Jz4750 | BGA256 | adds TV encoder | |||||
Jz4755 | 2009 | 160 | XBurst1 | 400 | 576P | Jz4755 | QFP176 | second core is for video processing only | ||||||
Jz4760 | 2010 | 130 | XBurst1 | 528 [12] | yes | Vivante GC200 | 720p | JZ4760 | BGA345 | second core is for video processing only, IEEE754-complient FPU | ||||
600 | JZ4760B | |||||||||||||
Jz4770 | 2011 | 65 | XBurst1 | MIPS32 rev2 + SIMD2 | 1000 | 256 | yes | Vivante GC860 [13] | 1080p | JZ4770 | BGA379 | 1080p video decoding unit for h.264, VC-1 and VP8 (a secondary 500 MHz MIPS processor with SIMD extension) | ||
Jz4775 [14] | 65 | XBurst1 | MIPS32 rev2 + SIMD2 | 1000 | 32 | 32 | 256 | yes | X2D Core | 720p | JZ4775 | BGA314 | 720p video decoding unit for h.264, VC-1 and VP8 (a secondary 500 MHz MIPS processor with SIMD extension) | |
Jz4780 | 2012 | 40 | XBurst1 | Dual MIPS32 rev2 + SIMD2 | 1200 [15] | 32 each | 32 each | 512 | yes | PowerVR SGX 540 | 1080p | JZ4780 | BGA390 | Dual core (SMP) XBurst CPU, 1080p video decoding unit for h.264, VC-1 and VP8 (a secondary 500 MHz MIPS processor with SIMD extension) |
x1000 [16] | 2015 [17] | 65 | XBurst1 | MIPS32 + SIMD | 1000 | 16 | 16 | 128 | yes | x1000 Archived 2022-10-03 at the Wayback Machine | BGA190 | LPDDR 32/64MB, SLCD interface, Camera interface, Audio Codec up to 192 kHz | ||
x2000 | 2020 [18] | 28 | XBurst2 | Dual MIPS32 + SIMD | 1500 | 32 each | 32 each | 512 | yes | 1080p | x2000 | BGA270 | LPDDR2/3 128/256MB |
XBurst1-based SoCs are commonly used in tablet computers, portable media players, digital photo frames and GPS devices:
The JZ4730 CPU is used in the Skytone Alpha-400 and its variants. [19] The Jz4720 is utilized in the Copyleft Hardware project Ben NanoNote. [20] Another popular device, the Dingoo gaming handheld, uses the JZ4732, a de facto JZ4740. Game Gadget is using the JZ4750. Velocity Micro T103 Cruz and T301 Cruz 7-Inch Android 2.0 Tablets used JZ4760. The JZ4770 SoC is used in several of the Ainol Novo 7 Android tablets [21] and 3Q Tablet PC Qoo! IC0707A/4A40. JZ4770 SoC is also used in the dedicated handheld Neo Geo X [22] and open source handheld GCW Zero [23] running on OpenDingux. [24] The JZ4780 is used in ImgTec's MIPS based single-board computer (SBC); The Creator CI20 [25]
Manufacturer | Model(s) | Type | CPU | Operating System |
---|---|---|---|---|
Qi Hardware | Ben NanoNote | Handheld Computer | Ingenic JZ4720 | OpenWRT (custom) |
Skytone | Skytone Alpha-400 | Netbook | Ingenic JZ4730 | Linux |
Dingoo Digital | Dingoo | Handheld Game Console | Ingenic JZ4732 | OpenDingux |
Blaze Europe | Game Gadget | Handheld Game Console | Ingenic JZ4750 | unknown |
Velocity Micro | Cruz T103, T301 | Tablet | Ingenic JZ4760 | Android 2.0 |
GCW | GCW Zero | Handheld Game Console | Ingenic JZ4770 | OpenDingux |
unknown | Neo Geo X | Handheld Game Console | Ingenic JZ4770 | unknown |
ImgTec | Creator CI20 | Single-board computer | Ingenic JZ4780 | Linux |
Processor design is a subfield of computer science and computer engineering (fabrication) that deals with creating a processor, a key component of computer hardware.
MIPS is a family of reduced instruction set computer (RISC) instruction set architectures (ISA) developed by MIPS Computer Systems, now MIPS Technologies, based in the United States.
MIPS Tech LLC, formerly MIPS Computer Systems, Inc. and MIPS Technologies, Inc., is an American fabless semiconductor design company that is most widely known for developing the MIPS architecture and a series of RISC CPU chips based on it. MIPS provides processor architectures and cores for digital home, networking, embedded, Internet of things and mobile applications.
ARM is a family of RISC instruction set architectures (ISAs) for computer processors. Arm Holdings develops the ISAs and licenses them to other companies, who build the physical devices that use the instruction set. It also designs and licenses cores that implement these ISAs.
XScale is a microarchitecture for central processing units initially designed by Intel implementing the ARM architecture instruction set. XScale comprises several distinct families: IXP, IXC, IOP, PXA and CE, with some later models designed as system-on-a-chip (SoC). Intel sold the PXA family to Marvell Technology Group in June 2006. Marvell then extended the brand to include processors with other microarchitectures, like Arm's Cortex.
A coprocessor is a computer processor used to supplement the functions of the primary processor. Operations performed by the coprocessor may be floating-point arithmetic, graphics, signal processing, string processing, cryptography or I/O interfacing with peripheral devices. By offloading processor-intensive tasks from the main processor, coprocessors can accelerate system performance. Coprocessors allow a line of computers to be customized, so that customers who do not need the extra performance do not need to pay for it.
The Emotion Engine is a central processing unit developed and manufactured by Sony Computer Entertainment and Toshiba for use in the PlayStation 2 video game console. It was also used in early PlayStation 3 models sold in Japan and North America to provide PlayStation 2 game support. Mass production of the Emotion Engine began in 1999 and ended in late 2012 with the discontinuation of the PlayStation 2.
In electronics, computer science and computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as μarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular processor. A given ISA may be implemented with different microarchitectures; implementations may vary due to different goals of a given design or due to shifts in technology.
Loongson is the name of a family of general-purpose, MIPS architecture-compatible, later in-house LoongArch architecture microprocessors, as well as the name of the Chinese fabless company that develops them. The processors are alternately called Godson processors, which is described as its academic name.
Alchemy is a family of ultra low power embedded microprocessors originally designed by Alchemy Semiconductor for communication and media devices. Alchemy processors are SoCs integrating a CPU core, a memory controller, and a varying set of peripherals. All members of the family use the Au1 CPU core implementing the MIPS32 instruction set by MIPS Technologies.
V850 is a 32-bit RISC CPU architecture produced by Renesas Electronics for embedded microcontrollers. It was designed by NEC as a replacement for their earlier NEC V60 family, and was introduced shortly before NEC sold their designs to Renesas in the early 1990s. It has continued to be developed by Renesas as of 2018.
Bit slicing is a technique for constructing a processor from modules of processors of smaller bit width, for the purpose of increasing the word length; in theory to make an arbitrary n-bit central processing unit (CPU). Each of these component modules processes one bit field or "slice" of an operand. The grouped processing components would then have the capability to process the chosen full word-length of a given software design.
AVR32 is a 32-bit RISC microcontroller architecture produced by Atmel. The microcontroller architecture was designed by a handful of people educated at the Norwegian University of Science and Technology, including lead designer Øyvind Strøm and CPU architect Erik Renno in Atmel's Norwegian design center.
SSE4 is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper; more precise details of 47 instructions became available at the Spring 2007 Intel Developer Forum in Beijing, in the presentation. SSE4 extended the SSE3 instruction set which was released in early 2004. All software using previous Intel SIMD instructions are compatible with modern microprocessors supporting SSE4 instructions. All existing software continues to run correctly without modification on microprocessors that incorporate SSE4, as well as in the presence of existing and new applications that incorporate SSE4.
Intel Atom is a line of IA-32 and x86-64 instruction set ultra-low-voltage processors by Intel Corporation designed to reduce electric consumption and power dissipation in comparison with ordinary processors of the Intel Core series. Atom is mainly used in netbooks, nettops, embedded applications ranging from health care to advanced robotics, mobile Internet devices (MIDs) and phones. The line was originally designed in 45 nm complementary metal–oxide–semiconductor (CMOS) technology and subsequent models, codenamed Cedar, used a 32 nm process.
The ARM Cortex-A5 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture announced in 2009.
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Creator is a family of single-board computers developed by Imagination Technologies to promote educational research and software development based on the MIPS architecture. The first board in the platform, the Creator Ci20, was released in August 2014. A second development kit called Creator Ci40 was introduced through a Kickstarter campaign in November 2015.
Since 1985, many processors implementing some version of the MIPS architecture have been designed and used widely.