It has been suggested that List of electrical engineering software be merged into this article. (Discuss) Proposed since April 2024. |
This page is a comparison of electronic design automation (EDA) software which is used today to design the near totality of electronic devices. Modern electronic devices are too complex to be designed without the help of a computer. Electronic devices may consist of integrated circuits (ICs), printed circuit boards (PCBs), field-programmable gate arrays (FPGAs) or a combination of them. Integrated circuits may consist of a combination of digital and analog circuits. These circuits can contain a combination of transistors, resistors, capacitors or specialized components such as analog neural networks, antennas or fuses.
The design of each of these electronic devices generally proceeds from a high- to a low-level of abstraction. For FPGAs the low-level description consists of a binary file to be flashed into the gate array, while for an integrated circuit the low-level description consists of a layout file which describes the masks to be used for lithography inside a foundry.
Each design step requires specialized tools, and many of these tools can be used for designing multiple types of electronic circuits. For example, a program for high-level digital synthesis can usually be used both for IC digital design as well as for programming an FPGA. Similarly, a tool for schematic-capture and analog simulation can generally be used both for IC analog design and for PCB design.
In the case of integrated circuits (ICs) for example, a single chip may contain today more than 20 billion transistors (which is more than two transistors for every human on Earth) and, as a general rule, every single transistor in a chip must work as intended. Since a single VLSI mask set can cost up to 10-100 millions, trial and error approaches are not economically viable. To minimize the risk of any design mistakes, the design flow is heavily automatized. EDA software assists the designer in every step of the design process and every design step is accompanied by heavy test phases. Errors may be present in the high-level code already, such as for the Pentium FDIV floating-point unit bug, or it can be inserted all the way down to physical synthesis, such as a missing wire, or a timing violation.
The world of electronic design automation (EDA) software for integrated circuit (IC) design is dominated by the three vendors Synopsys, Cadence Design Systems and Siemens EDA (Formerly Mentor Graphics, acquired in 2017 by Siemens) which have a revenue respectively of 4,2 billion US$, 3 billion US$ and 1,3 billion US$.
These vendors offer software bundles which allow to cover the full spectrum of IC design, from HDL synthesis to physical synthesis and verification.
The development of EDA software is tightly connected with the development of technology nodes. The properties of a specific semiconductor foundry, such as the transistor models, the physical characteristics and the design rules, are usually encoded in file formats which are proprietary to one or more EDA vendors. This set of files constitutes the process design kit (PDK) and it is usually developed as a joint effort between the foundry and an EDA vendor. Foundries therefore usually release PDKs which are compatible only for one specific EDA bundle. The information contained inside PDKs is usually considered confidential. PDKs are therefore usually protected by non disclosure agreements (NDAs) and may be shipped in an incomplete or in an encrypted form to the designers.
Application and developer | Platform | Latest release | Schematic? | Simulation? | PCB editing? | User Interface Language(s) | Imports | Exports | Scripting support | |
---|---|---|---|---|---|---|---|---|---|---|
Version | Date | |||||||||
Advanced Design System by Keysight EEsof EDA | POSIX [1] | 2019 [2] | 2018-11-15 | Yes | Yes, full-wave electromagnetic simulation and netlist simulation | Yes | en | HSPICE, SPICE, Spectre netlists; Gerber, Excellon, ODB++, artwork; more | HSPICE, SPICE, Spectre netlists; Gerber, Excellon, ODB++, artwork; more | Python, Application Extension Language (proprietary; "AEL") |
Windows [1] | ||||||||||
SuSE [1] | ||||||||||
RHEL [1] | ||||||||||
CircuitLogix by Logic Design | Windows | 10 | 2019-01 | Yes | Yes, netlist simulation (analog and digital) | Yes | en | SPICE, Gerber, DXF | SPICE, PDF, Gerber, DXF | |
LTspice by Analog Devices (free) | Windows, macOS, Wine | 24.0.9 | 2024-02-02 | Yes | Yes, netlist simulation (analog) | No | en | netlist | netlist | |
Micro-Cap (free, end-of-life) | Windows | 12.2.0.5 | 2021-06-17 (end-of-life) | Yes | Yes, netlist simulation (analog and digital) | No | en, jp | HSPICE, PSPICE, SPICE3, netlists, Images, IBIS, Touchstone | SPICE text file, netlist, BOM, Protel, Accel, OrCad, PADS netlists, Schematic and Analysis Plots Images, Numeric Output Text, Excel | |
Wine | ||||||||||
Of these, LTSpice and Micro-cap are free proprietary softwares based on SPICE. Micro-Cap was released as freeware in July 2019, when its parent company Spectrum Software closed down while LTSpice has been free for a long time.
Application and developer | Platform | Latest release | Schematic? | Simulation? | PCB editing? | User Interface Language(s) | Imports | Exports | Scripting support | |
---|---|---|---|---|---|---|---|---|---|---|
Version | Date | |||||||||
Altium Designer (former Protel) by Altium | Windows | 23.3 [3] | 2023-03-16 | Yes | Yes | Yes | Multilingual | OrCAD, Allegro, PADS Logic, PADS PCB, Expedition, DxDesigner, EAGLE, P-CAD, Gerber, STEP, Solidworks, IDF, more | 3D PDF, Gerber, Gerber X2, Excellon, ODB++, DXF, STEP, OrCAD, EAGLE, EDB, more | Delphi, JS, VB |
Wine | ||||||||||
CADSTAR, Board Designer, and Visula by Zuken | Windows | 2022.0 | 2022-08-31 | Yes | Yes, SI & PI | Yes | en | PADS, OrCAD, P-CAD, Protel, DXF, IDF | PDF, Gerber, Excellon, ODB++, DXF, IDF more | COM, macros |
CircuitMaker by Altium | Windows | 2 | 2021-07 | Yes | No | Yes | en | Importer Removed since Last Version (1.3) | Gerber, Excellon, DXF, STEP, PDF | None |
Wine | ||||||||||
CR-5000 by Zuken | POSIX | 13 | 2011-05-17 | Yes | Yes, SI & PI | Yes | en, jp | EDIF, DXF, IGES, IDF, BSDL, STEP, ACIS, Gerber, Excellon, more | PDF, Gerber, Excellon, ODB++ (must request [4] ), DXF, STEP, IPC D-356, IPC-2581, EPS, ACIS | |
Windows | ||||||||||
Unix | ||||||||||
Linux | ||||||||||
CR-8000 by Zuken | POSIX | 2020 | 2020-06-30 | Yes | Yes, SI & PI, IBIS-AMI/SERDES | Yes | en, jp | EDIF, DXF, IGES, IDF, BSDL, STEP, ACIS, Gerber, Excellon, more | PDF, Gerber, Excellon, ODB++ (must request [4] ), DXF, STEP, IPC D-356, IPC-2581, EPS, ACIS | |
Windows | ||||||||||
Unix | ||||||||||
Linux | ||||||||||
DesignSpark PCB by RS Components | Windows | 9.0.3 | 2020-07-08 | Yes | Yes, Spice | Yes | en | EAGLE, DXF, EDIF | Gerber, Excellon, ODB++, DXF, IDF, PDF, LPKF | |
DipTrace by Novarm | POSIX | 4.3.0.4 | 2023-01-18 | Yes | External (Spice netlist export) | Yes | 21 languages | Altium, Eagle, KiCad, OrCAD, P-CAD, PADS, Gerber, N/C Drill, DXF, BSDL Pinlist, Netlists | Gerber, Gerber X2, Excellon, ODB++, DXF, Eagle, P-CAD, PADS, OrCAD, IPC-D-356, STEP, VRML, Pick and Place, CSV, BOM | |
Windows | ||||||||||
Mac | ||||||||||
Wine | ||||||||||
EAGLE by Autodesk/CadSoft Computer | POSIX | 9.6.2 | 2020-05-27 | Yes | Ngspice | Yes | de, en, zh, hu, ru | EAGLE (XML), ACCEL (P-CAD, Altium, Protel), ULTIBOARD, Netlists, BMP, Custom | EAGLE (XML), Protel, Netlists, Images, Gerber, Gerber X2, Excellon, Sieb & Meyer, HPGL, PostScript/EPS, PDF, Images, HyperLynx, IDF, Custom | Proprietary User Language Programming (ULP) |
Windows | ||||||||||
Linux | ||||||||||
Mac | ||||||||||
EasyEDA | POSIX | 6.4.5 | 2020-08-19 | Yes | Ngspice | Yes | en, fr, de, pl, jp, ru, es, se, ua, zh ... | Altium, EAGLE, KiCad libraries, LTspice .asc/.asy files, JSON, Spice | PDF, PNG, SVG, JSON, Gerber, Excellon, Pick and Place CSV file, CSV-formatted drill chart, Bill of Materials CSV file, Altium netlist, FreePCB netlist, PADS Layout Netlist, Spice netlist. | JSON |
Windows | ||||||||||
Linux | ||||||||||
Mac | ||||||||||
ChromeOS as a Web application | ||||||||||
NI Ultiboard and Multisim by National Instruments | Windows | 14.2 [5] | 2019-05-19 | Yes | Yes | Yes | en | MS*, MP*, EWB, Spice, OrCAD, UltiCap, Protel, Gerber, DXF, Ultiboard 4&5, Calay | BOM, Gerber, Excellon, IGES (3D), DXF (2D & 3D), SVG | |
Web application [6] | ||||||||||
OrCAD | Windows | 17.4 - 22.1 | 2022-10-20 | Yes | Yes | Yes | en | EAGLE, PADS, Altium, STEP, DXF, IDF, IDX, OrCAD SDT, OrCAD Layout,OrCAD | PDF, Gerber, Gerber X2, Excellon drill/route, netlist, ODB++, DXF, IDF, IDX, STEP,3D PDF, IPC2581 | Tcl/TK, SKILL (Lisp) |
Proteus by Labcenter Electronics Ltd | Windows | 8.17 | 2023-12-11 | Yes | Yes | Yes | en | Gerber, BMP, DXF | PDF, Gerber, GerberX2, Excellon, ODB++, DXF, IDF, PKP, testpoint file, metafile, BMP. | internal script |
Pulsonix by WestDev Ltd | Windows | 12.5 | 2023 | Yes | Yes | Yes | en | Allegro, Altium, CadStar, EAGLE, OrCAD, PADS, P-CAD, Protel, Gerber, STEP, DXF, IDF, more | Gerber, Gerber X2, Excellon, ODB++, IPC-2581, PDF, DXF, STEP, IDF, BOM, more | Proprietary language, ActiveX |
Wine | ||||||||||
TARGET 3001! | Windows | 30.2.0.63 | 2020-12-14 | Yes | Yes | Yes | en, de, fr | EAGLE, DXF, Gerber, Gerber, Excellon, BMP, CXF, STEP 3D | Gerber, Gerber X2, Excellon, EAGLE, HPGL, G-Code (Milling), CXF, STEP 3D, Excel BOMs, Pick&Place, GenCAD, FABmaster, IPC D-356, Test points, Netlists, OBJ, POV-Ray, PDF | Package generator scripts, BOM scripts, printing and PDF generator scripts, 3D scripts |
Wine | ||||||||||
TINA | Windows | 12.0 | 2019-12 | Yes | Yes | Yes | 23 languages (en, de, fr, es and 19 other languages) | VHDL, Verilog, Verilog-A, and Verilog-AMS | VHDL, Verilog, Verilog-A, and Verilog-AMS | |
Linux | ||||||||||
MacOS | ||||||||||
Android | ||||||||||
Upverter | POSIX | N/A | 2019-05-10 | Yes | No | Yes | en | Altium, OrCad, PDF, OpenJSON, EAGLE | PDF, Gerber, Excellon, netlist, PADS Layout Netlist, Tempo Automation, Pick and Place CSV, High-Res PNG, STL, CSV-formatted drill chart, CSV-formatted list of all parts | |
Windows | ||||||||||
Web application | ||||||||||
123D Circuits by Autodesk | POSIX | N/A | Yes, + breadboard | Yes | Yes | en | EAGLE | Gerber | ||
Windows | ||||||||||
Web application | ||||||||||
Application and developer | Platform | Latest release | Schematic? | Simulation? | PCB editing? | User Interface Language(s) | Imports | Exports | Scripting support | |
Version | Date |
Free and open-source (FOSS) EDA software bundles are currently under fast development mainly thanks to the DARPA and Google's openROAD project. The OpenROAD project offers a complete stack of tools from high-level synthesis down to layout generation [7] The flow includes Yosys for logic synthesis, OpenLane for physical synthesis and targets the SkyWater 130nm PDK. The flow is currently utilized to submit design for free fabrication at Google. [8] [9] [ better source needed ]
High-level synthesis software can generally be used for the design of both application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs). Most high-level synthesis software is used to edit and verify code written in one of the mainstream hardware description languages (HDL) like VHDL or Verilog. Other tools instead operate at a higher level of abstraction and allow to synthesize HDL code starting from languages like Chisel or SpinalHDL. The higher abstraction of such languages enables formal verification of HDL code. [10] [11] [ better source needed ]
Name | Architecture | License | Comment |
---|---|---|---|
Icarus Verilog | *BSD, Linux, Mac | GPL-2.0-or-later | Verilog simulator |
Verilator | Posix | LGPL-3.0-only or Artistic-2.0 | Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog into cycle accurate C++ or SystemC code following 2-state synthesis (zero delay) semantics. Benchmarks reported on its website suggest it is several times faster than commercial event driven simulators such as ModelSim, NC-Verilog and VCS, while not quite as fast as commercial cycle accurate modeling tools such as Carbon ModelStudio and ARC VTOC. |
This list does not include schematic editors or simulators since these can generally be used both for Integrated Circuits (ICs) and for Printed Circuit Board (PCB) as long as device models are available.
Name | Architecture | License | Autorouter | Comment |
---|---|---|---|---|
Electric | *BSD, Java | GPL-3.0-or-later | Yes | VLSI circuit design tool with connectivity at all levels. Can also be used for schematic entry and PCB design. |
Magic | Linux | BSD license | No | A very-large-scale integration layout tool |
Name | Architecture | License | Comment |
---|---|---|---|
Gnucap | any (C++11) | GPL-3.0-or-later | Mixed-signal circuit simulator |
KTechLab | Linux | GPL | KTechLab is a schematic capture and simulator. It is specifically geared toward mixed signal simulation of analog components and small digital processors. |
Ngspice | Linux, Solaris, Mac, NetBSD, FreeBSD, Windows | BSD-3-Clause | SPICE + XSPICE + Cider |
Oregano | GPL-2.0-or-later | Schematic capture + spice simulation | |
Quite Universal Circuit Simulator (QUCS) | Linux, Solaris, Mac, NetBSD, FreeBSD, Windows | GPL-2.0-or-later | Schematic capture + Verilog + VHDL + simulation. Qucs-S fork supports SPICE backends Ngspice, Xyce, & SpiceOpus. |
XCircuit | Unix | GPL | Used to produce netlists and publish high-quality drawings. |
Name | Architecture | License | Autorouter | Imports | Exports | Scripting support | Comment |
---|---|---|---|---|---|---|---|
FreePCB | Windows | GPL | Yes | A printed circuit board design program for Microsoft Windows. FreePCB allows for up to 16 copper layers, both metric and US customary units, and export of designs in Gerber format. Boards can be partially or fully autorouted with the FreeRouting [12] autorouter by using the FpcROUTE Specctra DSN design file translator. | |||
Fritzing | Windows, Mac, Linux | GPL-3.0-or-later | Yes | gEDA symbols, KiCad symbols, SVG | Gerber, DIY etching, BOM, SVG, PDF, EPS | Protoboard view, schematic view, PCB view, Code (firmware) view. Includes customizable design rule checker. Includes common shaped boards like Arduino and Raspberry Pi shields. Allows spline curve traces. Only two layers (top and bottom). Outputs gerbers. | |
gEDA | *BSD, Linux, Mac | GPL-2.0-or-later | Yes | gschem netlists, image as background | Gerber, Excellon, SVG, PDF, EPS, PNG, GIF, JPEG, Specctra, XYRS | Guile (Scheme) | schematic, simulation, PCB editor, gerber view |
KiCad | Linux, Mac, Windows | GPL-3.0-or-later | FreeRouting | Altium, CadStar, EAGLE (XML), P-CAD, Fabmaster, TinyCAD net lists, OrCAD EDIF | PDF, Gerber, Gerber X2, Excellon, netlist, VRML2, STEP, IDFv3 | Python | Full package for schematic and board design, etc. Design rule checking. User-defined symbols and footprints. Gerber/ drill file creation. Graphic interface. Active user community. |
pcb-rnd | *BSD, Linux, Mac, Windows | GPL-2.0-or-later | Yes | gschem netlists, Protel Autotrax, KiCad (legacy & s-expr layouts), EAGLE (XML & v3,4,5 binary layouts), eeschema netlists, mentor netlists, TinyCad netlists, Calay netlist, FreePCB/easyEDA netlist, LT-Spice, MUCS, Mentor Graphics Hyperlynx, image (BMP, JPG, GIF, PNG), HPGL, BXL, Specctra (DSN), PADS | Gerber/drill,SVG, PDF, EPS, PNG, GIF, JPEG, Specctra (DSN), PADS, Protel Autotrax, KiCad (legacy & s-expr), DXF, FidocadJ, Mentor Graphics Hyperlynx, template configurable XYRS/BOM | Python, lua, perl, tcl, AWK (multiple dialects), lisp & scheme (multiple dialects), javascript, ruby, pascal, BASIC | Circuit layout program with extended file format support, DRC, parametric footprints, query language, and GUI and command line operation for batch processing and automation |
An integrated circuit, also known as a microchip, chip or IC, is a small electronic device made up of multiple interconnected electronic components such as transistors, resistors, and capacitors. These components are etched onto a small piece of semiconductor material, usually silicon. Integrated circuits are used in a wide range of electronic devices, including computers, smartphones, and televisions, to perform various functions such as processing and storing information. They have greatly impacted the field of electronics by enabling device miniaturization and enhanced functionality.
In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, most commonly to design ASICs and program FPGAs.
An application-specific integrated circuit is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-efficiency video codec. Application-specific standard product chips are intermediate between ASICs and industry standard integrated circuits like the 7400 series or the 4000 series. ASIC chips are typically fabricated using metal–oxide–semiconductor (MOS) technology, as MOS integrated circuit chips.
Mentor Graphics Corporation was a US-based electronic design automation (EDA) multinational corporation for electrical engineering and electronics, headquartered in Wilsonville, Oregon. Founded in 1981, the company distributed products that assist in electronic design automation, simulation tools for analog mixed-signal design, VPN solutions, and fluid dynamics and heat transfer tools. The company leveraged Apollo Computer workstations to differentiate itself within the computer-aided engineering (CAE) market with its software and hardware.
Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing electronic systems such as integrated circuits and printed circuit boards. The tools work together in a design flow that chip designers use to design and analyze entire semiconductor chips. Since a modern semiconductor chip can have billions of components, EDA tools are essential for their design; this article in particular describes EDA specifically with respect to integrated circuits (ICs).
In integrated circuit design, integrated circuit (IC) layout, also known IC mask layout or mask design, is the representation of an integrated circuit in terms of planar geometric shapes which correspond to the patterns of metal, oxide, or semiconductor layers that make up the components of the integrated circuit. Originally the overall process was called tapeout, as historically early ICs used graphical black crepe tape on mylar media for photo imaging.
Place and route is a stage in the design of printed circuit boards, integrated circuits, and field-programmable gate arrays. As implied by the name, it is composed of two steps, placement and routing. The first step, placement, involves deciding where to place all electronic components, circuitry, and logic elements in a generally limited amount of space. This is followed by routing, which decides the exact design of all the wires needed to connect the placed components. This step must implement all the desired connections while following the rules and limitations of the manufacturing process.
A mixed-signal integrated circuit is any integrated circuit that has both analog circuits and digital circuits on a single semiconductor die. Their usage has grown dramatically with the increased use of cell phones, telecommunications, portable electronics, and automobiles with electronics and digital sensors.
In electronic design automation, a design rule is a geometric constraint imposed on circuit board, semiconductor device, and integrated circuit (IC) designers to ensure their designs function properly, reliably, and can be produced with acceptable yield. Design rules for production are developed by process engineers based on the capability of their processes to realize design intent. Electronic design automation is used extensively to ensure that designers do not violate design rules; a process called design rule checking (DRC). DRC is a major step during physical verification signoff on the design, which also involves LVS checks, XOR checks, ERC, and antenna checks. The importance of design rules and DRC is greatest for ICs, which have micro- or nano-scale geometries; for advanced processes, some fabs also insist upon the use of more restricted rules to improve yield.
In semiconductor design, standard-cell methodology is a method of designing application-specific integrated circuits (ASICs) with mostly digital-logic features. Standard-cell methodology is an example of design abstraction, whereby a low-level very-large-scale integration (VLSI) layout is encapsulated into an abstract logic representation.
OrCAD Systems Corporation was a software company that made OrCAD, a proprietary software tool suite used primarily for electronic design automation (EDA). The software is used mainly by electronic design engineers and electronic technicians to create electronic schematics, and perform mixed-signal simulation and electronic prints for manufacturing printed circuit boards (PCBs). OrCAD was taken over by Cadence Design Systems in 1999 and was integrated with Cadence Allegro in 2005.
Integrated circuit design, semiconductor design, chip design or IC design, is a sub-field of electronics engineering, encompassing the particular logic and circuit design techniques required to design integrated circuits, or ICs. ICs consist of miniaturized electronic components built into an electrical network on a monolithic semiconductor substrate by photolithography.
Quite Universal Circuit Simulator (Qucs) is a free-software electronics circuit simulator software application released under GPL. It offers the ability to set up a circuit with a graphical user interface and simulate the large-signal, small-signal and noise behaviour of the circuit. Pure digital simulations are also supported using VHDL and/or Verilog. Only a small set of digital devices like flip flops and logic gates can be used with analog circuits. Qucs uses its own SPICE-incompatible backend simulator Qucsator, however the Qucs-S fork supports some SPICE backends.
An electronic circuit is composed of individual electronic components, such as resistors, transistors, capacitors, inductors and diodes, connected by conductive wires or traces through which electric current can flow. It is a type of electrical circuit. For a circuit to be referred to as electronic, rather than electrical, generally at least one active component must be present. The combination of components and wires allows various simple and complex operations to be performed: signals can be amplified, computations can be performed, and data can be moved from one place to another.
CircuitLogix is a software electronic circuit simulator which uses PSpice to simulate thousands of electronic devices, models, and circuits. CircuitLogix supports analog, digital, and mixed-signal circuits, and its SPICE simulation gives accurate real-world results. The graphic user interface allows students to quickly and easily draw, modify and combine analog and digital circuit diagrams. CircuitLogix was first launched in 2005, and its popularity has grown quickly since that time. In 2012, it reached the milestone of 250,000 licensed users, and became the first electronics simulation product to have a global installed base of a quarter-million customers in over 100 countries.
CR-5000 is Zuken's EDA design suite for electronic systems and printed circuit boards aimed at the enterprise market. It was developed to address complex design needs that involve managing the complete development and manufacturing preparation process on an enterprise-wide scale. CR-5000 is designed to facilitate the design of complex and high-speed boards, with features aimed at addressing challenges such as signal integrity and electromagnetic compatibility.
Aldec, Inc. is a privately owned electronic design automation company based in Henderson, Nevada that provides software and hardware used in creation and verification of digital designs targeting FPGA and ASIC technologies.
Solido Design Automation Inc. is an electronic design automation (EDA) software company, headquartered in Saskatoon, Saskatchewan. The company develops software for analog/mixed-signal and custom integrated circuits. The company was founded in 2005 and is funded by BDC Venture Capital, Victoria Park Capital, and Golden Opportunities Fund.
Xilinx ISE is a discontinued software tool from Xilinx for synthesis and analysis of HDL designs, which primarily targets development of embedded firmware for Xilinx FPGA and CPLD integrated circuit (IC) product families. It was succeeded by Xilinx Vivado. Use of the last released edition from October 2013 continues for in-system programming of legacy hardware designs containing older FPGAs and CPLDs otherwise orphaned by the replacement design tool, Vivado Design Suite.
Altium Designer (AD) is a PCB and electronic design automation software package for printed circuit boards. It is developed by Australian software company Altium Limited. Altium Designer was previously named under the "Protel" brand.