TO-66

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GD241 PNP transistor in a TO-66 package. GD241 Transistor.jpg
GD241 PNP transistor in a TO-66 package.
Comparison between the TO-66 (left) and TO-3 (right) packages. TO-3 vs TO-66 cm.jpg
Comparison between the TO-66 (left) and TO-3 (right) packages.

TO-66 is a type of semiconductor package for devices with three connections, such as transistors. The shape is similar to the TO-3 package, but the size is smaller. [1] The TO-66 package is made entirely of metal and is commonly used by silicon controlled rectifiers and power transistors. [2] In Europe, it was popularly used by the complementary germanium power transistors AD161/AD162. [3]

Contents

The TO-66 package consists of a diamond-shaped base plate with diagonals of 31.4 mm (1.24 in) and 19.0 mm (0.75 in). The plate has two mounting holes on the long diagonal, with the centers spaced 23 mm (0.91 in) apart. A cap attached to one side of the plate and under which the semiconductor chip is located, brings the total height to up to 8.63 mm (0.340 in). Two pins on the other side of the plate are isolated from the package by individual glass-metal seals. The metal case forms the third connection (in the case of a bipolar junction transistor this is typically the collector).

Variants

TO-66 is often used as a synonym for any of the variants that have the same footprint (i.e. position of mounting holes and pins) as TO-66.

TO-123

TO-123 reduces the maximum thickness of the base plate from 1.90 mm (0.075 in) to 1.02 mm (0.040 in). [4]

TO-124

TO-124 increases the maximum thickness of the base plate from 1.90 mm (0.075 in) to 2.59 mm (0.102 in) and the maximum total height from 8.63 mm (0.340 in) to 9.02 mm (0.355 in). [5]

TO-213

TO-213 is intended to replace previous definitions of flange-mounted packages with a 5.08 mm (0.200 in) pin spacing. [6] The different outlines are now defined as variants of TO-213: TO-66 is renamed to TO-213-AA, TO-123 to TO-213-AB, TO-124 to TO-213-AC.

National standards

Standards organizationStandardDesignation for
TO-66TO-123TO-124
JEDEC JEP95 [6] TO-213-AATO-213-ABTO-213-AC
IEC IEC 60191 [lower-alpha 1] [7] C13/B16 [lower-alpha 2]
EIAJ / JEITA ED-7500A [lower-alpha 1] [8] TC-16A/TB-12TC-9/TB-12 [lower-alpha 2]
British Standards BS 3934 [lower-alpha 1] [3] SO-55/SB2-5 [lower-alpha 2]
Gosstandart GOST 18472—88 [9] KT-8 [lower-alpha 2] [lower-alpha 3]
Rosstandart GOST R 57439 [10]
Kombinat Mikroelektronik Erfurt TGL 11811 [11] D [lower-alpha 2]
TGL 26713/11 [11] L2B [lower-alpha 2]
  1. 1 2 3 These standards have separate drawings for the package case and the base.
  2. 1 2 3 4 5 6 The maximum height is 9.8 mm (0.39 in).
  3. Russian: КТ-8

See also

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<span class="mw-page-title-main">TO-92</span> Small and cheap semiconductor package often used for transistors

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<span class="mw-page-title-main">TO-3</span> Metal can semiconductor package for power semiconductors

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<span class="mw-page-title-main">TO-5</span> Standardized metal semiconductor package

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<span class="mw-page-title-main">TO-126</span>

TO-126 is a type of semiconductor package for devices with three pins, such as transistors. The package is rectangular with a hole in the middle to allow for easy mounting to a board or a heat sink. On one side of the package typically a metal sheet is exposed, with the transistor die bonded to the other side of the metal sheet inside the package. This allows for an efficient heat transfer from the transistor die to an external heat sink but also implies that the metal sheet is electrically connected to the die.

<span class="mw-page-title-main">TO-252</span>

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<span class="mw-page-title-main">TO-8</span>

In electronics, TO-8 is a designation for a standardized metal semiconductor package. TO in TO-8 stands for "transistor outline" and refers to a series of technical drawings produced by JEDEC. The TO-8 package is noticeably larger than the more common TO-5 package. While originally designed for medium power transistors such as the 2N1483 series or the AD136, it is more commonly used for integrated circuits and sensors.

References

  1. TO-66 package details (PDF), Central Semiconductor Corp., 2008, retrieved 2013-12-09
  2. "TO-66 Package". EESemi.com. Retrieved 8 February 2019.
  3. 1 2 "Mullard Technical Handbook Book 1 Part 1" (PDF). Mullard. 1974. p. 142. Retrieved 2021-06-14.
  4. "TO-123" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-10. Retrieved 2021-06-28.
  5. "TO-124" (PDF). JEDEC. Archived from the original (PDF) on 2016-04-05. Retrieved 2021-06-28.
  6. 1 2 "Flange Mounted Header Family 0.200 Pin Spacing". JEDEC Publication No. 95 (PDF). JEDEC. September 1976. pp. 200–201. Retrieved 2021-07-13.
  7. "Semiconductors" (PDF). Pro Electron. 1978. p. 215. Retrieved 2021-06-17.
  8. "EIAJ ED-7500A Standards for the Dimensions of Semiconductor Devices" (PDF). JEITA. 1996. Retrieved 2021-06-14.
  9. "ГОСТ 18472—88 ПРИБОРЫ ПОЛУПРОВОДНИКОВЫЕ - Основные размеры" [GOST 18472—88 Semiconductor devices - basic dimensions](PDF) (in Russian). Rosstandart. 1988. p. 41. Retrieved 2021-06-17.
  10. "ПРИБОРЫ ПОЛУПРОВОДНИКОВЫЕ - Основные размеры" [Semiconductor devices - basic dimensions](PDF) (in Russian). Rosstandart. 2017. pp. 50–51. Retrieved 2021-06-17.
  11. 1 2 "TGL 26713/11: Gehäuse für Halbleiterbauelemente - Bauform L" (PDF) (in German). Leipzig: Verlag für Standardisierung. June 1988. Retrieved 2021-06-15.