Integrated circuit packaging

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Cross section of a dual in-line package. This type of package houses a small semiconducting die, with microscopic wires attaching the die to the lead frames, allowing for electrical connections to be made to a PCB. DIP package sideview.PNG
Cross section of a dual in-line package. This type of package houses a small semiconducting die, with microscopic wires attaching the die to the lead frames, allowing for electrical connections to be made to a PCB.
Dual in-line (DIP) integrated circuit metal tape base with contacts DIP zagotovka.jpg
Dual in-line (DIP) integrated circuit metal tape base with contacts

In electronics manufacturing, integrated circuit packaging is the final stage of semiconductor device fabrication, in which the block of semiconductor material is encapsulated in a supporting case that prevents physical damage and corrosion. The case, known as a "package", supports the electrical contacts which connect the device to a circuit board.

Die (integrated circuit) an unpackaged integrated circuit

A die, in the context of integrated circuits, is a small block of semiconducting material on which a given functional circuit is fabricated. Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon (EGS) or other semiconductor through processes such as photolithography. The wafer is cut (diced) into many pieces, each containing one copy of the circuit. Each of these pieces is called a die.

A semiconductor package is a metal, plastic, glass, or ceramic casing containing one or more discrete semiconductor devices or integrated circuits. Individual components are fabricated on semiconductor wafers before being diced into die, tested, and packaged. The package provides a means for connecting the package to the external environment, such as printed circuit board, via leads such as lands, balls, or pins; and protection against threats such as mechanical impact, chemical contamination, and light exposure. Additionally, it helps dissipate heat produced by the device, with or without the aid of a heat spreader. There are thousands of package types in use. Some are defined by international, national, or industry standards, while others are particular to an individual manufacturer.

Contents

In the integrated circuit industry, the process is often referred to as packaging. Other names include semiconductor device assembly, assembly, encapsulation or sealing.

Integrated circuit electronic circuit manufactured by lithography; set of electronic circuits on one small flat piece (or "chip") of semiconductor material, normally silicon

An integrated circuit or monolithic integrated circuit is a set of electronic circuits on one small flat piece of semiconductor material that is normally silicon. The integration of large numbers of tiny MOS transistors into a small chip results in circuits that are orders of magnitude smaller, faster, and less expensive than those constructed of discrete electronic components. The IC's mass production capability, reliability, and building-block approach to circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other digital home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.

The packaging stage is followed by testing of the integrated circuit.

The term is sometimes confused with electronic packaging, which is the mounting and interconnecting of integrated circuits (and other components) onto printed-circuit boards.

Electronic packaging is the design and production of enclosures for electronic devices ranging from individual semiconductor devices up to complete systems such as a mainframe computer. Packaging of an electronic system must consider protection from mechanical damage, cooling, radio frequency noise emission and electrostatic discharge. Product safety standards may dictate particular features of a consumer product, for example, external case temperature or grounding of exposed metal parts. Prototypes and industrial equipment made in small quantities may use standardized commercially available enclosures such as card cages or prefabricated boxes. Mass-market consumer devices may have highly specialized packaging to increase consumer appeal. Electronic packaging is a major discipline within the field of mechanical engineering.

Design considerations

Electrical

The current-carrying traces that run out of the die, through the package, and into the printed circuit board (PCB) have very different electrical properties compared to on-chip signals. They require special design techniques and need much more electric power than signals confined to the chip itself. Therefore, it is important that the materials used as electrical contacts exhibit characteristics like low resistance, low capacitance and low inductance. [1] Both the structure and materials must prioritize signal transmission properties, while minimizing any parasitic elements that could negatively affect the signal.

Printed circuit board Board to support and connect electronic components

A printed circuit board (PCB) mechanically supports and electrically connects electronic components or electrical components using conductive tracks, pads and other features etched from one or more sheet layers of copper laminated onto and/or between sheet layers of a non-conductive substrate. Components are generally soldered onto the PCB to both electrically connect and mechanically fasten them to it.

Parasitic element (electrical networks)

In electrical networks, a parasitic element is a circuit element that is possessed by an electrical component but which it is not desirable for it to have for its intended purpose. For instance, a resistor is designed to possess resistance, but will also possess unwanted parasitic capacitance.

Controlling these characteristics is becoming increasingly important as the rest of technology begins to speed up. Packaging delays have the potential to make up almost half of a high-performance computer's delay, and this bottleneck on speed is expected to increase. [1]

Mechanical and thermal

The integrated circuit package is responsible for keeping the chip safe from all sorts of potential damage. The package must resist physical breakage, provide an airtight seal to keep out moisture, and also provide effective heat dissipation away from the chip. At the same time, it must have effective means of connecting to a PCB, which can change drastically depending on the package type. [1] The materials used for the body of the package are typically either plastic (thermoset or thermoplastic) or ceramic. Once installed the plastic is cured and certain temperature. They both can offer a high thermal conductivity and decent mechanical strength. Ceramic generally has preferable characteristics, but is more expensive. [2]

Thermosetting polymer polymer material that irreversibly cures

A thermosetting polymer, resin, or plastic, often called a thermoset, is a polymer that is irreversibly hardened by curing from a soft solid or viscous liquid prepolymer or resin. Curing is induced by heat or suitable radiation and may be promoted by high pressure, or mixing with a catalyst. It results in chemical reactions that create extensive cross-linking between polymer chains to produce an infusible and insoluble polymer network.

Thermoplastic plastic that becomes soft when heated and hard when cooled

A thermoplastic, or thermosoftening plastic, is a plastic polymer material that becomes pliable or moldable at a certain elevated temperature and solidifies upon cooling.

Increasing the surface area of the package allows for better heat transfer via convection, and some packages utilize metallic fins to enhance heat transfer even further at the cost of valuable space. Larger sizes also allow for a greater number of mechanical connections. [1] However, these factors are balanced out by the fact that the package generally needs to be kept as small as possible.

Economic

Cost is a major limiting factor for many designs. Choices such as package material and level of precision must be balanced by the economic viability of the end product. Depending on the needs of the system, opting for lower-cost materials is often an acceptable solution to economic constraints. Typically, an inexpensive plastic package can dissipate heat up to 2W, which is sufficient for many simple applications, though a similar ceramic package can dissipate up to 50W in the same scenario. [1] As the chips inside the package get smaller and faster, they also tend to get hotter. As the subsequent need for more effective heat dissipation increases, the cost of packaging rises along with it. Generally, the smaller and more complex the package needs to be, the more expensive it is to manufacture. [2]

Packaging materials

Plastics

Thermosetting polymer or thermoplastic filled with ultra-fine glass particles as a filler (as of 1999) up to 80% of the total volume of the package. [3] is typically used.

Ceramics

History

Small-outline integrated circuit. This package has 16 "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 inches. Laptop Acrobat Model NBD 486C, Type DXh2 - California Micro Devices CMD 9324 on motherboard-9749.jpg
Small-outline integrated circuit. This package has 16 "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 inches.

The earliest integrated circuits were packaged in ceramic flat packs, which the military used for many years for their reliability and small size. [4] The other type of packaging used in the 1970s, called the ICP (Integrated Circuit Package), was the ceramic package (sometime round as the transistor package), with the conductors on one side, co-axially with the package axe.

Commercial circuit packaging quickly moved to the dual in-line package (DIP), first in ceramic and later in plastic. [5] In the 1980s VLSI pin counts exceeded the practical limit for DIP packaging, leading to pin grid array (PGA) and leadless chip carrier (LCC) packages. [6] Surface mount packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gull-wing or J-lead, as exemplified by small-outline integrated circuit — a carrier which occupies an area about 30 – 50% less than an equivalent DIP, with a typical thickness that is 70% less. [6]

Early USSR made integrated circuit. The tiny block of semiconducting material (the "die"), is enclosed inside the round, metallic case (the "package"). RUS-IC.JPG
Early USSR made integrated circuit. The tiny block of semiconducting material (the "die"), is enclosed inside the round, metallic case (the "package").

The next big innovation was the area array package, which places the interconnection terminals throughout the surface area of the package, providing a greater number of connections than previous package types where only the outer perimeter is used. The first area array package was a ceramic pin grid array package. [1] Not long after, the plastic ball grid array (BGA), another type of area array package, became one of the most commonly used packaging techniques. [7]

In the late 1990s, plastic quad flat pack (PQFP) and thin small-outline packages (TSOP) replaced PGA packages as the most common for high pin count devices, [1] though PGA packages are still often used for microprocessors. However, industry leaders Intel and AMD transitioned in the 2000s from PGA packages to land grid array (LGA) packages. [8]

Ball grid array (BGA) packages have existed since the 1970s, but evolved into flip-chip ball grid array (FCBGA) packages in the 1990s. FCBGA packages allow for much higher pin count than any existing package types. In an FCBGA package, the die is mounted upside-down (flipped) and connects to the package balls via a substrate that is similar to a printed-circuit board rather than by wires. FCBGA packages allow an array of input-output signals (called Area-I/O) to be distributed over the entire die rather than being confined to the die periphery. [9]

Traces out of the die, through the package, and into the printed circuit board have very different electrical properties, compared to on-chip signals. They require special design techniques and need much more electric power than signals confined to the chip itself.

Recent developments consist of stacking multiple dies in single package called SiP, for System In Package , or three-dimensional integrated circuit. Combining multiple dies on a small substrate, often ceramic, is called an MCM, or Multi-Chip Module. The boundary between a big MCM and a small printed circuit board is sometimes blurry. [10]

Common package types

Operations

Die attachment is the step during which a die is mounted and fixed to the package or support structure (header). [11] For high-powered applications, the die is usually eutectic bonded onto the package, using e.g. gold-tin or gold-silicon solder (for good heat conduction). For low-cost, low-powered applications, the die is often glued directly onto a substrate (such as a printed wiring board) using an epoxy adhesive.

The following operations are performed at the packaging stage, as broken down into bonding, encapsulation, and wafer bonding steps. Note that this list is not all-inclusive and not all of these operations are performed for every package, as the process is highly dependent on the package type.

See also

Related Research Articles

Dual in-line package Type of electronic component package

In microelectronics, a dual in-line package, or dual in-line pin package (DIPP) is an electronic component package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board (PCB) or inserted in a socket. The dual-inline format was invented by Don Forbes, Rex Rice and Bryant Rogers at Fairchild R&D in 1964, when the restricted number of leads available on circular transistor-style packages became a limitation in the use of integrated circuits. Increasingly complex circuits required more signal and power supply leads ; eventually microprocessors and similar complex devices required more leads than could be put on a DIP package, leading to development of higher-density chip carriers. Furthermore, square and rectangular packages made it easier to route printed-circuit traces beneath the packages.

Ball grid array

A ball grid array (BGA) is a type of surface-mount packaging used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be put on a dual in-line or flat package. The whole bottom surface of the device can be used, instead of just the perimeter. The traces connecting the package's leads to the wires or balls which connect the die to package are also on average shorter than with a perimeter-only type, leading to better performance at high speeds.

Surface-mount technology method for producing electronic circuits

Surface-mount technology (SMT) is a method for producing electronic circuits in which the components are mounted or placed directly onto the surface of printed circuit boards (PCBs). An electronic device so made is called a surface-mount device (SMD). In industry, it has largely replaced the through-hole technology construction method of fitting components with wire leads into holes in the circuit board. Both technologies can be used on the same board, with the through-hole technology used for components not suitable for surface mounting such as large transformers and heat-sinked power semiconductors.

Pin grid array type of integrated circuit packaging. In a PGA, the package is square or rectangular, and the pins are arranged in a regular array on the underside of the package

A pin grid array (PGA) is a type of integrated circuit packaging. In a PGA, the package is square or rectangular, and the pins are arranged in a regular array on the underside of the package. The pins are commonly spaced 2.54 mm (0.1") apart, and may or may not cover the entire underside of the package.

Zig-zag in-line package type of electronic packaging

The zig-zag in-line package or ZIP is a packaging technology for integrated circuits. It was intended as a replacement for dual in-line packaging. A ZIP is an integrated circuit encapsulated in a slab of plastic with 20 or 40 pins, measuring about 3 mm x 30 mm x 10 mm. The package's pins protrude in two rows from one of the long edges. The two rows are staggered by 1.27 mm (0.05"), giving them a zig-zag appearance, and allowing them to be spaced more closely than a rectangular grid would allow. The pins are inserted into holes in a printed circuit board, with the packages standing at right-angles to the board, allowing them to be placed closer together than DIPs of the same size. ZIPs have now been superseded by surface-mount packages such as the thin small-outline packages (TSOPs) but they are still in use.

Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting semiconductor devices, such as IC chips and microelectromechanical systems (MEMS), to external circuitry with solder bumps that have been deposited onto the chip pads. The technique was developed by General Electric's Light Military Electronics Dept., Utica, N.Y. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external circuitry, it is flipped over so that its top side faces down, and aligned so that its pads align with matching pads on the external circuit, and then the solder is reflowed to complete the interconnect. This is in contrast to wire bonding, in which the chip is mounted upright and wires are used to interconnect the chip pads to external circuitry.

CPU socket provides mechanical and electrical connections between a microprocessor and a printed circuit board

In computer hardware, a CPU socket or CPU slot contains one or more mechanical components providing mechanical and electrical connections between a microprocessor and a printed circuit board (PCB). This allows for placing and replacing the central processing unit (CPU) without soldering.

Land grid array type of surface-mount packaging for integrated circuits

The land grid array (LGA) is a type of surface-mount packaging for integrated circuits (ICs) that is notable for having the pins on the socket rather than the integrated circuit. An LGA can be electrically connected to a printed circuit board (PCB) either by the use of a socket or by soldering directly to the board.

Quad Flat Package surface mount integrated circuit package

A QFP or Quad Flat Package is a surface-mounted integrated circuit package with "gull wing" leads extending from each of the four sides. Socketing such packages is rare and through-hole mounting is not possible. Versions ranging from 32 to 304 pins with a pitch ranging from 0.4 to 1.0 mm are common. Other special variants include low-profile QFP (LQFP) and thin QFP (TQFP).

Chip-scale package

A chip scale package or chip-scale package (CSP) is a type of integrated circuit package.

Lead (electronics) connecting wire or pad within an electronic device; electrical connection consisting of a length of wire or metal pad (SMD) that comes from a device

In electronics, a lead is an electrical connection consisting of a length of wire or a metal pad that is designed to connect two locations electrically. Leads are used for many purposes, including: transfer of power; testing of an electrical circuit to see if it is working, using a test light or a multimeter; transmitting information, as when the leads from an electrocardiograph are attached to a person's body to transmit information about their heart rhythm; and sometimes to act as a heatsink. The tiny leads coming off through-hole electronic components are also often called "pins"; in ball grid array packages, they are in form of small spheres, and are therefore called "balls".

Multi-chip module discrete electronic assembly containing multiple integrated circuits that behaves as a unit

A multi-chip module (MCM) is generically an electronic assembly where multiple integrated circuits, semiconductor dies and/or other discrete components are integrated, usually onto a unifying substrate, so that in use it can be treated as if it were a larger IC. Other terms, such as "hybrid" or "hybrid integrated circuit", also refer to MCMs. The individual ICs that make up an MCM are known as Chiplets. Intel and AMD are using MCMs to improve performance and reduce costs, as splitting a large IC into smaller ICs allows for more ICs per wafer, and improved yield.

Quad Flat No-leads package

Flat no-leads packages such as quad-flat no-leads (QFN) and dual-flat no-leads (DFN) physically and electrically connect integrated circuits to printed circuit boards. Flat no-leads, also known as micro leadframe (MLF) and SON, is a surface-mount technology, one of several package technologies that connect ICs to the surfaces of PCBs without through-holes. Flat no-lead is a near chip scale plastic encapsulated package made with a planar copper lead frame substrate. Perimeter lands on the package bottom provide electrical connections to the PCB. Flat no-lead packages include an exposed thermal pad to improve heat transfer out of the IC. Heat transfer can be further facilitated by metal vias in the thermal pad. The QFN package is similar to the quad-flat package (QFP), and a ball grid array (BGA).

Package on package (PoP) is an integrated circuit packaging method to combine vertically discrete logic and memory ball grid array (BGA) packages. Two or more packages are installed atop each other, i.e. stacked, with a standard interface to route signals between them. This allows higher component density in devices, such as mobile phones, personal digital assistants (PDA), and digital cameras.

Chip carrier one of several kinds of surface mount technology packages for integrated circuits

In electronics, a chip carrier is one of several kinds of surface-mount technology packages for integrated circuits. Connections are made on all four edges of a square package; Compared to the internal cavity for mounting the integrated circuit, the package overall size is large.

Chip on board Circuit board manufacturing technique

Chip on board (COB) is the method of manufacturing where integrated circuits are wired and bonded directly to a printed circuit board. By eliminating the packaging of individual semiconductor devices, the completed product can be more compact, lighter, and less costly. In some cases chip on board construction improves the operation of radio frequency systems by reducing the inductance and capacitance of integrated circuit leads. Chip on board effectively merges two levels of electronic packaging, level 1 (components) and level 2, and may be referred to as a "level 1.5"

References

  1. 1 2 3 4 5 6 7 Rabaey, Jan (2007). Digital Integrated Circuits (2nd Edition) . Prentice Hall, Inc. ISBN   978-0130909961.
  2. 1 2 Greig, William (2007). Integrated Circuit Packaging, Assembly and Interconnections. Springer Science & Business Media. ISBN   9780387339139.
  3. TDK-Micronas (2010-12-17), Micronas Backend, 1999 (english, 8:25) , retrieved 2019-05-21
  4. "Quality Support". www.ametek-ecp.com. Retrieved 2016-03-30.
  5. Dummer, G.W.A. Electronic Inventions and Discoveries (2nd ed). Pergamon Press. ISBN   0-08-022730-9.
  6. 1 2 Baker, R. Jacob (2010). CMOS: Circuit Design, Layout, and Simulation, Third Edition. Wiley-IEEE. ISBN   978-0-470-88132-3.
  7. Ken Gilleo (2003). Area array packaging processes for BGA, Flip Chip, and CSP. McGraw-Hill Professional. p. 251. ISBN   0-07-142829-1.
  8. "Land Grid Array (LGA) Socket and Package Technology" (PDF). Intel. Retrieved April 7, 2016.
  9. Riley, George (2009-01-30). "Flipchips: Tutorial #1". Archived from the original on January 30, 2009. Retrieved 2016-04-07.Cite uses deprecated parameter |deadurl= (help)CS1 maint: unfit url (link)
  10. R. Wayne Johnson, Mark Strickland and David Gerke, NASA Electronic Parts and Packaging Program. "3-D Packaging: A Technology Review." June 23, 2005. Retrieved July 31, 2015
  11. L. W. Turner (ed), Electronics Engineers Reference Book, Newnes-Butterworth, 1976, ISBN   0-408-00168-2, pages 11-34 through 11-37