Zen 4

Last updated

AMD Zen 4
AMD Zen 4 logo.png
General information
LaunchedSeptember 27, 2022;19 months ago (September 27, 2022)
Designed by AMD
Common manufacturer(s)
Cache
L1 cache 64 KB (per core):
  • 32 KB instructions
  • 32 KB data
L2 cache1 MB (per core)
L3 cache
  • 32 MB (per CCD)
  • 96 MB (per CCD with 3D V-Cache)
  • 16 MB (in APUs)
Architecture and classification
Technology node TSMC N4P
TSMC N5 (CCDs)
TSMC N6 (I/O die) [1]
Instruction set AMD64 (x86_64)
Physical specifications
Cores
  • Desktop: 4 to 16
    HEDT: 24 to 64
    Workstation: 12 to 96
    Server: 16 to 128
Socket(s)
Products, models, variants
Product code name(s)
  • Desktop
    • Raphael
    • Phoenix (APUs)
  • HEDT/Workstation
    • Storm Peak [2]
  • Thin & Light Mobile
    • Phoenix
    • Hawk Point [3]
  • Extreme Mobile
    • Dragon Range
  • Server
    • Genoa
    • Genoa-X
Brand name(s)
History
Predecessor(s) Zen 3
Zen 3+
Successor(s) Zen 5
Support status
Supported

Zen 4 is the codename for a CPU microarchitecture designed by AMD, released on September 27, 2022. [4] [5] [6] It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs. [7] Zen 4 powers Ryzen 7000 performance desktop processors (codenamed "Raphael"), Ryzen 8000G series mainstream desktop APUs (codenamed "Phoenix"), and Ryzen Threadripper 7000 series HEDT and workstation processors (codenamed "Storm Peak"). It is also used in extreme mobile processors (codenamed "Dragon Range"), thin & light mobile processors (codenamed "Phoenix" and "Hawk Point"), as well as EPYC 8004/9004 server processors (codenamed "Siena", "Genoa" and "Bergamo").

Contents

Features

Like its predecessor, Zen 4 in its Desktop Ryzen variants features one or two Core Complex Dies (CCDs) built on TSMC's 5 nm process and one I/O die built on 6 nm. [8] [9] Previously, the I/O die on Zen 3 was built on GlobalFoundries' 14 nm process for EPYC and 12 nm process for Ryzen. Zen 4's I/O die includes integrated RDNA 2 graphics for the first time on any Zen architecture. Zen 4 marks the first utilization of the 5 nm process for x86-based desktop processors.

On all platforms, Zen 4 supports only DDR5 memory and LPDDR5X in mobile, with support for DDR4 and LPDDR4X dropped. Additionally, Zen 4 supports new AMD EXPO SPD profiles for more comprehensive memory tuning and overclocking by the RAM manufacturers. Unlike Intel's XMP, EXPO is marketed as an open, license and royalty-free standard for describing memory kit parameters, such as operating frequency, timings and voltages. It allows to encode a wider set of timings to achieve better performance and compatibility. However, XMP memory profiles are still supported. [10] EXPO can also support Intel processors. [11]

All Ryzen desktop processors feature 28 (24 usable + 4 reserved) PCI Express 5.0 lanes. This means that a discrete GPU can be connected by 16 PCIe lanes or two GPUs by 8 PCIe lanes each. Additionally, there are now 2 x 4 lane PCIe interfaces, most often used for M.2 storage devices. Whether the lanes connecting the GPUs in the mechanical x16 slots are executed as PCIe 4.0 or PCIe 5.0 can be configured by the mainboard manufacturers. Finally, 4 PCIe 5.0 lanes are reserved for connecting the south bridge chip or chipset.

Zen 4 is the first AMD microarchitecture to support AVX-512 instruction set extension. Most 512-bit vector instructions are split in two and executed by the 256-bit SIMD execution units internally. The two halves execute in parallel on a pair of execution units and are still tracked as a single micro-OP (except for stores), which means the execution latency isn't doubled compared to 256-bit vector instructions. There are four 256-bit execution units, which gives a maximum throughput of two 512-bit vector instructions per clock cycle, e.g. one multiplication and one addition. The maximum number of instructions per clock cycle is doubled for vectors of 256 bits or less. Load and store units are also 256 bits each, retaining the throughput of up to two 256-bit loads or one store per cycle that was supported by Zen 3. This translates to up to one 512-bit load per cycle or one 512-bit store per two cycles. [10] [12] [13]

Other features and improvements, compared to Zen 3, include: [10] [12]

Products

Desktop

Raphael

Ryzen 7 7800X3D AMD@5nmCCD(6nmIOD)@Zen4@Raphael@Ryzen 7 7800X3D@100-000000910 BS 2312PGY 9LW3390030138 DSCx01.jpg
Ryzen 7 7800X3D

On August 29, 2022, AMD announced four Zen 4-based Ryzen 7000 series desktop processors. The four Ryzen 7000 processors that were launched on September 27, 2022 consist of the Ryzen 5 7600X, Ryzen 7 7700X, and two Ryzen 9 CPUs: the 7900X and 7950X. The processors feature between 6 and 16 cores. [14]

A further three models were added to the Ryzen 7000 desktop processors lineup on January 10, 2023, after a keynote by AMD at CES that announced them alongside 3D V-Cache variants of Ryzen 7 and Ryzen 9 processors, which drop the X in the name of the first CPUs in the lineup. These three models are the Ryzen 5 7600, Ryzen 7 7700, and Ryzen 9 7900, which feature a lower TDP of 65 W, and come bundled with stock coolers, unlike the X-suffix processors. [15] [16]

The Ryzen 9 7900X3D and 7950X3D processors with 3D V-Cache were released on February 28, 2023, [17] followed by the Ryzen 7 7800X3D on April 6. [18]

Common features of Ryzen 7000 desktop CPUs:

  • Socket: AM5.
  • All the CPUs support DDR5-5200 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 1 MB per core.
  • All the CPUs support 28 PCIe 5.0 lanes. 4 of the lanes are reserved as link to the chipset.
  • Includes integrated RDNA 2 GPU on the I/O die with 2 CUs and clock speeds of 400 MHz (base), 2.2 GHz (boost) [lower-roman 1] . Models with "F" suffixes are without iGPUs.
  • Fabrication process: TSMC N5 FinFET (N6 FinFET for the I/O die).
Branding and model Cores
(threads)		 Clock rate (GHz) L3 cache
(total)		Thermal
solution		 Chiplets Core
config [lower-roman 2] 		TDP Release
date		 MSRP
BaseBoost
Ryzen 9 7950X3D 16 (32)4.25.7128 MB [lower-roman 3] —2 × CCD
1 × I/OD		2 × 8120 WFeb 28, 2023US $699
7950X 4.564 MB170 WSep 27, 2022
7900X3D 12 (24)4.45.6128 MB [lower-roman 3] 2 × 6120 WFeb 28, 2023US $599
7900X 4.764 MB170 WSep 27, 2022US $549
7900 3.75.4 Wraith Prism 65 WJan 10, 2023US $429 [21]
PRO 7945 Wraith Spire Jun 13, 2023OEM
Ryzen 7 7800X3D 8 (16)4.25.096 MB—1 × CCD
1 × I/OD		1 × 8120 WApr 6, 2023US $449
7700X 4.55.432 MB105 WSep 27, 2022US $399
7700 3.85.3Wraith Prism65 WJan 10, 2023US $329 [21]
PRO 7745 Wraith SpireJun 13, 2023OEM
Ryzen 5 7600X 6 (12)4.7—1 × 6105 WSep 27, 2022US $299
7600 3.85.1 Wraith Stealth 65 WJan 10, 2023US $229 [21]
PRO 7645 Wraith SpireJun 13, 2023OEM
7500F 3.75.0Wraith StealthJul 22, 2023US $179 [22]
  1. ↑ Self identifies as "AMD Radeon Graphics". See RDNA 2 § Integrated graphics processors (iGPs).
  2. ↑ Core Complexes (CCX) × cores per CCX
  3. 1 2 Only one of the two CCXes has additional 64 MB 3D V-Cache. [19] Only the CCX without 3D V-Cache will be able to reach the maximum boost clocks. The CCX with 3D V-Cache will clock lower. [20]

Phoenix

The Phoenix desktop APU's were launched in January 8, 2024 as the "Ryzen 8000G" series for the AM5 socket and marketed as first desktop processor to feature a dedicated AI Accelerator branded as "Ryzen AI". [23] [24]

On April 1, 2024, AMD quietly released the Ryzen 8000 series of desktop processors without integrated graphics. [25]

Common features of Ryzen 8000 desktop CPUs:

  • Socket: AM5.
  • All the CPUs support DDR5-5200 RAM in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 1 MB per core.
  • All the CPUs support 20 PCIe 4.0 lanes. 4 of the lanes are reserved as link to the chipset.
  • No integrated graphics.
  • Fabrication process: TSMC 4 nm FinFET.
Branding
and model		 Cores
(threads)		 Clock rate (GHz) L3 cache
(total)		 NPU Thermal
solution		 TDP Core
config [lower-alpha 1] 		Release
date		 MSRP
BaseBoost
Ryzen 7 8700F 8 (16)4.15.016 MBPartial [lower-alpha 2] Wraith
Stealth 		65 W1 × 8April 1, 2024 [26] OEM [27]
Ryzen 5 8400F 6 (12)4.24.7No1 × 6
  1. ↑ Core Complexes (CCX) × cores per CCX, or Zen 4 + Zen 4c cores
  2. ↑ Ryzen AI is only available when paired with a Radeon RX 7000 series graphics card as they feature AI acceleration

Common features of Ryzen 8000G desktop APUs:

  • Socket: AM5.
  • All the CPUs support DDR5-5200 RAM in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 1 MB per core.
  • Models with Zen 4c cores (codenamed Phoenix 2) support 14 PCIe 4.0 lanes, while models without them support 20 lanes. 4 of the lanes are reserved as link to the chipset.
  • Includes integrated RDNA 3 GPU.
  • Includes XDNA AI Engine (Ryzen AI) on upper end models as indicated in table below.
  • Fabrication process: TSMC 4 nm FinFET.
Branding
and model		 CPU GPU NPU Thermal
solution		 TDP Release
date		 MSRP
Cores (threads) Clock rate (GHz) L3 cache
(total)		Core
config [lower-alpha 1] 		ModelCore
config [lower-alpha 2] [lower-alpha 3] 		Clock
(GHz)
Total Zen 4 Zen 4c BaseBoost
Ryzen 7 8700G 8 (16)8 (16)—4.25.116 MB1 × 8780M12 CUs
768:48:24:12		2.9 Ryzen AI
Up to 16 TOPS		 Wraith Spire 65 WJan 31, 2024 [28] US $329
Ryzen 5 8600G 6 (12)6 (12)4.35.01 × 6760M8 CUs
512:32:16:8		2.8 Wraith Stealth US $229
8500G 2 (4)4 (8)4.1 / 3.2 [lower-alpha 4] 5.0 / 3.7 [lower-alpha 5] 2 + 4740M4 CUs
256:16:8:4		NoUS $179
Ryzen 3 8300G 4 (8)1 (2)3 (6)4.0 / 3.2 [lower-alpha 4] 4.9 / 3.6 [lower-alpha 5] 8 MB1 + 32.6Jan 2024 (OEM) /
Q1 2024 (retail)		OEM /
TBA
  1. ↑ Core Complexes (CCX) × cores per CCX, or Zen 4 + Zen 4c cores
  2. ↑ Unified shaders  : Texture mapping units  : Render output units  : Ray accelerators  : AI accelerators and Compute units (CU)
  3. ↑ GPUs based on RDNA 3 have dual-issue stream processors so that up to two shader instructions can be executed per clock cycle under certain parallelism conditions.
  4. 1 2 Zen 4 cores' base frequency / Zen 4c cores' base frequency
  5. 1 2 Zen 4 cores' boost frequency / Zen 4c cores' boost frequency

Storm Peak

Downside of an AMD Ryzen Threadripper 7970X Unterseite des AMD Ryzen Threadripper 7970X 20240406 HOF1915 RAW-Export 000157.png
Downside of an AMD Ryzen Threadripper 7970X

Storm Peak is the codename given to Ryzen Threadripper 7000X HEDT and Ryzen Threadripper PRO 7000WX workstation processors, announced by AMD on October 19, 2023, and released on November 21, 2023. The Threadripper 7000X HEDT lineup consists of three models ranging from 24 to 64 cores, while the Threadripper PRO 7000WX workstation lineup encompasses six models ranging from 12 to 96 cores. [29]

Common features of Ryzen 7000 HEDT/workstation CPUs:

  • Socket: sTR5.
  • Threadripper CPUs support DDR5-5200 in quad-channel mode while Threadripper PRO CPUs support DDR5-5200 in octa-channel mode with ECC support.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 1 MB per core.
  • Threadripper CPUs support 48 PCIe 5.0 and 24 PCIe 4.0 lanes while Threadripper PRO CPUs support 128 PCIe 5.0 lanes. In addition, all processor models have 4 PCIe 4.0 lanes reserved as link to the chipset.
  • No integrated graphics.
  • Fabrication process: TSMC 5FF.
Branding and model Cores
(threads)		 Clock rate (GHz) L3 cache
(total)		 TDP Chiplets Core
config [lower-roman 1] 		Release
date		 MSRP
BaseBoost
Ryzen
Threadripper
PRO		 7995WX 96 (192)2.55.1384 MB350 W12 × CCD
1 × I/OD		12 × 8Nov 21, 2023 [30] US $9999
7985WX 64 (128)3.2256 MB8 × CCD
1 × I/OD		8 × 8US $7349
7975WX 32 (64)4.05.3128 MB4 × CCD
1 × I/OD		4 × 8US $3899
7965WX 24 (48)4.24 × 6US $2649
7955WX 16 (32)4.564 MB2 × CCD
1 × I/OD		2 × 8US $1899
7945WX 12 (24)4.72 × 6US $1399
Ryzen
Threadripper		 7980X 64 (128)3.25.1256 MB8 × CCD
1 × I/OD		8 × 8US $4999
7970X 32 (64)4.05.3128 MB4 × CCD
1 × I/OD		4 × 8US $2499
7960X 24 (48)4.24 × 6US $1499
  1. ↑ Core Complexes (CCXs) × cores per CCX

Mobile

On January 4, 2023, AMD announced its Phoenix and Dragon Range series of mobile processors based on Zen 4 at the 2023 Consumer Electronics Show (CES). The Phoenix processors target the mainstream notebook segment, feature an AI accelerator branded as "Ryzen AI", similar to Apple's Neural Engine, and are of a monolithic chip design, while the Dragon Range processors target the high-end segment, providing core counts up to 16 cores and 32 threads, and are built on a multi-chip module design, utilizing an I/O die and up to two core complex dies (CCDs). [31] [32]

Phoenix

The Phoenix mobile processors are named as the "Ryzen 7040" series, and include U, H, and HS-suffix variants. [33]

Common features of Ryzen 7040 notebook APUs:

  • Socket: FP7, FP7r2, FP8.
  • All the CPUs support DDR5-5600 or LPDDR5X-7500 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 1 MB per core.
  • All the CPUs support 20 PCIe 4.0 lanes.
  • Includes integrated RDNA 3 GPU.
  • Includes XDNA AI Engine (Ryzen AI).
  • Fabrication process: TSMC 4 nm FinFET.
Branding and model CPU GPU NPU TDP Release
date [34]
Cores
(threads)		 Clock (GHz) L3 cache
(total)		Core
config [lower-alpha 1] 		ModelClock
(GHz)
BaseBoost
Ryzen 9(PRO) 7940HS 8 (16)4.05.216 MB1 × 8780M
12 CU		2.8 Ryzen AI
Up to 10 TOPS		35–54 WApril 30, 2023 [lower-alpha 2]
7940H [lower-alpha 3]
Ryzen 7(PRO) 7840HS 3.85.12.7
7840H [lower-alpha 3]
(PRO) 7840U 3.315–30 WMay 3, 2023 [lower-alpha 2]
Ryzen 5(PRO) 7640HS 6 (12)4.35.01 × 6760M
8 CU		2.635–54 WApril 30, 2023 [lower-alpha 2]
7640H [lower-alpha 3]
(PRO) 7640U 3.54.915–30 WMay 3, 2023 [lower-alpha 2]
(PRO) 7545U 3.22 + 4740M
4 CU		2.8NoNovember 2, 2023
(PRO) 7540U 1 × 62.5May 3, 2023 [lower-alpha 2]
Ryzen 3 7440U 4 (8)3.04.78 MB1 + 3
  1. ↑ Core Complexes (CCX) × cores per CCX or Zen 4 + Zen 4c cores
  2. 1 2 3 4 5 PRO versions launched on 13 June 2023.
  3. 1 2 3 China-only version of the HS SKU that lacks support for AMD EXPO and FreeSync technologies.

Dragon Range

The Dragon Range mobile processors are named as the "Ryzen 7045" series, and consist of HX, and HX3D suffix models only. [33]

Common features of Ryzen 7045 notebook CPUs:

  • Socket: FL1.
  • All the CPUs support DDR5-5200 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 1 MB per core.
  • All the CPUs support 28 PCIe 5.0 lanes.
  • Includes integrated RDNA 2 GPU on the I/O die with 2 CUs and clock speeds of 400 MHz (base), 2.2 GHz (boost) [lower-roman 1] .
  • Fabrication process: TSMC 5 nm FinFET (6 nm FinFET for the I/O and graphics die).
Branding and model Cores
(threads)		 Clock (GHz) L3 cache
(total)		 Chiplets Core
config [lower-alpha 1] 		TDP Release
date
BaseBoost
Ryzen 9 7945HX3D 16 (32)2.35.4128 MB [lower-roman 2] 2 × CCD
1 × I/OD		2 × 855–75 WJuly 27, 2023
7945HX 2.564 MBFebruary 28, 2023
[35]
7845HX 12 (24)3.05.22 × 645–75 W
Ryzen 7 7745HX 8 (16)3.65.132 MB1 × CCD
1 × I/OD		1 × 8
Ryzen 5 7645HX 6 (12)4.05.01 × 6
  1. ↑ Core Complexes (CCX) × cores per CCX
  1. ↑ Self identifies as "AMD Radeon 610M". See RDNA 2 § Integrated graphics processors (iGPs).
  2. ↑ Only one of the two CCXes has additional 64 MB of 3D V-Cache. Only the CCX without 3D V-Cache will be able to reach the maximum boost clocks. The CCX with 3D V-Cache will clock lower.

Hawk Point

Hawk Point is a refresh of Phoenix mobile processors, named as the "Ryzen 8040" and "Ryzen 8045" series, released on December 6, 2023. It features a 60% faster NPU compared to the 7040 series. [36]

Common features of Ryzen 8040 notebook APUs:

  • Socket: FP7, FP7r2, FP8.
  • All the CPUs support DDR5-5600 or LPDDR5X-7500 in dual-channel mode.
  • L1 cache: 64 KB (32 KB data + 32 KB instruction) per core.
  • L2 cache: 1 MB per core.
  • All the CPUs support 20 PCIe 4.0 lanes.
  • Includes integrated RDNA 3 GPU.
  • Includes XDNA AI Engine (Ryzen AI).
  • Fabrication process: TSMC 4 nm FinFET.
Branding and model CPU GPU NPU TDP Release
date
Cores
(threads)		 Clock (GHz) L3 cache
(total)		Core
config [lower-alpha 1] 		ModelClock
(GHz)
BaseBoost
Ryzen 9 8945HS 8 (16)4.05.216 MB1 × 8780M
12 CU		2.8 Ryzen AI
Up to 16 TOPS		35–54 WDecember 6, 2023 [37]
Ryzen 7 8845HS 3.85.12.7
8840HS 3.320–30 W
8840U 15–30 W
Ryzen 5 8645HS 6 (12)4.35.01 × 6760M
8 CU		2.635–54 W
8640HS 3.54.920–30 W
8640U 15–30 W
8540U 3.22 + 4740M
4 CU		2.8No
Ryzen 3 8440U 4 (8)3.04.78 MB1 + 32.5
  1. ↑ Core Complexes (CCX) × cores per CCX or Zen 4 + Zen 4c cores

Server

Genoa, Bergamo, and Siena

On November 10, 2022, AMD launched the fourth generation (also known as the 9004 series) of EPYC server and data center processors based on the Zen 4 microarchitecture, codenamed Genoa. [38] Genoa features between 16 and 96 Zen 4 cores, alongside PCIe 5.0 and DDR5, designed for enterprise and cloud data center clients.

Model Fab Cores
(Threads)		 Chiplets Core
config [lower-roman 1] 		Clock rate
(GHz)		 Cache (MB) Socket Socket
count		 PCIe 5.0
lanes		 Memory
support 		TDP Release
date		Price
(USD)
BaseBoost L1 L2 L3 DDR5 ECC
Low Power & Edge (Zen 4c cores)
8024P TSMC
N5 		8 (16)4 × CCD
1 × I/OD		4 × 22.453.00.5832 SP6 1P96DDR5-4800
six-channel 		90 WSep 18, 2023$409
8024PN 2.0580 W$525
8124P 16 (32)4 × 42.911664125 W$639
8124PN 2.0100 W$790
8224P 24 (48)4 × 62.551.524160 W$855
8224PN 2.0120 W$1,015
8324P 32 (64)4 × 82.65232128180 W$1,895
8324PN 2.05130 W$2,125
8434P 48 (96)4 × 122.53.1348200 W$2,700
8434PN 2.03.0155 W$3,150
8534P 64 (128)4 × 162.33.1464200 W$4,950
8534PN 2.0155 W$5,450
Mainstream Enterprise (Zen 4 cores)
9124 TSMC
N5 		16 (32)4 × CCD
1 × I/OD		4 × 43.03.711664 SP5 1P/2P128DDR5-4800
twelve-channel 		200 WNov 10, 2022$1,083
9224 24 (48)4 × 62.53.71.524200 W$1,825
9254 4 × 62.94.15128220 W$2,299
9334 32 (64)4 × 82.73.9232210 W$2,990
9354 8 × CCD
1 × I/OD		8 × 43.253.75256280 W$3,420
9354P 1P$2,730
Performance Enterprise (Zen 4 cores)
9174F TSMC
N5 		16 (32)8 × CCD
1 × I/OD		8 × 24.14.4116256 SP5 1P/2P128DDR5-4800
twelve-channel 		320 WNov 10, 2022$3,850
9184X 3.554.2768Jun 13, 2023$4,928
9274F 24 (48)8 × 34.054.31.524256Nov 10, 2022$3,060
9374F 32 (64)8 × 43.854.3232$4,860
9384X 3.13.9768Jun 13, 2023$5,529
9474F 48 (96)8 × 63.64.1348256360 WNov 10, 2022$6,780
High Performance Computing (Zen 4 cores)
9454 TSMC
N5 		48 (96)8 × CCD
1 × I/OD		8 × 62.753.8348256 SP5 1P/2P128DDR5-4800
twelve-channel 		290 WNov 10, 2022$5,225
9454P 1P$4,598
9534 64 (128)8 × 82.453.74641P/2P280 W$8,803
9554 3.13.75360 W$9,087
9554P 1P$7,104
9634 84 (168)12 × CCD
1 × I/OD		12 × 72.253.75.25843841P/2P290 W$10,304
9654 96 (192)12 × 82.43.7696360 W$11,805
9654P 1P$10,625
9684X 2.553.711521P/2P400 WJun 13, 2023$14,756
Cloud (Zen 4c cores)
9734 TSMC
N5 		112 (224)8 × CCD
1 × I/OD		8 x 142.23.07112256 SP5 1P/2P128DDR5-4800
twelve-channel 		340 WJun 13, 2023$9,600
9754S 128 (128)8 x 162.253.18128360 W$10,200
9754 128 (256)$11,900
  1. ↑ Core Complexes (CCX) × cores per CCX

Zen 4c

Zen 4c is a variant of Zen 4 featuring smaller Zen 4 cores with lower clock frequencies, power usage, reduced L3 cache per core, and is intended to fit a greater number of cores in a given space. Zen 4c's smaller cores and higher core counts are designed for heavily multi-threaded workloads such as cloud computing. [39] [40]

A Zen 4c CCD features 16 smaller Zen 4c cores, divided into two Core Complexes (CCX) of 8 cores each. [41] The 16 core Zen 4c CCD is 9.6% larger in area than the regular 8 core Zen 4 CCD. [42] The Zen 4c CCD die size measures at 72.7 mm2 compared to the 66.3 mm2 die area for the Zen 4 CCD. However, an individual Zen 4c core has a smaller footprint than a Zen 4 core, meaning that a larger number of smaller cores can be fitted into the CCD. A Zen 4c core is about 35.4% smaller than a Zen 4 core. [43] In addition to the reduced core footprint, die space is further saved in the Zen 4c CCD via the use of denser 6T dual-port SRAM cells and an overall reduction of L3 cache to 16 MB per 8-core CCX. Zen 4c cores have the same sized L1 and L2 caches as Zen 4 cores but the cache die area in Zen 4c cores is lower due to using denser SRAM and slower cache. [43] The through-silicon via (TSV) connection arrays, which are used for vertical die stacking in Zen 4 3D V-Cache CCDs, are removed from the Zen 4c CCD to save silicon space. [44] Even though the Zen 4c core has a smaller footprint, it is still able to maintain the same IPC as the larger Zen 4 core. [45]

"Our Zen 4c, it's our compact density that's an addition, it's a new swimlane to our cores roadmap, and it delivers the identical functionality of Zen 4 at about half of the core area." [44]

Mark Papermaster, AMD Chief Technical Officer (CTO)

Unlike Intel's competing Gracemont E-cores, Zen 4c features 2 threads per core with simultaneous multithreading. [46] The IPC of a Zen 4c core is closer to that of a Zen 4 core than an Intel Gracemont E-core IPC is to a P-core. [46] Additionally, Zen 4c supports the same instruction sets as Zen 4 such as AVX-512 which is not the case with Intel's P-cores and E-cores. Intel's Gracemont E-cores lack support for the AVX-512 instructions contained in Golden Cove P-cores. [47]

CoreZen 4Zen 4c
Codename(s)CorePersephoneDionysus
CCDDurangoVindhya
Cores (threads) per CCD8 (16)16 (32)
L3 cache per CCD32 MB
(32 MB per CCX)		32 MB
(16 MB per CCX)
Die sizeCCD area66.3 mm272.7 mm2
Core area3.84 mm22.48 mm2

The Zen 4c core launched on June 13, 2023 with three Epyc Bergamo SKUs: 9734, 9754 and 9754S. [48] The 9754S SKU features 128 Zen 4c cores but only 128 threads rather than the full 256 threads as simultaneous multithreading is disabled. [49] Zen 4c launched in Epyc 8004 series processors, codenamed "Siena", on September 18, 2023. With up to 64 cores and 128 threads, Siena is designed with a lower cost platform in mind for entry-level server, edge computing, and telecommunications segments where higher energy efficiency is a priority. [50]

Zen 4c made its debut outside of server processors in the Ryzen 7040U series, codenamed "Phoenix 2", which launched on November 2, 2023. The Ryzen 3 7440U and Ryzen 5 7545U processors feature both standard Zen 4 cores and smaller Zen 4c cores. [51]

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<span class="mw-page-title-main">Zen (first generation)</span> 2017 AMD 14-nanometre processor microarchitecture

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References

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