Zen (first generation)

This article is about the first generation of the Zen microarchitecture. For the CPU architecture family, see Zen (microarchitecture).

AMD Zen

The logo for the Zen microarchitecture is a closed ensō
General information
Launched	March 2, 2017;7 years ago (March 2, 2017) [1]
Designed by	AMD
Common manufacturer(s)	GlobalFoundries [2]
CPUID code	Family 17h
Cache
L1 cache	64 KB instruction, 32 KB data per core
L2 cache	512 KB per core
L3 cache	8 MB per quad-core CCX (APU: 4 MB)
Architecture and classification
Instruction set	AMD64 (x86-64)
Physical specifications
Transistors	14 nm (FinFET) [2]
Cores	2–4 (essential) 4–8 (mainstream) 8–16 (enthusiast) [3] [4] [5] [6] Up to 32 (server) [3] [7]
Socket(s)	Socket AM4 [8] Socket TR4 Socket SP3
Products, models, variants
Product code name(s)	Summit Ridge (Desktop) Whitehaven (HEDT) Raven Ridge (APU/Embedded) Naples (Server CPU) Snowy Owl (Server APU) [9]
Brand name(s)	Ryzen Ryzen Threadripper Epyc Athlon
History
Predecessor(s)	Excavator (4th gen)
Successor(s)	Zen+
Support status
Supported

Zen is the codename for the first iteration in a family of computer processor microarchitectures of the same name from AMD. It was first used with their Ryzen series of CPUs in February 2017. ^[3] The first Zen-based preview system was demonstrated at E3 2016, and first substantially detailed at an event hosted a block away from the Intel Developer Forum 2016. The first Zen-based CPUs, codenamed "Summit Ridge", reached the market in early March 2017, Zen-derived Epyc server processors launched in June 2017 ^[10] and Zen-based APUs arrived in November 2017. ^[11]

Zen is a clean sheet design that differs from AMD's previous long-standing Bulldozer architecture. Zen-based processors use a 14 nm FinFET process, are reportedly more energy efficient, and can execute significantly more instructions per cycle. SMT has been introduced, allowing each core to run two threads. The cache system has also been redesigned, making the L1 cache write-back. Zen processors use three different sockets: desktop Ryzen chips use the AM4 socket, bringing DDR4 support; the high-end desktop Zen-based Threadripper chips support quad-channel DDR4 memory and offer 64 PCIe 3.0 lanes (vs 24 lanes), using the TR4 socket; ^{[12] [13]} and Epyc server processors offer 128 PCIe 3.0 lanes and octa-channel DDR4 using the SP3 socket.

Zen is based on a SoC design. ^[14] The memory controller and the PCIe, SATA, and USB controllers are incorporated into the same chip(s) as the processor cores. This has advantages in bandwidth and power, at the expense of chip complexity and die area. ^[15] This SoC design allows the Zen microarchitecture to scale from laptops and small-form factor mini PCs to high-end desktops and servers.

By 2020, 260 million Zen cores have already been shipped by AMD. ^[16]

Design

A highly simplified illustration of the Zen microarchitecture: a core has a total of 512 KB of L2 cache.

Ryzen 3 1200 Die Shot

Photomontage of a delidded Zen CPU with an etched die.

A delidded AMD EPYC 7001 processor used in servers; The four dies are similar to the ones used in mainstream processors. All EPYC processors contain four dies to provide structural support to the IHS (Integrated Heat Spreader).

A delidded AMD Athlon 3000G APU, based on the Zen architecture. The die is physically smaller than those on mainstream Zen processors.

Die shot of an AMD Athlon 3000G

According to AMD, the main focus of Zen is on increasing per-core performance. ^{[20] [21] [22]}

New or improved features include: ^[23]

• The L1 cache has been changed from write-through to write-back, allowing for lower latency and higher bandwidth.
• SMT (simultaneous multithreading) architecture allows for two threads per core, a departure from the CMT (clustered multi-thread) design used in the previous Bulldozer architecture. This is a feature previously offered in some IBM, Intel and Oracle processors. ^[24]
• A fundamental building block for all Zen-based CPUs is the Core Complex (CCX) consisting of four cores and their associated caches. Processors with more than four cores consist of multiple CCXs connected by Infinity Fabric. ^[25] Processors with non-multiple-of-four core counts have some cores disabled.
• Four ALUs, two AGUs/load–store units, and two floating-point units per core. ^[26]
• Newly introduced "large" micro-operation cache. ^[27]
• Each SMT core can dispatch up to six micro-ops per cycle (a combination of 6 integer micro-ops and 4 floating point micro-ops per cycle). ^{[28] [29]}
• Close to 2× faster L1 and L2 bandwidth, with total L3 cache bandwidth up 5×.
• Clock gating.
• Larger retire, load, and store queues.
• Improved branch prediction using a hashed perceptron system with Indirect Target Array similar to the Bobcat microarchitecture, ^[30] something that has been compared to a neural network by AMD engineer Mike Clark. ^[31]
• The branch predictor is decoupled from the fetch stage.
• A dedicated stack engine for modifying the stack pointer, similar to that of Intel Haswell and Broadwell processors. ^[32]
• Move elimination, a method that reduces physical data movement to reduce power consumption.
• Binary compatibility with Intel's Skylake (excluding VT-x and private MSRs):
  • RDSEED support, a set of high-performance hardware random number generator instructions introduced in Broadwell. ^[33]
  • Support for the SMAP, SMEP, XSAVEC/XSAVES/XRSTORS, and CLFLUSHOPT instructions. ^[33]
  • ADX support.
  • SHA support.
• CLZERO instruction for clearing a cache line. ^[33] Useful for handling ECC-related Machine-check exceptions.
• PTE (page table entry) coalescing, which combines 4 kB page tables into 32 kB page size.
• "Pure Power" (more accurate power monitoring sensors). ^[34]
  • Support for intel-style running average power limit (RAPL) measurement. ^[35]
• Smart Prefetch.
• Precision Boost.
• eXtended Frequency Range (XFR), an automated overclocking feature which boosts clock speeds beyond the advertised turbo frequency. ^[36]

This is the first time in a very long time that we engineers have been given the total freedom to build a processor from scratch and do the best we can do. It is a multi-year project with a really large team. It's like a marathon effort with some sprints in the middle. The team is working very hard, but they can see the finish line. I guarantee that it will deliver a huge improvement in performance and power consumption over the previous generation.

— Suzanne Plummer, Zen team leader, on September 19th, 2015. ^[37]

The Zen architecture is built on a 14 nanometer FinFET process subcontracted to GlobalFoundries, ^[38] which in turn licenses its 14 nm process from Samsung Electronics. ^[39] This gives greater efficiency than the 32 nm and 28 nm processes of previous AMD FX CPUs and AMD APUs, respectively. ^[40] The "Summit Ridge" Zen family of CPUs use the AM4 socket and feature DDR4 support and a 95 W TDP (thermal design power). ^[40] While newer roadmaps don't confirm the TDP for desktop products, they suggest a range for low-power mobile products with up to two Zen cores from 5 to 15 W and 15 to 35 W for performance-oriented mobile products with up to four Zen cores. ^[41]

Each Zen core can decode four instructions per clock cycle and includes a micro-op cache which feeds two schedulers, one each for the integer and floating point segments. ^{[42] [43]} Each core has two address generation units, four integer units, and four floating point units. Two of the floating point units are adders, and two are multiply-adders. However, using multiply-add-operations may prevent simultaneous add operation in one of the adder units. ^[44] There are also improvements in the branch predictor. The L1 cache size is 64 KB for instructions per core and 32 KB for data per core. The L2 cache size 512 KB per core, and the L3 is 1–2 MB per core. L3 caches offer 5× the bandwidth of previous AMD designs.

History and development

AMD began planning the Zen microarchitecture shortly after re-hiring Jim Keller in August 2012. ^[45] AMD formally revealed Zen in 2015.

The team in charge of Zen was led by Keller (who left in September 2015 after a 3-year tenure) and Zen Team Leader Suzanne Plummer. ^{[46] [47]} The Chief Architect of Zen was AMD Senior Fellow Michael Clark. ^{[48] [49] [50]}

Zen was originally planned for 2017 following the ARM64-based K12 sister core, but on AMD's 2015 Financial Analyst Day it was revealed that K12 was delayed in favor of the Zen design, to allow it to enter the market within the 2016 timeframe, ^[8] with the release of the first Zen-based processors expected for October 2016. ^[51]

In November 2015, a source inside AMD reported that Zen microprocessors had been tested and "met all expectations" with "no significant bottlenecks found". ^{[2] [52]}

In December 2015, it was rumored that Samsung may have been contracted as a fabricator for AMD's 14 nm FinFET processors, including both Zen and AMD's then-upcoming Polaris GPU architecture. ^[53] This was clarified by AMD's July 2016 announcement that products had been successfully produced on Samsung's 14 nm FinFET process. ^[54] AMD stated Samsung would be used "if needed", arguing this would reduce risk for AMD by decreasing dependence on any one foundry.

In December 2019, AMD started putting out first generation Ryzen products built using the second generation Zen+ architecture. ^[55]

Advantages over predecessors

Manufacturing process

Processors based on Zen use 14 nm FinFET silicon. ^[56] These processors are reportedly produced at GlobalFoundries. ^[57] Prior to Zen, AMD's smallest process size was 28 nm, as utilized by their Steamroller and Excavator microarchitectures. ^{[58] [59]} The immediate competition, Intel's Skylake and Kaby Lake microarchitecture, are also fabricated on 14 nm FinFET; ^[60] though Intel planned to begin the release of 10 nm parts later in 2017. ^[61] Intel was unable to reach this goal, and in 2021, only mobile chips have been produced with the 10nm process. In comparison to Intel's 14 nm FinFET, AMD claimed in February 2017 the Zen cores would be 10% smaller. ^[62] Intel has later announced in July 2018 that 10nm mainstream processors should not be expected before the second half of 2019. ^[63]

For identical designs, these die shrinks would use less current (and power) at the same frequency (or voltage). As CPUs are usually power limited (typically up to ~125 W, or ~45 W for mobile), smaller transistors allow for either lower power at the same frequency, or higher frequency at the same power. ^[64]

Performance

One of Zen's major goals in 2016 was to focus on performance per-core, and it was targeting a 40% improvement in instructions per cycle (IPC) over its predecessor. ^[65] Excavator, in comparison, offered 4–15% improvement over previous architectures. ^{[66] [67]} AMD announced the final Zen microarchitecture actually achieved 52% improvement in IPC over Excavator. ^[68] The inclusion of SMT also allows each core to process up to two threads, increasing processing throughput by better use of available resources.

The Zen processors also employ sensors across the chip to dynamically scale frequency and voltage. ^[69] This allows for the maximum frequency to be dynamically and automatically defined by the processor itself based upon available cooling.

AMD has demonstrated an 8-core/16-thread Zen processor outperforming an equally-clocked Intel Broadwell-E processor in Blender rendering ^{[3] [9]} and HandBrake benchmarks. ^[69]

Zen supports AVX2 but it requires two clock cycles to complete each AVX2 instruction compared to Intel's one. ^{[70] [71]} This difference was corrected in Zen 2.

Memory

Zen supports DDR4 memory (up to eight channels) ^[72] and ECC. ^[73]

Pre-release reports stated APUs using the Zen architecture would also support High Bandwidth Memory (HBM). ^[74] However, the first demonstrated APU did not use HBM. ^[75] Previous APUs from AMD relied on shared memory for both the GPU and the CPU.

Power consumption and heat output

Processors built at the 14 nm node on FinFET silicon should show reduced power consumption and therefore heat over their 28 nm and 32 nm non-FinFET predecessors (for equivalent designs), or be more computationally powerful at equivalent heat output/power consumption.

Zen also uses clock gating, ^[43] reducing the frequency of underutilized portions of the core to save power. This comes from AMD's SenseMI technology, using sensors across the chip to dynamically scale frequency and voltage. ^[69]

Enhanced security and virtualization support

Zen added support for AMD's Secure Memory Encryption (SME) and AMD's Secure Encrypted Virtualization (SEV). Secure Memory Encryption is real-time memory encryption done per page table entry. Encryption occurs on a hardware AES engine and keys are managed by the onboard "Security" Processor (ARM Cortex-A5) at boot time to encrypt each page, allowing any DDR4 memory (including non-volatile varieties) to be encrypted. AMD SME also makes the contents of the memory more resistant to memory snooping and cold boot attacks. ^{[76] [77]}

SME can be used to mark individual pages of memory as encrypted through the page tables. A page of memory that is marked encrypted will be automatically decrypted when read from DRAM and will be automatically encrypted when written to DRAM. The SME feature is identified through a CPUID function and enabled through the SYSCFG MSR. Once enabled, page table entries will determine how the memory is accessed. If a page table entry has the memory encryption mask set, then that memory will be accessed as encrypted memory. The memory encryption mask (as well as other related information) is determined from settings returned through the same CPUID function that identifies the presence of the feature.

^[78]

The Secure Encrypted Virtualization (SEV) feature allows the memory contents of a virtual machine (VM) to be transparently encrypted with a key unique to the guest VM. The memory controller contains a high-performance encryption engine which can be programmed with multiple keys for use by different VMs in the system. The programming and management of these keys is handled by the AMD Secure Processor firmware which exposes an API for these tasks. ^[79]

Connectivity

Incorporating much of the southbridge into the SoC, the Zen CPU includes SATA, USB, and PCI Express NVMe links. ^{[80] [81]} This can be augmented by available Socket AM4 chipsets which add connectivity options including additional SATA and USB connections, and support for AMD's Crossfire and Nvidia's SLI. ^[82]

AMD, in announcing its Radeon Instinct line, argued that the upcoming Zen-based Naples server CPU would be particularly suited for building deep learning systems. ^{[83] [84]} The 128 ^[85] PCIe lanes per Naples CPU allows for eight Instinct cards to connect at PCIe x16 to a single CPU. This compares favorably to the Intel Xeon line, with only 40^{[ citation needed ]} PCIe lanes.

Features

APUs

APU features table

Products

The Zen architecture is used in the current-generation desktop Ryzen CPUs. It is also in Epyc server processors (successor of Opteron processors), and APUs. ^{[74] [ unreliable source ] [86] [87]}

The first desktop processors without graphics processing units (codenamed "Summit Ridge") were initially expected to start selling at the end of 2016, according to an AMD roadmap; with the first mobile and desktop processors of the AMD Accelerated Processing Unit type (codenamed "Raven Ridge") following in late 2017. ^[88] AMD officially delayed Zen until Q1 of 2017. In August 2016, an early demonstration of the architecture showed an 8-core/16-thread engineering sample CPU at 3.0 GHz. ^[9]

In December 2016, AMD officially announced the desktop CPU line under the Ryzen brand for release in Q1 2017. It also confirmed Server processors would be released in Q2 2017, and mobile APUs in H2 2017. ^[89]

On March 2, 2017, AMD officially launched the first Zen architecture-based octacore Ryzen desktop CPUs. The final clock speeds and TDPs for the 3 CPUs released in Q1 of 2017 demonstrated significant performance-per-watt benefits over the previous K15h (Piledriver) architecture. ^{[90] [91]} The octacore Ryzen desktop CPUs demonstrated performance-per-watt comparable to Intel's Broadwell octacore CPUs. ^{[92] [93]}

In March 2017, AMD also demonstrated an engineering sample of a server CPU based on the Zen architecture. The CPU (codenamed "Naples") was configured as a dual-socket server platform with each CPU having 32 cores/64 threads. ^{[3] [9]}

Desktop processors

Main article: Ryzen

Common features of Ryzen 1000 desktop CPUs:

• Socket: AM4.
• All the CPUs support DDR4-2666 in dual-channel mode.
• L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
• L2 cache: 512 KB per core.
• All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
• No integrated graphics.
• Node/fabrication process: GlobalFoundries 14 LP.

Branding and Model		Cores (threads)	Thermal solution	Clock rate (GHz)			L3 cache (total)	TDP	Core config [lower-roman 1]	Release date
				Base	PBO 1–2 (≥3)	XFR [94] 1–2
Ryzen 7	1800X	8 (16)	Wraith Max (OEM only)	3.6	4.0 (3.7)	4.1	16 MB	95 W	2 × 4	March 2, 2017
	PRO 1700X		Wraith Spire	3.4	3.8 (3.5)	3.9				June 29, 2017
	1700X		Wraith Max (OEM only)							March 2, 2017
	PRO 1700		Wraith Spire	3.0	3.7 (3.2)	3.75		65 W		June 29, 2017
	1700		Wraith Spire LED (retail) Wraith Spire (OEM)							March 2, 2017
Ryzen 5	1600X	6 (12)	Wraith Max (OEM only)	3.6	4.0 (3.7)	4.1		95 W	2 × 3	April 11, 2017
	PRO 1600		Wraith Spire	3.2	3.6 (3.4)	3.7		65 W		June 29, 2017
	1600									April 11, 2017
	1500X	4 (8)		3.5	3.7 (3.6)	3.9			2 × 2
	PRO 1500									June 29, 2017
	1400		Wraith Stealth	3.2	3.4 (3.4)	3.45	8 MB			April 11, 2017
Ryzen 3	1300X	4 (4)		3.5	3.7 (3.5)	3.9				July 27, 2017
	PRO 1300		Wraith Spire							June 29, 2017
	PRO 1200			3.1	3.4 (3.1)	3.45
	1200		Wraith Stealth							July 27, 2017

• v
• t
• e

1. Core Complexes (CCX) × cores per CCX

Common features of Ryzen 1000 HEDT CPUs:

• Socket: TR4.
• All the CPUs support DDR4-2666 in quad-channel mode.
• L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
• L2 cache: 512 KB per core.
• All the CPUs support 64 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.
• No integrated graphics.
• Node/fabrication process: GlobalFoundries 14LP.

Branding and Model		Cores (threads)	Clock rate (GHz)			L3 cache (total)	TDP	Chiplets	Core config [lower-roman 1]	Release date	MSRP
			Base	PBO 1–4 (≥5)	XFR [94] 1–2
Ryzen Threadripper	1950X	16 (32)	3.4	4.0 (3.7)	4.2	32 MB	180 W	2 × CCD [lower-roman 2]	4 × 4	Aug 31, 2017	US $999
	1920X	12 (24)	3.5						4 × 3		US $799
	1900X	8 (16)	3.8	4.0 (3.9)		16 MB			2 × 4		US $549

• v
• t
• e

1. Core Complexes (CCX) × cores per CCX
2. Processor package actually contains two additional inactive dies to provide structural support to the integrated heat spreader.

Ryzen 5 1600 CPU on a motherboard

Threadripper 1950X TR4 in socket

Desktop APUs

Ryzen APUs are identified by either the G or GE suffix in their name.

Die shot of an AMD 2200G APU

Model	Release date & price	Fab	Thermal Solution	CPU						GPU				Socket	PCIe lanes	DDR4 memory support	TDP (W)
				Cores (threads)	Clock rate (GHz)		Cache			Model	Config [lower-roman 1]	Clock (GHz)	Processing power (GFLOPS) [lower-roman 2]
					Base	Boost	L1	L2	L3
Athlon 200GE [95]	September 6, 2018 US $55	GloFo 14LP	AMD 65W thermal solution	2 (4)	3.2	—	64 KB inst. 32 KB data per core	512 KB per core	4 MB	Vega 3	192:12:4 3 CU	1.0	384	AM4	16 (8+4+4)	2667 dual-channel	35
Athlon Pro 200GE [96]	September 6, 2018 OEM		OEM
Athlon 220GE [97]	December 21, 2018 US $65		AMD 65W thermal solution		3.4
Athlon 240GE [98]	December 21, 2018 US $75				3.5
Athlon 3000G [99]	November 19, 2019 US $49											1.1	424.4
Athlon 300GE [100]	July 7, 2019 OEM		OEM		3.4
Athlon Silver 3050GE [101]	July 21, 2020 OEM
Ryzen 3 Pro 2100GE [102]	c. 2019 OEM				3.2	?							?			2933 dual-channel
Ryzen 3 2200GE [103]	April 19, 2018 OEM			4 (4)	3.2	3.6				Vega 8	512:32:16 8 CU		1126
Ryzen 3 Pro 2200GE [104]	May 10, 2018 OEM
Ryzen 3 2200G	February 12, 2018 US $99		Wraith Stealth		3.5	3.7											45– 65
Ryzen 3 Pro 2200G [105]	May 10, 2018 OEM		OEM
Ryzen 5 2400GE [106]	April 19, 2018 OEM			4 (8)	3.2	3.8				RX Vega 11	704:44:16 11 CU	1.25	1760				35
Ryzen 5 Pro 2400GE [107]	May 10, 2018 OEM
Ryzen 5 2400G [108]	February 12, 2018 [109] [110] US $169		Wraith Stealth		3.6	3.9											45– 65
Ryzen 5 Pro 2400G [111]	May 10, 2018 OEM		OEM

• v
• t
• e

1. Unified Shaders  : Texture Mapping Units  : Render Output Units and Compute Units (CU)
2. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Mobile APUs

Model	Release date	Fab	CPU						GPU				Socket	PCIe lanes	Memory support	TDP
			Cores (threads)	Clock rate (GHz)		Cache			Model	Config [lower-roman 1]	Clock (MHz)	Processing power (GFLOPS) [lower-roman 2]
				Base	Boost	L1	L2	L3
Athlon Pro 200U	2019	GloFo 14LP	2 (4)	2.3	3.2	64 KB inst. 32 KB data per core	512 KB per core	4 MB	Radeon Vega 3	192:12:4 3 CU	1000	384	FP5	12 (8+4)	DDR4-2400 dual-channel	12–25 W
Athlon 300U	Jan 6, 2019			2.4	3.3
Ryzen 3 2200U	Jan 8, 2018			2.5	3.4						1100	422.4
Ryzen 3 3200U	Jan 6, 2019			2.6	3.5						1200	460.8
Ryzen 3 2300U	Jan 8, 2018		4 (4)	2.0	3.4				Radeon Vega 6	384:24:8 6 CU	1100	844.8
Ryzen 3 Pro 2300U	May 15, 2018
Ryzen 5 2500U	Oct 26, 2017		4 (8)		3.6				Radeon Vega 8	512:32:16 8 CU		1126.4
Ryzen 5 Pro 2500U	May 15, 2018
Ryzen 5 2600H	Sep 10, 2018			3.2											DDR4-3200 dual-channel	35–54 W
Ryzen 7 2700U	Oct 26, 2017			2.2	3.8				Radeon RX Vega 10	640:40:16 10 CU	1300	1664			DDR4-2400 dual-channel	12–25 W
Ryzen 7 Pro 2700U	May 15, 2018								Radeon Vega 10
Ryzen 7 2800H	Sep 10, 2018			3.3					Radeon RX Vega 11	704:44:16 11 CU		1830.4			DDR4-3200 dual-channel	35–54 W

• v
• t
• e

1. Unified shaders  : Texture mapping units  : Render output units and Compute units (CU)
2. Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Ultra-mobile APUs

Dalí

Model	Release date	Fab	CPU						GPU				Socket	PCIe lanes	Memory support	TDP	Part number
			Cores (threads)	Clock rate (GHz)		Cache			Model	Config [lower-alpha 1]	Clock (GHz)	Processing power (GFLOPS) [lower-alpha 2]
				Base	Boost	L1	L2	L3
AMD 3020e	Jan 6, 2020	14 nm	2 (2)	1.2	2.6	64 KB inst. 32 KB data per core	512 KB per core	4 MB	Radeon Graphics (Vega)	192:12:4 3 CU	1.0	384	FP5	12 (8+4)	DDR4-2400 dual-channel	6 W	YM3020C7T2OFG
Athlon PRO 3045B	Q1 2021			2.3	3.2					128:8:4 2 CU	1.1	281.6				15 W	YM3045C4T2OFG
Athlon Silver 3050U	Jan 6, 2020																YM3050C4T2OFG
Athlon Silver 3050C	Sep 22, 2020																YM305CC4T2OFG
Athlon Silver 3050e	Jan 6, 2020		2 (4)	1.4	2.8					192:12:4 3 CU [112]	1.0	384				6 W	YM3050C7T2OFG
Athlon PRO 3145B	Q1 2021			2.4	3.3											15 W	YM3145C4T2OFG
Athlon Gold 3150U	Jan 6, 2020																YM3150C4T2OFG
Athlon Gold 3150C	Sep 22, 2020																YM315CC4T2OFG
Ryzen 3 3250U	Jan 6, 2020			2.6	3.5						1.2	460.8					YM3250C4T2OFG
Ryzen 3 3250C	Sep 22, 2020																YM325CC4T2OFG

• v
• t
• e

1. Unified shaders  : Texture mapping units  : Render output units and Compute units (CU)
2. Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Pollock

Model	Release date	Fab	CPU						GPU				Socket	PCIe lanes	Memory support	TDP	Part number
			Cores (threads)	Clock rate (GHz)		Cache			Model	Config [lower-alpha 1]	Clock (GHz)	Processing power (GFLOPS) [lower-alpha 2]
				Base	Boost	L1	L2	L3
AMD 3015e	Jul 6, 2020	14 nm	2 (4)	1.2	2.3	64 KB inst. 32 KB data per core	512 KB per core	4 MB	Radeon Graphics (Vega)	192:12:4 3 CU	0.6	230.4	FT5	12 (8+4)	DDR4-1600 single-channel	6 W	AM3015BRP2OFJ
AMD 3015Ce	Apr 29, 2021																AM301CBRP2OFJ

• v
• t
• e

1. Unified shaders  : Texture mapping units  : Render output units and Compute units (CU)
2. Single precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Embedded processors

V1000

In February 2018, AMD announced the V1000 series of embedded Zen+Vega APUs with four SKUs. ^[113]

Model	Release date	Fab	CPU						GPU				Memory support	TDP	Junction temp. range (°C)
			Cores (threads)	Clock rate (GHz)		Cache			Model	Config [lower-roman 1]	Clock (GHz)	Processing power (GFLOPS) [lower-roman 2]
				Base	Boost	L1	L2	L3
V1202B	February 2018	GloFo 14LP	2 (4)	2.3	3.2	64 KB inst. 32 KB data per core	512 KB per core	4 MB	Vega 3	192:12:16 3 CU	1.0	384	DDR4-2400 dual-channel	12–25 W	0–105
V1404I	December 2018		4 (8)	2.0	3.6				Vega 8	512:32:16 8 CU	1.1	1126.4			-40–105
V1500B				2.2	—				—						0–105
V1605B	February 2018			2.0	3.6				Vega 8	512:32:16 8 CU	1.1	1126.4
V1756B				3.25									DDR4-3200 dual-channel	35–54 W
V1780B	December 2018			3.35					—
V1807B	February 2018				3.8				Vega 11	704:44:16 11 CU	1.3	1830.4

• v
• t
• e

1. Unified Shaders  : Texture Mapping Units  : Render Output Units and Compute Units (CU)
2. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

R1000

In 2019, AMD announced the R1000 series of embedded Zen+Vega APUs.

Model	Release date	Fab	CPU						GPU				Memory support	TDP
			Cores (threads)	Clock rate (GHz)		Cache			Model	Config [lower-roman 1]	Clock (GHz)	Processing power (GFLOPS) [lower-roman 2]
				Base	Boost	L1	L2	L3
R1102G	February 25, 2020	GloFo 14LP	2 (2)	1.2	2.6	64 KB inst. 32 KB data per core	512 KB per core	4 MB	Vega 3	192:12:4 3 CU	1.0	384	DDR4-2400 single-channel	6 W
R1305G			2 (4)	1.5	2.8								DDR4-2400 dual-channel	8-10 W
R1505G	April 16, 2019			2.4	3.3									12–25 W
R1606G				2.6	3.5						1.2	460.8

• v
• t
• e

1. Unified Shaders  : Texture Mapping Units  : Render Output Units and Compute Units (CU)
2. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.

Server processors

Main article: Epyc

Epyc

AMD announced in March 2017 that it would release a server platform based on Zen, codenamed Naples, in the second quarter of the year. The platform include 1- and 2-socket systems. The CPUs in multi-processor configurations communicate via AMD's Infinity Fabric. ^[114] Each chip supports eight channels of memory and 128 PCIe 3.0 lanes, of which 64 lanes are used for CPU-to-CPU communication through Infinity Fabric when installed in a dual-processor configuration. ^[115] AMD officially revealed Naples under the brand name Epyc in May 2017. ^[116]

On June 20, 2017, AMD officially released the Epyc 7000 series CPUs at a launch event in Austin, Texas. ^[117] Common features of EPYC 7001 series CPUs:

• Socket: SP3.
• All the CPUs support ECC DDR4-2666 in octa-channel mode (7251 supports only DDR4-2400).
• L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
• L2 cache: 512 KB per core.
• All the CPUs support 128 PCIe 3.0 lanes.
• Fabrication process: GlobalFoundries 14LP.

Model [lower-roman 1]	Cores (threads)	Clock rate (GHz)			L3 cache (total)	TDP	Chiplets	Core config [lower-roman 2]	Release		Embedded options [lower-roman 3]
		Base	Boost						Date	Price (USD)
			All–core	Max
7251 [118] [119]	8 (16)	2.1	2.9	2.9	32 MB	120 W	4 × CCD	8 × 1	Jun 2017 [120]	$475	Yes
7261 [118] [121]		2.5			64 MB	155/170 W			Jun 2018 [122]	$570	Yes
7281 [118] [119]	16 (32)	2.1	2.7	2.7	32 MB			8 × 2	Jun 2017 [120]	$650	Yes
7301 [118] [119]		2.2			64 MB					$800	Yes
7351P [118] [119]		2.4	2.9	2.9						$750	735P
7351 [118] [119]										$1,100	Yes
7371 [118] [123]		3.1	3.6	3.8		200 W			Nov 2018 [124]	$1,550	Yes
7401P [118] [119]	24 (48)	2.0	2.8	3.0		155/170 W		8 × 3	Jun 2017 [120]	$1,075	740P
7401 [118] [119]										$1,850	Yes
7451 [118] [119]		2.3	2.9	3.2		180 W				$2,400	Yes
7501 [118] [119]	32 (64)	2.0	2.6	3.0		155/170 W		8 × 4		$3,400	Yes
7551P [118] [119]			2.55			180 W				$2,100	755P
7551 [118] [119]										$3,400	Yes
7571 [125] [126]		2.2	3.0			200 W			Nov 2018	OEM/AWS	Un­known
7601 [118] [119]			2.7	3.2		180 W			Jun 2017 [120]	$4,200	Yes

• v
• t
• e

1. Models with "P" suffixes are uniprocessors, only available as single socket configuration.
2. Core Complexes (CCX) × cores per CCX
3. Epyc embedded 7001 series models have identical specifications as Epyc 7001 series.

Embedded server processors

In February 2018, AMD also announced the EPYC 3000 series of embedded Zen CPUs. ^[127] Common features of EPYC Embedded 3000 series CPUs:

• Socket: SP4 (31xx and 32xx models use SP4r2 package).
• All the CPUs support ECC DDR4-2666 in dual-channel mode (3201 supports only DDR4-2133), while 33xx and 34xx models support quad-channel mode.
• L1 cache: 96 KB (32 KB data + 64 KB instruction) per core.
• L2 cache: 512 KB per core.
• All the CPUs support 32 PCIe 3.0 lanes per CCD (max 64 lanes).
• Fabrication process: GlobalFoundries 14 nm.

Model	Cores (threads)	Clock rate (GHz)			L3 cache (total)	TDP	Chiplets	Core config [lower-roman 1]	Release date
		Base	Boost
			All-core	Max
3101 [128]	4 (4)	2.1	2.9	2.9	8 MB	35 W	1 x CCD	1 × 4	Feb 2018
3151 [128]	4 (8)	2.7			16 MB	45 W		2 × 2
3201 [128]	8 (8)	1.5	3.1	3.1		30 W		2 × 4
3251 [128]	8 (16)	2.5				55 W
3255 [129]						25–55 W			Dec 2018
3301 [128]	12 (12)	2.0	2.15	3.0	32 MB	65 W	2 x CCD	4 × 3	Feb 2018
3351 [128]	12 (24)	1.9	2.75			60–80 W
3401 [128]	16 (16)	1.85	2.25			85 W		4 × 4
3451 [128]	16 (32)	2.15	2.45			80–100 W

• v
• t
• e

1. Core Complexes (CCX) × cores per CCX

See also

• AMD K9
• AMD K10
• Jim Keller (engineer)
• Ryzen
• Steamroller (microarchitecture)
• Zen+
• Zen 2

References

1. "AMD Ryzen™ 7 Desktop Processors Featuring Record-Breaking Overclocking Performance Available Worldwide Today" (Press release). Sunnyvale, California: Advanced Micro Devices, Inc. 2017-03-02. Archived from the original on 2021-10-28. Retrieved 2020-11-07.
2. "GlobalFoundries announces 14nm validation with AMD Zen silicon". ExtremeTech. Archived from the original on 2016-12-07. Retrieved 2015-11-29.
3. Anthony, Sebastian (18 August 2016). "AMD says Zen CPU will outperform Intel Broadwell-E, delays release to 2017". Ars Technica. Archived from the original on 18 August 2016. Retrieved 18 August 2016.
4. "Details of AMD Zen 16-core x86 APU emerge". 13 April 2015. Archived from the original on 2 May 2016. Retrieved 17 January 2016.
5. "AMD Zen-based 8-core Desktop CPU Arrives in 2016, on Socket FM3". TechPowerUp. Archived from the original on 2016-03-02. Retrieved 2016-01-17.
6. Kampman, Jeff (16 May 2017). "Ryzen Threadripper CPUs will offer 16 cores and 32 threads". Tech Report. Archived from the original on 17 May 2017. Retrieved 16 May 2017.
7. Kennedy, Patrick (16 May 2017). "AMD EPYC New Details on the Emerging Server Platform". Serve the Home. Archived from the original on 6 June 2017. Retrieved 16 May 2017.
8. Ryan Smith (6 May 2015). "AMD's 2016-2017 x86 Roadmap: Zen Is In, Skybridge Is Out". AnandTech. Archived from the original on 8 May 2015. Retrieved 15 May 2015.
9. Kampman, Jeff (18 August 2016). "AMD gives us our first real moment of Zen". Tech Report. Archived from the original on 18 November 2016. Retrieved 18 August 2016.
10. Cutress, Ian. "AMD's Future in Servers: New 7000-Series CPUs Launched and Epyc Analysis". AnandTech. Archived from the original on 21 June 2017. Retrieved 8 August 2017.
11. "HP ENVY x360 Convertible Laptop - 15z touch - HP® Official Store". store.hp.com. Archived from the original on 2017-12-10. Retrieved 2017-12-09.
12. Brad Chacos (8 January 2016). "AMD Zen-based CPUs and APUs will unify around Socket AM4". PCWorld. Archived from the original on 2 February 2017. Retrieved 10 January 2016.
13. "Ryzen™ Threadripper™ Processors | AMD". www.amd.com. Archived from the original on 2017-09-29. Retrieved 2017-09-29.
14. "How AMD's powerful Zen chip flouts the SoC stereotype". PCWorld. Archived from the original on 2017-02-06. Retrieved 2017-03-08.
15. Cutress, Ian (18 August 2016). "Early AMD Zen Server CPU and Motherboard Details". Anandtech. Archived from the original on 22 March 2017. Retrieved 22 March 2017.
16. AMD Shipped 260 Million Zen Cores by 2020 Archived 2021-10-29 at the Wayback Machine . AnandTech.
17. "AMD Reveals Why Threadripper CPUs Have 4 Dies Under the Hood - ExtremeTech". Archived from the original on 2020-11-02. Retrieved 2020-10-28.
18. "AMD Ryzen Threadripper Does Have Four 8-Core Dies (32-cores)". Archived from the original on 2018-07-02. Retrieved 2020-10-28.
19. Lilly, Paul (28 July 2017). "Overclocker delids an AMD Ryzen Threadripper chip and finds Epyc inside | PC Gamer". PC Gamer . Archived from the original on 2020-10-31. Retrieved 2020-10-28.
20. "Weekend tech reading: AMD 'Zen' and their return to high-end CPUs, tracking Windows pirates - TechSpot". techspot.com. Archived from the original on 2015-05-11. Retrieved 2015-05-12.
21. "AMD: Zen chips headed to desktops, servers in 2016 - The Tech Report - Page 1". techreport.com. 6 May 2015. Archived from the original on 2015-05-09. Retrieved 2015-05-12.
22. Anton Shilov (11 September 2014). "AMD: 'Bulldozer' was not a game-changer, but next-gen 'Zen' will be". KitGuru. Archived from the original on 4 June 2016. Retrieved 1 February 2015.
23. Software Optimization Guide for AMD Family 17h Processors Archived 2017-07-12 at the Wayback Machine / AMD, June 2017
24. "AMD Zen Confirmed for 2016, Features 40% IPC Improvement Over Excavator". Archived from the original on 2016-03-04. Retrieved 2016-01-11.
25. Ian Cutress (2017-03-02). "The Core Complex, Caches, and Fabric". Archived from the original on 2017-06-25. Retrieved 2017-06-21.
26. Clark, Mike. "A New x86 Core Architecture for the Next Generation of Computing" (PDF). AMD. p. 7. Archived (PDF) from the original on 2016-11-26.
27. Cutress, Ian. "AMD Zen Microarchitecture: Dual Schedulers, Micro-Op Cache and Memory Hierarchy Revealed". Archived from the original on 2016-08-19. Retrieved 2016-08-18.
28. Mujtaba, Hassan (23 August 2016). "AMD Opens The Lid on Zen Architectural Details at Hot Chips – Huge Performance Leap Over Excavator, Massive Throughput on 14nm FinFET Design". WCCFtech. Archived from the original on 25 August 2016. Retrieved 23 August 2016.
29. Walrath, Josh (2 March 2017). "AMD Zen Architecture Overview: Focus on Ryzen | PC Perspective". PC Perspective. Archived from the original on 12 October 2017. Retrieved 13 March 2017.
30. Jiménez, Daniel. "Strided Sampling Hashed Perceptron Predictor" (PDF). Texas A&M University. Archived (PDF) from the original on 2016-09-19. Retrieved 2016-08-23.
31. Williams, Chris. "'Neural network' spotted deep inside Samsung's Galaxy S7 silicon brain". The Register. Archived from the original on 2017-09-19. Retrieved 2017-09-19.
32. Fog, Agner. "The microarchitecture of Intel, AMD and VIA CPUs" (PDF). Technical University of Denmark. Archived (PDF) from the original on 2017-03-28. Retrieved 2016-08-23.
33. "AMD Starts Linux Enablement On Next-Gen "Zen" Architecture". Phoronix. 17 March 2015. Archived from the original on 8 March 2017. Retrieved 17 March 2015.
34. "AMD Takes Computing to a New Horizon with Ryzen™ Processors". www.amd.com. Archived from the original on 2018-06-12. Retrieved 2017-09-19.
35. "Linux support for Power Measurement Interfaces". web.eece.maine.edu. Archived from the original on 2018-04-05. Retrieved 2020-11-25.
36. Chen, Sam (24 June 2017). "XFR". Custom PC Review. Archived from the original on 26 August 2018. Retrieved 26 July 2017.
37. Kirk Ladendorf - For the American-Statesman. "Amid challenges, chipmaker AMD sees a way forward".
38. Lilly, Paul (23 July 2016), "AMD Shipping Zen In Limited Quantity Q4, Volume Rollout Ramps Q1 2017", hothardware.com, archived from the original on 21 April 2019, retrieved 19 August 2016, Zen is being built on an advanced GlobalFoundries-sourced 14nm FinFET process
39. Schor, David (2018-07-22). "VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP". WikiChip Fuse. Archived from the original on 2019-04-07. Retrieved 2019-05-31.
40. "14nm AMD Zen CPU Will Have DDR4 and Simultaneous Multithreading". Softpedia. 28 January 2015. Archived from the original on 10 March 2015. Retrieved 31 January 2015.
41. "AMD's next gen CPU Zen". Shattered.Media. May 2015. Archived from the original on 2015-11-17.
42. "AMD's Zen core (family 17h) to have ten pipelines per core". 3 October 2015. Archived from the original on 2015-10-29. Retrieved 2015-10-13.
43. Cutress, Ian (18 August 2016). "AMD Zen Microarchitecture". Anandtech. Archived from the original on 19 August 2016. Retrieved 18 August 2016.
44. AMD, "Software Optimization Guider for AMD Family 17h Processors"
45. Jim Keller On AMD's Next-Gen High Performance x86 Zen Core & K12 ARM Core. YouTube. 7 May 2014.
46. "Jim Keller Leaves AMD". Anand tech. Archived from the original on 2015-10-15. Retrieved 2015-10-14.
47. Ladendorf, Kirk. "Amid challenges, chipmaker AMD sees a way forward". Austin American-Statesman. Archived from the original on 2020-01-04. Retrieved 2020-01-04.
48. Merritt, Rick (24 August 2016). "AMD Reveals Zen of X86". EE Times. Archived from the original on 4 March 2017. Retrieved 3 March 2017.
49. TAKAHASHI, Dean (24 August 2016). "How AMD designed what could be its most competitive processors in a decade". VentureBeat. Archived from the original on 4 March 2017. Retrieved 3 March 2017.
50. Wong, Adrian (18 April 2017). "Joe Macri : The Disruptive Nature of AMD Ryzen". TechArp. Archived from the original on 22 April 2017. Retrieved 20 April 2017.
51. "AMD set to release first 'Zen'-based microprocessors in late 2016 – document". KitGuru.net. 12 June 2015. Archived from the original on 13 September 2015. Retrieved 30 August 2015.
52. "OC3D :: Article :: AMD Tests Zen CPUs, "Met All Expectation" with no "Significant Bottlenecks" found :: AMD Tests Zen CPUs, Met All Expectation with no Significant Bottlenecks found". 2 November 2015. Archived from the original on 2015-11-04. Retrieved 2015-11-03.
53. "Samsung to fab AMD Zen & Arctic islands on its 14 nm Finfet node", Tech power up, archived from the original on 2016-01-09, retrieved 2016-01-10.
54. Moorhead, Patrick (25 July 2016). "AMD Officially Diversifies 14nm Manufacturing With Samsung". Forbes. Archived from the original on 26 July 2016. Retrieved 26 July 2016.
55. "First-Gen AMD Ryzen CPUs are Appearing with 12nm Zen+ Architecture". 2019-12-22. Archived from the original on 2019-12-22. Retrieved 2019-12-22.
56. "AMD's next-gen CPU leak: 14nm, simultaneous multithreading, and DDR4 support". ExtremeTech. Archived from the original on 2016-01-25. Retrieved 2016-01-12.
57. Rulison, Larry (22 August 2016). "Reports: Chip made by GlobalFoundries beats Intel". Times Union. Archived from the original on 23 August 2016. Retrieved 22 August 2016.
58. "AMD: We have taped out our first FinFET products". KitGuru. Archived from the original on 2016-01-25. Retrieved 2016-01-10.
59. "CES: AMD finally unveils 28nm APU Kaveri to battle Intel Haswell". The Inquirer. Archived from the original on January 9, 2014.
60. "Intel Kaby Lake to compete against AMD Zen at end of 2016". 2016-03-02. Archived from the original on 2016-03-06. Retrieved 2016-03-07. Intel's Kaby Lake-series processors, which are scheduled to launch in the third quarter, but will not begin volume production until the end of 2016, while AMD is set to release its Zen architecture-based processors at the end of the fourth quarter.
61. Edward Jones (21 Oct 2016). "AMD Zen: A serious challenge to Intel?". Channel Pro. Archived from the original on 23 June 2016. Retrieved 27 June 2016.
62. Manion, Wayne (8 February 2017). "AMD touts Zen die size advantage at ISSCC". Tech Report. Archived from the original on 9 February 2017. Retrieved 10 February 2017.
63. "Intel says not to expect mainstream 10nm chips until 2H19 | Ars Technica". 27 July 2018. Archived from the original on 2018-07-29. Retrieved 2018-07-29.
64. "Intel's 'Tick-Tock' Seemingly Dead, Becomes 'Process-Architecture-Optimization'". Anandtech. Archived from the original on 23 March 2016. Retrieved 23 March 2016.
65. Smith, Ryan (31 May 2016). "AMD Briefly Shows Off Zen "Summit Ridge" Silicon". Archived from the original on 5 June 2016. Retrieved 7 June 2016.
66. "AMD Announces Zen, 40% IPC Improvement Over Excavator - Coming In 2016". 7 May 2015. Archived from the original on 5 June 2016. Retrieved 4 June 2016.
67. Ian Cutress (June 2, 2015). "IPC Increases: Double L1 Data Cache, Better Branch Prediction - AMD Launches Carrizo: The Laptop Leap of Efficiency and Architecture Updates". Anandtech. Archived from the original on February 16, 2016. Retrieved January 17, 2016.
68. Cutress, Ian (22 February 2017). "AMD Launches Zen". Anandtech.com. Archived from the original on 27 February 2017. Retrieved 22 February 2017.
69. Kampman, Jeff (13 December 2016). "AMD crests Summit Ridge with Ryzen CPUs". TechReport. Archived from the original on 14 December 2016. Retrieved 13 December 2016.
70. Cutress, Ian. "AMD Zen Microarchiture Part 2: Extracting Instruction-Level Parallelism". Archived from the original on 2017-03-12. Retrieved 2017-03-10.
71. Leadbetter, Richard (22 February 2017). "In Theory: How AMD's Ryzen will disrupt the gaming CPU market". Eurogamer . Archived from the original on 9 March 2017. Retrieved 10 March 2017.
72. "AMD's Zen processors to feature up to 32 cores, 8-channel DDR4". TechSpot. Archived from the original on 2016-02-28. Retrieved 2016-02-24.
73. MAC (30 March 2017). "ECC Memory & AMD's Ryzen - A Deep Dive". Hardware Canucks. Archived from the original on 4 July 2017. Retrieved 14 July 2017.
74. "Zen-based APU with HBM to be AMD Carrizo successor". 4 January 2016. Archived from the original on 2016-01-12. Retrieved 2016-01-10.
75. Shrout, Ryan (30 May 2017). "Computex 2017: AMD Demos Ryzen Mobile SoC with Vega Graphics". PC Perspective. Archived from the original on 22 March 2019. Retrieved 2 June 2017.
76. "[RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD)". Archived from the original on 2016-05-01. Retrieved 2016-05-09.
77. "AMD MEMORY ENCRYPTION WHITEPAPER" (PDF). Archived (PDF) from the original on 2016-05-09. Retrieved 2016-05-09.
78. "LKML - Tom Lendacky (AMD) explains AMD Secure Memory Encryption". Archived from the original on 2016-08-04. Retrieved 2016-05-09.
79. "AMD - Other Developer Guides: Secure Encrypted Virtualization Key Management PDF – 05/19/2016" (PDF). Archived (PDF) from the original on 2017-03-25. Retrieved 2017-06-14.
80. L, Alex; Walrath, Josh (12 January 2017). "Podcast #432 - Kaby Lake, Vega, CES Review". PC Perspective. Retrieved 13 January 2017.
81. Mah Ung, Gordon (28 September 2016). "How AMD's powerful Zen chip flouts the SoC stereotype". PC World. Archived from the original on 6 February 2017. Retrieved 13 January 2017.
82. Justin, Michael; Sexton, Allen (3 March 2017). "AMD's AM4 Ryzen Chipsets". Tom's Hardware. Retrieved 3 March 2017.
83. Smith, Ryan (12 December 2016). "AMD Announces Radeon Instinct: GPU Accelerators for Deep Learning, Coming in 2017". Anandtech. Archived from the original on 12 December 2016. Retrieved 12 December 2016.
84. Shrout, Ryan (12 December 2016). "Radeon Instinct Machine Learning GPUs include Vega, Preview Performance". PC Per. Archived from the original on 11 August 2017. Retrieved 12 December 2016.
85. Mujtaba, Hassan (2017-03-07). "AMD Naples High-Performance Server Chips With 32 Cores, 64 Threads Detailed". Wccftech. Archived from the original on 2018-11-24. Retrieved 2018-11-24.
86. "AMD Zen FX CPUs, APUs Release Details Surface, Top-Notch Performance In The Cards". Tech Times. Archived from the original on 2015-12-25. Retrieved 2016-01-10.
87. "32-core AMD Opteron to feature quad-die MCM design". KitGuru. Archived from the original on 2016-01-25. Retrieved 2016-01-10.
88. Mark Mantel (7 February 2017). "CPU-Roadmap 2017 - 2018: Künftige AMD- und Intel-CPUs/-APUs in der Übersicht". PC Games Hardware (in German). Archived from the original on 1 March 2017. Retrieved 7 February 2017.
89. Larabel, Michael (13 December 2016). "AMD Reveals More Zen CPU Details, Officially Known As Ryzen, No Linux Details Yet". Phoronix. Archived from the original on 14 December 2016. Retrieved 13 December 2016.
90. "Power Consumption And Efficiency - AMD FX-8350 Review: Does Piledriver Fix Bulldozer's Flaws?". Tom's Hardware. 2012-10-22. Retrieved 2017-03-12.
91. "AMD Ryzen 7 1800X: Power Consumption And Temperatures". Tom's Hardware. 2017-03-02. Retrieved 2017-03-12.
92. "AMD Ryzen 7 1800X and AM4 Platform Review". bit-tech. Archived from the original on 2017-03-13. Retrieved 2017-03-12.
93. "The AMD Ryzen 7 1800X Review: Now and Zen | Power Consumption and Conclusions". www.pcper.com. 2 March 2017. Archived from the original on 2017-07-03. Retrieved 2017-03-12.
94. Chen, Sam (February 13, 2020). "What is XFR? (AMD)". Gear Primer. Retrieved June 11, 2020.
95. "AMD Athlon 200GE Processor with Radeon Vega 3 Graphics". AMD.
96. "AMD Athlon PRO 200GE APU". AMD.
97. "AMD Athlon 220GE Processor with Radeon Vega 3 Graphics".
98. "AMD Athlon 240GE Processor with Radeon Vega 3 Graphics". AMD.
99. "AMD Athlon 3000G Processor with Radeon Graphics". AMD.
100. "AMD Athlon 300GE".
101. "AMD Athlon Silver 3050GE".
102. "HP Desktop Pro A G2 Specifications". Hewlett-Packard.
103. "AMD Ryzen 3 2200GE Processor with Radeon Vega 8 Graphics".
104. "AMD Ryzen 3 PRO 2200GE Processor with Radeon Vega 8 Graphics".
105. "AMD Ryzen 3 PRO 2200G Processor with Radeon Vega 8 Graphics". www.amd.com.
106. "Specs". www.amd.com. Retrieved 2019-06-10.
107. "Specs". www.amd.com. Retrieved 2019-06-10.
108. "AMD Ryzen 5 2400G" . Retrieved 2018-01-19.
109. "AMD's 2nd-gen Ryzen is coming in April, desktop Ryzen APUs arrive February 12". TechSpot. Retrieved 2019-06-10.
110. Peter Bright - Jan 8, 2018 9:50 pm UTC (2018-01-08). "AMD's 2018 roadmap: Desktop APUs in February, second-generation Ryzen in April". Ars Technica. Retrieved 2019-06-10.
111. "Specs". www.amd.com. Retrieved 2019-06-10.
112. "AMD Radeon Vega 3 Mobile Specs". TechPowerUp. Retrieved April 25, 2023.
113. Alcorn, Paul (21 February 2018). "AMD Launches Ryzen Embedded V1000, EPYC Embedded 3000 Processors". Tom's Hardware. Retrieved 5 April 2018.
114. Kampman, Jeff (7 March 2017). "AMD's Naples platform prepares to take Zen into the datacenter". Tech Report. Archived from the original on 18 August 2017. Retrieved 7 March 2017.
115. Cutress, Ian (7 March 2017). "AMD Prepares 32-Core Naples CPUs for 1P and 2P Servers: Coming in Q2". Anandtech. Archived from the original on 11 September 2017. Retrieved 7 March 2017.
116. Kampman, Jeff (16 May 2017). "AMD's Naples datacenter CPUs will make an Epyc splash". Tech Report. Archived from the original on 17 May 2017. Retrieved 16 May 2017.
117. "AMD launches broad Epyc server processor line with up to 32 cores per chip". VentureBeat. 2017-06-20. Archived from the original on 2017-08-08. Retrieved 2017-08-08.
118. "AMD EPYC 7000 Series Processors" (PDF). AMD. January 2019. Retrieved March 25, 2023.
119. Cutress, Ian (June 20, 2017). "AMD's Future in Servers: New 7000-Series CPUs Launched and EPYC Analysis". AnandTech. Retrieved June 21, 2017.
120. Kennedy, Patrick (May 16, 2017). "AMD EPYC New Details on the Emerging Server Platform". ServeTheHome. Retrieved May 16, 2017.
121. "AMD EPYC 7261 - PS7261BEV8RAF". CPU-World. March 26, 2023.
122. Kennedy, Patrick (October 31, 2018). "AMD EPYC 7261 8 Core CPU Quietly Launched L3 Cache Monster". ServeTheHome. Retrieved March 28, 2023.
123. "AMD EPYC 7371 - PS7371BDVGPAF". CPU-World. March 26, 2023.
124. "New AMD-Powered Supercomputers Unleash Discovery and Accelerate Innovation" (Press release). AMD. November 13, 2018. Retrieved March 28, 2023.
125. "AMD EPYC 7571 - PS7571BDVIHAF". CPU-World. March 25, 2023.
126. Larabel, Michael (November 7, 2018). "A Look At The AMD EPYC Performance On The Amazon EC2 Cloud". Phoronix. Retrieved March 28, 2023.
127. Alcorn, Paul (21 February 2018). "AMD Launches Ryzen Embedded V1000, EPYC Embedded 3000 Processors". Tom's Hardware. Retrieved 5 April 2018.
128. "Product Brief: AMD EPYC Embedded 3000 Family" (PDF). AMD. 2018. Retrieved March 26, 2023.
129. "AMD EPYC Embedded 3255 - PE3255BGR88AF". CPU-World. March 26, 2023.

External links

• Ryzen Processors  – AMD