A logic gate is a device that performs a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate, one that has, for instance, zero rise time and unlimited fan-out, or it may refer to a non-ideal physical device.
In electronics, a multiplexer, also known as a data selector, is a device that selects between several analog or digital input signals and forwards the selected input to a single output line. The selection is directed by a separate set of digital inputs known as select lines. A multiplexer of inputs has select lines, which are used to select which input line to send to the output.
In electronics and telecommunications, a crossbar switch is a collection of switches arranged in a matrix configuration. A crossbar switch has multiple input and output lines that form a crossed pattern of interconnecting lines between which a connection may be established by closing a switch located at each intersection, the elements of the matrix. Originally, a crossbar switch consisted literally of crossing metal bars that provided the input and output paths. Later implementations achieved the same switching topology in solid-state electronics. The crossbar switch is one of the principal telephone exchange architectures, together with a rotary switch, memory switch, and a crossover switch.
Ray transfer matrix analysis is a mathematical form for performing ray tracing calculations in sufficiently simple problems which can be solved considering only paraxial rays. Each optical element is described by a 2 × 2ray transfer matrix which operates on a vector describing an incoming light ray to calculate the outgoing ray. Multiplication of the successive matrices thus yields a concise ray transfer matrix describing the entire optical system. The same mathematics is also used in accelerator physics to track particles through the magnet installations of a particle accelerator, see electron optics.
Modular synthesizers are synthesizers composed of separate modules for different functions. The modules can be connected together by the user to create a patch. The outputs from the modules may include audio signals, analog control voltages, or digital signals for logic or timing conditions. Typical modules are voltage-controlled oscillators, voltage-controlled filters, voltage-controlled amplifiers and envelope generators.
A nonblocking minimal spanning switch is a device that can connect N inputs to N outputs in any combination. The most familiar use of switches of this type is in a telephone exchange. The term "non-blocking" means that if it is not defective, it can always make the connection. The term "minimal" means that it has the fewest possible components, and therefore the minimal expense.
A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits. The PLA has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output. It has 2N AND gates for N input variables, and for M outputs from the PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products canonical forms.
In electronics, a banyan switch is a complex crossover switch used in electrical or optical switches.
In computing, a cache-oblivious algorithm is an algorithm designed to take advantage of a processor cache without having the size of the cache as an explicit parameter. An optimal cache-oblivious algorithm is a cache-oblivious algorithm that uses the cache optimally. Thus, a cache-oblivious algorithm is designed to perform well, without modification, on multiple machines with different cache sizes, or for a memory hierarchy with different levels of cache having different sizes. Cache-oblivious algorithms are contrasted with explicit loop tiling, which explicitly breaks a problem into blocks that are optimally sized for a given cache.
Bitonic mergesort is a parallel algorithm for sorting. It is also used as a construction method for building a sorting network. The algorithm was devised by Ken Batcher. The resulting sorting networks consist of comparators and have a delay of , where is the number of items to be sorted. This makes it a popular choice for sorting large numbers of elements on an architecture which itself contains a large number of parallel execution units running in lockstep, such as a typical GPU.
Charlieplexing is a technique for accessing a large number of LEDs, switches, micro-capacitors or other I/O entities, using relatively few tri-state logic wires from a microcontroller. These I/O entities can be wired as discrete components, x/y arrays, or woven in a diagonally intersecting pattern to form diagonal arrays.
A reed relay is a type of relay that uses an electromagnet to control one or more reed switches. The contacts are of magnetic material and the electromagnet acts directly on them without requiring an armature to move them. Sealed in a long, narrow glass tube, the contacts are protected from corrosion. The glass envelope may contain multiple reed switches or multiple reed switches can be inserted into a single bobbin and actuate simultaneously. Reed switches have been manufactured since the 1930s.
In digital electronics, an address decoder is a binary decoder that has two or more inputs for address bits and one or more outputs for device selection signals. When the address for a particular device appears on the address inputs, the decoder asserts the selection output for that device. A dedicated, single-output address decoder may be incorporated into each device on an address bus, or a single address decoder may serve multiple devices.
In the field of telecommunications, a Clos network is a kind of multistage circuit-switching network which represents a theoretical idealization of practical, multistage switching systems. It was invented by Edson Erwin in 1938 and first formalized by the American engineer Charles Clos in 1952.
A video router, also known as a video matrix switch or SDI router, is an electronic switch designed to route video signals from multiple input sources such as cameras, VT/DDR, computers and DVD players, to one or more display devices, such as monitors, projectors, and TVs.
A solid state relay (SSR) is an electronic switching device that switches on or off when an external voltage is applied across its control terminals. They serve the same function as an electromechanical relay, but solid-state electronics contain no moving parts and have a longer operational lifetime. Solid state relays were invented in 1971 by the Crydom Controls division of International Rectifiers.
Fractional lambda switching (FλS) leverages on time-driven switching (TDS) to realize sub-lambda switching in highly scalable dynamic optical networking, which requires minimum buffers. Fractional lambda switching implies switching fractions of optical channels as opposed to whole lambda switching where whole optical channels are the switching unit. In this context, TDS has the same general objectives as optical burst switching and optical packet switching: realizing all-optical networks with high wavelength utilization. TDS operation is based on time frames (TFs) that can be viewed as virtual containers for multiple IP packets that are switched at every TDS switch based on and coordinated by the UTC signal implementing pipeline forwarding. In the context of optical networks, synchronous virtual pipes SVPs typical of pipeline forwarding are called fractional lambda pipes (FλPs).
Automatic test system switching test equipment allows for high-speed testing of a device or devices in a test situation, where strict sequences and combinations of switching must be observed. By automating the process in this way, the possibility of test errors and inaccuracies is minimized, and only systematic errors would generally be encountered due to such as an incorrect programmed test condition. This eliminates error due to human factors and allows application of a standard test sequence repetitively. The design of a test system’s switching configuration is governed by the test specification, which is derived from the functional tests to be performed.
In computing, a logic block or configurable logic block (CLB) is a fundamental building block of field-programmable gate array (FPGA) technology. Logic blocks can be configured by the engineer to provide reconfigurable logic gates.
A Butler matrix is a beamforming network used to feed a phased array of antenna elements. Its purpose is to control the direction of a beam, or beams, of radio transmission. It consists of an matrix with hybrid couplers and fixed-value phase shifters at the junctions. The device has input ports to which power is applied, and output ports to which antenna elements are connected. The Butler matrix feeds power to the elements with a progressive phase difference between elements such that the beam of radio transmission is in the desired direction. The beam direction is controlled by switching power to the desired beam port. More than one beam, or even all of them can be activated simultaneously.
