Panther Lake (microprocessor)

Last updated

Panther Lake
LaunchedJanuary 2026
Designed by Intel
Manufactured by
Fabrication process
Codename(s)
  • PTL
Platform(s)
  • Mobile

Branding
Brand name(s) Core Ultra
GenerationSeries 3
Socket(s)
  • FCBGA 2540

Instructions and architecture
Instructions set x86-64
Instructions x86, IA-32, x86-64
Extensions
  • SSE 4.1, SSE 4.2, AVX2
P-core architectureCougar Cove (P-cores)
E-core architectureDarkmont (E-cores and LP E-cores)

Cores
Core countUp to 16 cores:
  • 4 P-cores
  • 8 E-cores
  • 4 LP-cores
P-core L0 cache48 KB data (per core)
P-core L1 cache256 KB (per core):
  • 64 KB instructions
  • 192 KB data
E-core L1 cache96 KB (per core):
  • 64 KB instructions
  • 32 KB data
P-core L2 cache2.5 MB (per core)
E-core L2 cache4 MB (per cluster)
P-core L3 cache3 MB (per core)

Graphics
Graphics architectureXe3-LPG
(Battlemage)
NPU
ArchitectureNPU 5
TOPSUp to 50 (int8)

Memory support
Type
Memory channels2 channels
Maximum capacityUp to 128 GB

I/O
PCIe support PCIe 5.0
PCIe lanes8 lanes:

History
Predecessor Lunar Lake
2 exhibited Panther Lake microprocessors Shang Shou Ti Yan Ying Te Er Xia Yi Dai Xin Pian ,Huan Can Guan Liao Jing Yuan Han !-00.11.55.095.png
2 exhibited Panther Lake microprocessors

Panther Lake is a codename for Core Ultra Series 3 mobile processors developed by Intel. [1] The architecture was launched in January 2026 at CES 2026 [2] [3] and is produced using Intel's 18A node. [2] It uses Intel Arc Xe3 integrated graphics. [1]

Contents

List of Panther Lake processors

Mobile

Panther Lake High Power

Panther Lake

See also

References

  1. 1 2 Grimm, Sunny (January 6, 2025). "Intel shows off working Panther Lake systems at CES — Xe3 GPU cores power Intel sneak peek". Tom's Hardware. Retrieved July 2, 2025.
  2. 1 2 Morescalchi, Daniela (January 5, 2026). "CES 2026: Intel Core Ultra Series 3 Debut as First Built on Intel 18A". Newsroom. Retrieved January 6, 2026.
  3. Cunningham, Andrew (January 6, 2026). "Intel launches Core Ultra Series 3 CPUs, made using its long-awaited 18A process". Ars Technica. Retrieved January 6, 2026.