# Switched capacitor

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A switched capacitor (SC) is an electronic circuit element implementing a filter. It works by moving charges into and out of capacitors when switches are opened and closed. Usually, non-overlapping signals are used to control the switches, so that not all switches are closed simultaneously. Filters implemented with these elements are termed "switched-capacitor filters", and depend only on the ratios between capacitances. This makes them much more suitable for use within integrated circuits, where accurately specified resistors and capacitors are not economical to construct. [1]

## Contents

SC circuits are typically implemented using metal–oxide–semiconductor (MOS) technology, with MOS capacitors and MOS field-effect transistor (MOSFET) switches, and they are commonly fabricated using the complementary MOS (CMOS) process. Common applications of MOS SC circuits include mixed-signal integrated circuits, digital-to-analog converter (DAC) chips, analog-to-digital converter (ADC) chips, pulse-code modulation (PCM) codec-filters, and PCM digital telephony. [2]

## The switched-capacitor resistor

The simplest switched-capacitor (SC) circuit is the switched-capacitor resistor, made of one capacitor C and two switches S1 and S2 which connect the capacitor with a given frequency alternately to the input and output of the SC. Each switching cycle transfers a charge ${\displaystyle q}$ from the input to the output at the switching frequency ${\displaystyle f}$. The charge q on a capacitor C with a voltage V between the plates is given by:

${\displaystyle q=CV\ }$

where V is the voltage across the capacitor. Therefore, when S1 is closed while S2 is open, the charge stored in the capacitor CS is:

${\displaystyle q_{\text{IN}}=C_{S}V_{\text{IN}}.\ }$

When S2 is closed (S1 is open - they are never both closed at the same time), some of that charge is transferred out of the capacitor, after which the charge that remains in capacitor CS is:

${\displaystyle q_{\text{OUT}}=C_{S}V_{\text{OUT}}.\ }$

Thus, the charge moved out of the capacitor to the output is:

${\displaystyle q=q_{\text{IN}}-q_{\text{OUT}}=C_{S}(V_{\text{IN}}-V_{\text{OUT}})\ }$

Because this charge q is transferred at a rate f, the rate of transfer of charge per unit time is:

${\displaystyle I=qf.\ }$

(A continuous transfer of charge from one node to another is equivalent to a current, so I (the symbol for electric current) is used.)

Substituting for q in the above, we have:

${\displaystyle I=C_{S}(V_{\text{IN}}-V_{\text{OUT}})f\ }$

Let V be the voltage across the SC from input to output. So:

${\displaystyle V=V_{\text{IN}}-V_{\text{OUT}}.\ }$

So the equivalent resistance R (i.e., the voltagecurrent relationship) is:

${\displaystyle R={V \over I}={1 \over {C_{S}f}}.\ }$

Thus, the SC behaves like a resistor whose value depends on capacitance CS and switching frequency f.

The SC resistor is used as a replacement for simple resistors in integrated circuits because it is easier to fabricate reliably with a wide range of values. It also has the benefit that its value can be adjusted by changing the switching frequency (i.e., it is a programmable resistance). See also: operational amplifier applications.

This same circuit can be used in discrete time systems (such as analog to digital converters) as a track and hold circuit. During the appropriate clock phase, the capacitor samples the analog voltage through switch one and in the second phase presents this held sampled value to an electronic circuit for processing.

## The parasitic-sensitive integrator

Often switched-capacitor circuits are used to provide accurate voltage gain and integration by switching a sampled capacitor onto an op-amp with a capacitor ${\displaystyle C_{fb}}$ in feedback. One of the earliest of these circuits is the parasitic-sensitive integrator developed by the Czech engineer Bedrich Hosticka. [3] Here is an analysis. Denote by ${\displaystyle T=1/f}$ the switching period. In capacitors,

${\displaystyle {\text{charge}}={\text{capacitance}}\times {\text{voltage}}}$

Then, when S1 opens and S2 closes (they are never both closed at the same time), we have the following:

1) Because ${\displaystyle C_{s}}$ has just charged:

${\displaystyle Q_{s}(t)=C_{s}\cdot V_{s}(t)\,}$

2) Because the feedback cap, ${\displaystyle C_{fb}}$, is suddenly charged with that much charge (by the op amp, which seeks a virtual short circuit between its inputs):

${\displaystyle Q_{fb}(t)=Q_{s}(t-T)+Q_{fb}(t-T)\,}$

Now dividing 2) by ${\displaystyle C_{fb}}$:

${\displaystyle V_{fb}(t)={\frac {Q_{s}(t-T)}{C_{fb}}}+V_{fb}(t-T)\,}$

And inserting 1):

${\displaystyle V_{fb}(t)={\frac {C_{s}}{C_{fb}}}\cdot V_{s}(t-T)+V_{fb}(t-T)\,}$

This last equation represents what is going on in ${\displaystyle C_{fb}}$ - it increases (or decreases) its voltage each cycle according to the charge that is being "pumped" from ${\displaystyle C_{s}}$ (due to the op-amp).

However, there is a more elegant way to formulate this fact if ${\displaystyle T}$ is very short. Let us introduce ${\displaystyle dt\leftarrow T}$ and ${\displaystyle dV_{fb}\leftarrow V_{fb}(t)-V_{fb}(t-dt)}$ and rewrite the last equation divided by dt:

${\displaystyle {\frac {dV_{fb}(t)}{dt}}=f{\frac {C_{s}}{C_{fb}}}\cdot V_{s}(t)\,}$

Therefore, the op-amp output voltage takes the form:

${\displaystyle V_{OUT}(t)=-V_{fb}(t)=-{\frac {1}{{\frac {1}{fC_{s}}}C_{fb}}}\int V_{s}(t)dt\,}$

This is an inverting integrator with an "equivalent resistance" ${\displaystyle R_{eq}={\frac {1}{fC_{s}}}}$. This allows its on-line or runtime adjustment (if we manage to make the switches oscillate according to some signal given by e.g. a microcontroller).

## The parasitic insensitive integrator

### Use in discrete-time systems

The delaying parasitic insensitive integrator has a wide use in discrete time electronic circuits such as biquad filters, anti-alias structures, and delta-sigma data converters. This circuit implements the following z-domain function:

${\displaystyle H(z)={\frac {1}{z-1}}}$

## The multiplying digital to analog converter

One useful characteristic of switched-capacitor circuits is that they can be used to perform many circuit tasks at the same time, which is difficult with non-discrete time components. The multiplying digital to analog converter (MDAC) is an example as it can take an analog input, add a digital value ${\displaystyle d}$ to it, and multiply this by some factor based on the capacitor ratios. The output of the MDAC is given by the following:

${\displaystyle V_{Out}={\frac {V_{i}\cdot (C_{1}+C_{2})-(d-1)\cdot V_{r}\cdot C_{2}+V_{os}\cdot (C_{1}+C_{2}+C_{p})}{C_{1}+{\frac {(C_{1}+C_{2}+C_{p})}{A}}}}}$

The MDAC is a common component in modern pipeline analog to digital converters as well as other precision analog electronics and was first created in the form above by Stephen Lewis and others at Bell Laboratories. [4]

## Analysis of switched-capacitor circuits

Switched-capacitor circuits are analysed by writing down charge conservation equations, as in this article, and solving them with a computer algebra tool. For hand analysis and for getting more insight into the circuits, it is also possible to do a Signal-flow graph analysis, with a method that is very similar for switched-capacitor and continuous-time circuits. [5]

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## References

1. Switched Capacitor Circuits, Swarthmore College course notes, accessed 2009-05-02
2. Allstot, David J. (2016). "Switched Capacitor Filters". In Maloberti, Franco; Davies, Anthony C. (eds.). A Short History of Circuits and Systems: From Green, Mobile, Pervasive Networking to Big Data Computing (PDF). IEEE Circuits and Systems Society. pp. 105–110. ISBN   9788793609860.
3. B. Hosticka, R. Brodersen, P. Gray, "MOS Sampled Data Recursive Filters Using Switched Capacitor Integrators", IEEE Journal of Solid-State Circuits, Vol SC-12, No.6, December 1977.
4. Stephen H. Lewis et al., "A 10-bit, 20Msample/s Analog to Digital Converter", IEEE Journal of Solid-State Circuits, March 1992
5. H. Schmid and A. Huber, "Analysis of switched-capacitor circuits using driving-point signal-flow graphs", Analog Integr Circ Sig Process (2018). https://doi.org/10.1007/s10470-018-1131-7.