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Altera headquarters in San Jose, California.
|Subsidiary of Intel|
|Headquarters||San Jose, California, United States|
|Products||FPGAs, CPLDs, embedded processors, ASICs|
|Revenue||US$1.783 billion (2013)|
|US$584.1 million (2013)|
|US$556.8 million (2013)|
|Total assets||US$4.658 billion (2013)|
|Total equity||US$3.333 billion (2013)|
Number of employees
|2,884 (December 2011)|
Altera Corporation is an American manufacturer of programmable logic devices (PLDs), reconfigurable complex digital circuits. II design software, and Enpirion PowerSoC DC-DC power solutions.Altera released its first PLD in 1984. Altera's main products are the Stratix, Arria and Cyclone series FPGAs, the MAX series CPLDs, Quartus
The United States of America (USA), commonly known as the United States or America, is a country composed of 50 states, a federal district, five major self-governing territories, and various possessions. At 3.8 million square miles, the United States is the world's third or fourth largest country by total area and is slightly smaller than the entire continent of Europe's 3.9 million square miles. With a population of over 327 million people, the U.S. is the third most populous country. The capital is Washington, D.C., and the largest city by population is New York City. Forty-eight states and the capital's federal district are contiguous in North America between Canada and Mexico. The State of Alaska is in the northwest corner of North America, bordered by Canada to the east and across the Bering Strait from Russia to the west. The State of Hawaii is an archipelago in the mid-Pacific Ocean. The U.S. territories are scattered about the Pacific Ocean and the Caribbean Sea, stretching across nine official time zones. The extremely diverse geography, climate, and wildlife of the United States make it one of the world's 17 megadiverse countries.
A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike a logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture. Before the PLD can be used in a circuit it must be programmed, that is, reconfigured.
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence the term "field-programmable". The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools.
Altera and Intel announced on June 1, 2015 that they have agreed that Intel would acquire Altera in an all-cash transaction valued at approximately $16.7 billion.As of December 28, 2015, the acquisition had been completed.
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, in the Silicon Valley. It is the world's second largest and second highest valued semiconductor chip manufacturer based on revenue after being overtaken by Samsung, and is the inventor of the x86 series of microprocessors, the processors found in most personal computers (PCs). Intel ranked No. 46 in the 2018 Fortune 500 list of the largest United States corporations by total revenue.
The Stratix series FPGAs are the company's largest, highest bandwidth devices, with up to 1.1 million logic elements, integrated transceivers at up to 28 Gbit/s, up to 1.6 Tbit/s of serial switching capability, up to 1,840 GMACs of signal-processing performance, and up to 7 x72 DDR3 memory interfaces at 800 MHz. Cyclone series FPGAs and SoC FPGAs are the company's lowest cost, lowest power FPGAs, with variants offering integrated transceivers up to 5 Gbit/s. In between these two device families are Arria series FPGAs, which provide a balance of performance, power, and cost for mid-range applications such as remote radio heads, video conferencing equipment, and wireline access equipment. Arria FPGAs have integrated transceivers up to 10 Gbit/s.
Stratix is a family of FPGA products developed by Altera. Other current product lines include Arria (mid-range) and Cyclone (low-cost).
A system on a chip or system on chip is an integrated circuit that integrates all components of a computer or other electronic system. These components typically include a central processing unit (CPU), memory, input/output ports and secondary storage – all on a single substrate. It may contain digital, analog, mixed-signal, and often radio frequency signal processing functions, depending on the application. As they are integrated on a single electronic substrate, SoCs consume much less power and take up much less area than multi-chip designs with equivalent functionality. Because of this, SoCs are very common in the mobile computing and edge computing markets. Systems on chip are commonly used in embedded systems and the Internet of Things.
Since December 2012, the company has been shipping SoC FPGA devices.According to Altera, fully depleted silicon on insulator (FDSOI) chip manufacturing process is beneficial for FPGAs. These devices integrate FPGAs with full hard processor systems based around ARM processors onto a single device.
ARM, previously Advanced RISC Machine, originally Acorn RISC Machine, is a family of reduced instruction set computing (RISC) architectures for computer processors, configured for various environments. Arm Holdings develops the architecture and licenses it to other companies, who design their own products that implement one of those architectures—including systems-on-chips (SoC) and systems-on-modules (SoM) that incorporate memory, interfaces, radios, etc. It also designs cores that implement this instruction set and licenses these designs to a number of companies that incorporate those core designs into their own products.
In May 2013, Altera acquired embedded power chipmaker Enpirion for $134m in cash ($141m including the assumption of debt). Since that time, Enpirion has been incorporated into Altera by becoming its own product offering within the Altera portfolio of products. The Enpirion products are power system-on-a-chip DC-DC converters that enable greater power densities and lower noise performance compared with their discrete equivalent.[ citation needed ] Unlike converters made from discrete components Enpirion dc-dc converters are simulated, characterized, validated and production qualified at delivery.
Previously Altera offered a publicly available ASIC design flow based on HardCopy ASICs, which transitioned an FPGA design, once finalized, to a form which is not alterable. This design flow reduced design security risks as well as costs for higher volume production. Design engineers could prototype their designs in Stratix series FPGAs, and then migrate these designs to HardCopy ASICs when they were ready for volume production.
The unique design flow makes hardware/software co-design and co-verification possible. The flow has been benchmarked to deliver systems to market 9 to 12 months faster, on average, than with standard-cell solutions. Design engineers can employ a single RTL, set of intellectual property (IP) cores, and Quartus II design software for both FPGA and ASIC implementations. Altera's HardCopy Design Center manages test insertion.
In digital circuit design, register-transfer level (RTL) is a design abstraction which models a synchronous digital circuit in terms of the flow of digital signals (data) between hardware registers, and the logical operations performed on those signals.
Altera and its partners offer an array of intellectual property (IP) cores that serve as building blocks that design engineers can drop into their system designs to perform specific functions. IP cores eliminate some of the time-consuming tasks of creating every block in a design from scratch.
Altera offers an embedded portfolio with a broad selection of soft processor cores:
And one hard IP processor core:
All of Altera's devices are supported by a common design environment, Quartus II design software. Quartus II software is available in a subscription-based edition and a free Web-based edition. It includes a number of tools to foster productivity.
In May 2008, Altera introduced the industry's first 40-nm programmable logic devices: the Stratix IV FPGAs and HardCopy IV ASICs. IV GT FPGAs, which have 11.3 Gbit/s transceivers for 40G/100G applications, and Arria II GX FPGAs, which have 3.75 Gbit/s transceivers for power- and cost-sensitive applications.Both devices are available with integrated transceiver options. Since then, the company has also introduced Stratix
Semiconductors manufactured on a 40-nm process node address many of the industry's key challenges, including power consumption, device performance, and cost. Altera's devices are manufactured using techniques such as 193-nm immersion lithography and technologies such as extreme low-k dielectrics and strained silicon. These techniques and technologies bring enhancements to device performance and power efficiency.
In April 2010, Altera introduced the FPGA industry's second 28-nm device, the Stratix V FPGA (to Xilinx's Kintex-7 FPGA), available with transceivers at speeds up to 28 Gbit/s. This device family has more than 1 million logic elements, up to 53 Mb of embedded memory, up to 7 x72 DDR3 DIMMs at 800 MHz, 1.6 Gbit/s LVDS performance, and up to 3,680 variable-precision DSP blocks. In August 2011, Altera began shipping 28-nm Stratix V GT devices featuring 28-gigabits-per-second transceivers.
The devices also feature some unique features. Embedded HardCopy blocks harden standard or logic-intensive applications, increasing integration and delivering twice the density without a cost or power penalty. Altera has developed a user friendly method for partial reconfiguration, so core functionality can be changed easily and on the fly. And there is a path to HardCopy V ASICs, when designs are ready for volume production. Also, Altera’s 28 nm FPGAs aim to reduce power requirements to 200 mW per channel.
In December 2012, the company announced the shipment of its first 28 nm Cyclone V SoC devices, which have a dual-core ARM Cortex-A9 processor system with FPGA logic on a single chip. The new SoCs are targeted for wireless communications, industrial, video surveillance, automotive and medical equipment markets. With these SoCs devices, users are able to create custom field-programmable SoC variants for power, board space, performance and cost optimization.
In February 2013, Altera announced an agreement with Intel to use Intel’s foundry services to produce its 14-nm node for the future manufacturing of its FPGAs, based on Intel’s 14 nm tri-gate transistor technology, in place of Altera’s ongoing agreement with Taiwan Semiconductor Manufacturing Corporation (TSMC).
In October 2016, nearly one year after Intel's integration with Altera, STRATIX 10 was announced, which is based on Intel's 14 nm Tri-Gate process.
Altera's largest competitor is FPGA founder and market-share leader Xilinx.
The next closest competitors are Lattice Semiconductor and Actel (now Microsemi), each representing less than 10 percent of the market.
FPGA startup company Achronix is also a competitor but does not have any significant market share.
In broader terms, Altera competes with ASIC, structured ASIC, Metal Configurable Standard Cell (MCSC) like BaySand and Zero Mask-Charge ASIC companies like eASIC.
Specifically in ASIC, BaySand has introduced metal configurable FPGA (mcFPGA) products to fill the needs due to discontinued HardCopy from Altera.
On June 21, 2006, Altera Corp. restated its 1996-2005 financial results to correct accounting errors related to stock-based compensation expense. Altera's CFO resigned after an SEC investigation revealed the decade of misstated earning reports resulted from the company's alleged culture of backdating stock options.
On June 1, 2015, Altera and Intel announced that Intel would acquire Altera in an all-cash transaction valued at approximately £15.73 billion ($16.7 billion).As of December 28, 2015, the acquisition has been completed.
Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGAs). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the datapath itself in addition to the control flow. On the other hand, the main difference from custom hardware, i.e. application-specific integrated circuits (ASICs) is the possibility to adapt the hardware during runtime by "loading" a new circuit on the reconfigurable fabric.
Xilinx, Inc. is an American technology company, primarily a supplier of programmable logic devices. It is known for inventing the field-programmable gate array (FPGA) and as the semiconductor company that created the first fabless manufacturing model.
Nios II is a 32-bit embedded-processor architecture designed specifically for the Altera family of field-programmable gate array (FPGA) integrated circuits. Nios II incorporates many enhancements over the original Nios architecture, making it more suitable for a wider range of embedded computing applications, from digital signal processing (DSP) to system-control.
The PowerPC 400 family is a line of 32-bit embedded RISC processor cores built using Power Architecture technology. The cores are designed to fit inside specialized applications ranging from system-on-a-chip (SoC) microcontrollers, network appliances, application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs) to set-top boxes, storage devices and supercomputers.
MoSys, Inc. is a publicly traded fabless semiconductor company based in Santa Clara, California that sells solutions for data path connectivity, speed and intelligence while eliminating data access bottlenecks on line cards and systems scaling from 100G to multi-terabits per second. Prior to 2012 it also sold high-performance embedded DRAM under IP cores under the "1T-SRAM" moniker as well high-speed SerDes cores and DDR interface IP. Customers for MoSys IP included a wide range of IDMs, foundries, and other fabless semiconductor companies. Applications included networking, consumer products, graphics systems, general computing, and storage systems.
Actel Corporation was an American manufacturer of nonvolatile, low-power field-programmable gate arrays (FPGAs), mixed-signal FPGAs, and programmable logic solutions. It was headquartered in Mountain View, California, with offices worldwide.
Nallatech is a computer hardware and software firm based in Camarillo, California, United States The company specializes in field-programmable gate array (FPGA) integrated circuit technology applied in computing. As of 2007 the company's primary markets were defense and high-performance computing.
Intel Quartus Prime is programmable logic device design software produced by Intel; prior to Intel's acquisition of Altera the tool was called Altera Quartus II. Quartus Prime enables analysis and synthesis of HDL designs, which enables the developer to compile their designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the target device with the programmer. Quartus Prime includes an implementation of VHDL and Verilog for hardware description, visual editing of logic circuits, and vector waveform simulation.
Aldec, Inc. is a privately owned electronic design automation company based in Henderson, Nevada that provides software and hardware used in creation and verification of digital designs targeting FPGA and ASIC technologies.
The term die shrink refers to a simple semiconductor scaling of semiconductor devices, mainly transistors. The act of shrinking a die is to create a somewhat identical circuit using a more advanced fabrication process, usually involving an advance of lithographic node. This reduces overall costs for a chip company, as the absence of major architectural changes to the processor lowers research and development costs, while at the same time allowing more processor dies to be manufactured on the same piece of silicon wafer, resulting in less cost per product sold.
Structured ASIC is an intermediate technology between ASIC and FPGA, offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease.
Field-programmable gate array prototyping, also referred to as FPGA-based prototyping, ASIC prototyping or system-on-chip (SoC) prototyping, is the method to prototype system-on-chip and application-specific integrated circuit designs on FPGAs for hardware verification and early software development.
Virtex is the flagship family of FPGA products developed by Xilinx. Other current product lines include Kintex (mid-range) and Artix (low-cost), each including configurations and models optimized for different applications. In addition, Xilinx offers the Spartan low-cost series, which continues to be updated and is nearing production utilizing the same underlying architecture and process node as the larger 7-series devices.
Tabula was an American fabless semiconductor company based in Santa Clara, California. Founded in 2003 by Steve Teig, it raised $215 million in venture funding. The company designed and built three dimensional field programmable gate arrays and ranked third on the Wall Street Journal's annual "Next Big Thing" list in 2012.
Achronix Semiconductor is an American fabless semiconductor company based in Santa Clara, California with an additional R&D facility in Bangalore, India, and an additional sales office in Shenzhen, China. Achronix is a diversified fabless semiconductor company that sells high-end FPGA products, embedded FPGA (eFPGA) products, system-level products and supporting design tools. Achronix was founded in 2004 in Ithaca, New York based on technology licensed from Cornell University. The company has been a consistent technology innovator in the FPGA market since moving its headquarters to Silicon Valley in 2006. Achronix has been prominently featured in the New York Times, Wall Street Journal, The Economist, and hundreds of global technology publications.
In computing, a logic block or configurable logic block (CLB) is a fundamental building block of field-programmable gate array (FPGA) technology. Logic blocks can be configured by the engineer to provide reconfigurable logic gates.
iCE is the brand name used for a family of low-power FPGAs produced by Lattice Semiconductor. Parts in the family are marketed with the "world's smallest FPGA" tagline, and are intended for use in portable and battery-powered devices, where they would be used to offload tasks from the device's main processor or SoC. By doing so, the main processor and its peripherals can enter a low-power state or be powered off entirely, potentially increasing battery life.